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at91: Enable slow master clock on meesc board
Normally the processor clock has a divisor of 2. In some cases this this needs to be set to 4. Check the user has set environment mdiv to 4 to change the divisor. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
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2 changed files with 27 additions and 0 deletions
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@ -219,6 +219,32 @@ u32 get_board_rev(void)
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}
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}
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#endif
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#endif
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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char *str;
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char buf[32];
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/*
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* Normally the processor clock has a divisor of 2.
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* In some cases this this needs to be set to 4.
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* Check the user has set environment mdiv to 4 to change the divisor.
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*/
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if ((str = getenv("mdiv")) && (strcmp(str, "4") == 0)) {
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at91_sys_write(AT91_PMC_MCKR,
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(at91_sys_read(AT91_PMC_MCKR) & ~AT91_PMC_MDIV) |
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AT91SAM9_PMC_MDIV_4);
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at91_clock_init(0);
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serial_setbrg();
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/* Notify the user that the clock is not default */
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printf("Setting master clock to %s MHz\n",
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strmhz(buf, get_mck_clk_rate()));
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}
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return 0;
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}
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#endif /* CONFIG_MISC_INIT_R */
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int board_init(void)
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int board_init(void)
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{
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{
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/* Peripheral Clock Enable Register */
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/* Peripheral Clock Enable Register */
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@ -48,6 +48,7 @@
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define CONFIG_MISC_INIT_R /* Call misc_init_r */
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#define CONFIG_ARCH_CPU_INIT
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#define CONFIG_ARCH_CPU_INIT
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