mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 07:31:15 +00:00
i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACY
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less than a year away. Also we want to have a CONFIG_I2C for U-Boot proper just like we have CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules. Rename this symbol so it is clear it is going away. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
parent
9ca00684db
commit
69d9eda4da
110 changed files with 133 additions and 130 deletions
7
README
7
README
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@ -1461,9 +1461,12 @@ The following options need to be configured:
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In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
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In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
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with a list of GPIO LEDs that have inverted polarity.
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with a list of GPIO LEDs that have inverted polarity.
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- I2C Support: CONFIG_SYS_I2C
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- I2C Support: CONFIG_SYS_I2C_LEGACY
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This enable the NEW i2c subsystem, and will allow you to use
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Note: This is deprecated in favour of driver model. Use
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CONFIG_DM_I2C instead.
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This enable the legacy i2c subsystem, and will allow you to use
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i2c commands at the u-boot command line (as long as you set
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i2c commands at the u-boot command line (as long as you set
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CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
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CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
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for defining speed and slave address
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for defining speed and slave address
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@ -329,7 +329,7 @@ static void erratum_rcw_src(void)
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#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
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#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
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static void erratum_a009203(void)
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static void erratum_a009203(void)
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{
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{
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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u8 __iomem *ptr;
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u8 __iomem *ptr;
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#ifdef I2C1_BASE_ADDR
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#ifdef I2C1_BASE_ADDR
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ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
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ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
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@ -88,7 +88,7 @@ void board_init_f(ulong dummy)
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preloader_console_init();
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preloader_console_init();
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spl_set_bd();
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spl_set_bd();
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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#ifdef CONFIG_SPL_I2C_SUPPORT
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#ifdef CONFIG_SPL_I2C_SUPPORT
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i2c_init_all();
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i2c_init_all();
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#endif
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#endif
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@ -184,7 +184,7 @@
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#define TZPC_BASE 0x02200000
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#define TZPC_BASE 0x02200000
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#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
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#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804)
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#if !CONFIG_IS_ENABLED(DM_I2C)
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#if !CONFIG_IS_ENABLED(DM_I2C)
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_LEGACY
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#define CONFIG_SYS_I2C_EARLY_INIT
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#define CONFIG_SYS_I2C_EARLY_INIT
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#endif
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#endif
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#define SRDS_MAX_LANES 8
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#define SRDS_MAX_LANES 8
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@ -96,7 +96,7 @@
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*/
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*/
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#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
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#if defined(CONFIG_CMD_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
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#ifndef CONFIG_SYS_I2C_SOFT
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#ifndef CONFIG_SYS_I2C_SOFT
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_LEGACY
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#define CONFIG_SYS_I2C_MVTWSI
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#define CONFIG_SYS_I2C_MVTWSI
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#endif
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#endif
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#define CONFIG_SYS_I2C_SLAVE 0x0
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#define CONFIG_SYS_I2C_SLAVE 0x0
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@ -106,7 +106,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
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env_relocate();
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env_relocate();
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#endif
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#endif
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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i2c_init_all();
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i2c_init_all();
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#else
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#else
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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@ -5,6 +5,6 @@
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# Author: Igor Grinberg <grinberg@compulab.co.il>
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# Author: Igor Grinberg <grinberg@compulab.co.il>
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obj-y += common.o
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obj-y += common.o
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obj-$(CONFIG_SYS_I2C) += eeprom.o
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obj-$(CONFIG_SYS_I2C_LEGACY) += eeprom.o
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obj-$(CONFIG_LCD) += omap3_display.o
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obj-$(CONFIG_LCD) += omap3_display.o
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obj-$(CONFIG_SMC911X) += omap3_smc911x.o
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obj-$(CONFIG_SMC911X) += omap3_smc911x.o
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@ -10,7 +10,7 @@
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#define _EEPROM_
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#define _EEPROM_
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#include <errno.h>
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#include <errno.h>
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
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int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
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u32 cl_eeprom_get_board_rev(uint eeprom_bus);
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u32 cl_eeprom_get_board_rev(uint eeprom_bus);
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int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);
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int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);
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@ -99,7 +99,7 @@ void board_init_r(gd_t *gd, ulong dest_addr)
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env_relocate();
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env_relocate();
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#endif
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#endif
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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i2c_init_all();
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i2c_init_all();
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#else
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#else
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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int board_early_init_f(void)
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{
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{
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#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
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#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
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/* DVFS for reset */
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/* DVFS for reset */
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
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#endif
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#endif
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@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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int board_early_init_f(void)
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{
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{
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#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
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#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
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/* DVFS for reset */
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/* DVFS for reset */
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
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#endif
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#endif
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@ -78,7 +78,7 @@ int board_init(void)
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void reset_cpu(void)
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void reset_cpu(void)
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{
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{
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#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
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#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
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i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
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i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
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#else
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#else
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/* only CA57 ? */
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/* only CA57 ? */
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@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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int board_early_init_f(void)
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{
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{
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#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
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#if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
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/* DVFS for reset */
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/* DVFS for reset */
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
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mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
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#endif
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#endif
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@ -104,7 +104,7 @@ int board_init(void)
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/* Address of boot parameters */
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/* Address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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#endif
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#endif
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@ -171,7 +171,7 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
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#endif
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#endif
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#endif
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#endif
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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static struct i2c_pads_info tqma6_i2c3_pads = {
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static struct i2c_pads_info tqma6_i2c3_pads = {
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/* I2C3: on board LM75, M24C64, */
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/* I2C3: on board LM75, M24C64, */
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.scl = {
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.scl = {
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@ -216,7 +216,7 @@ int board_init(void)
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#ifndef CONFIG_DM_SPI
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#ifndef CONFIG_DM_SPI
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tqma6_iomuxc_spi();
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tqma6_iomuxc_spi();
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#endif
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#endif
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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tqma6_setup_i2c();
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tqma6_setup_i2c();
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#endif
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#endif
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@ -46,7 +46,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
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printf("Cannot find RTC: err=%d\n", rcode);
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printf("Cannot find RTC: err=%d\n", rcode);
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return CMD_RET_FAILURE;
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return CMD_RET_FAILURE;
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}
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}
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#elif defined(CONFIG_SYS_I2C)
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#elif defined(CONFIG_SYS_I2C_LEGACY)
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old_bus = i2c_get_bus_num();
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old_bus = i2c_get_bus_num();
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i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
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i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM);
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#else
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#else
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@ -119,7 +119,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
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}
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}
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/* switch back to original I2C bus */
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/* switch back to original I2C bus */
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SYS_I2C_LEGACY
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i2c_set_bus_num(old_bus);
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i2c_set_bus_num(old_bus);
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#elif !defined(CONFIG_DM_RTC)
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#elif !defined(CONFIG_DM_RTC)
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I2C_SET_BUS(old_bus);
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I2C_SET_BUS(old_bus);
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@ -75,7 +75,7 @@ void eeprom_init(int bus)
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/* I2C EEPROM */
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/* I2C EEPROM */
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#if CONFIG_IS_ENABLED(DM_I2C)
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#if CONFIG_IS_ENABLED(DM_I2C)
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eeprom_i2c_bus = bus;
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eeprom_i2c_bus = bus;
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#elif defined(CONFIG_SYS_I2C)
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#elif defined(CONFIG_SYS_I2C_LEGACY)
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if (bus >= 0)
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if (bus >= 0)
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i2c_set_bus_num(bus);
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i2c_set_bus_num(bus);
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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24
cmd/i2c.c
24
cmd/i2c.c
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@ -98,7 +98,7 @@ static uint i2c_mm_last_alen;
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* pairs. The following macros take care of this */
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* pairs. The following macros take care of this */
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#if defined(CONFIG_SYS_I2C_NOPROBES)
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#if defined(CONFIG_SYS_I2C_NOPROBES)
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#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
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#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
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static struct
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static struct
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{
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{
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uchar bus;
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uchar bus;
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@ -114,7 +114,7 @@ static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
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#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
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#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
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#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
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#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
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#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
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#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
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#endif /* defined(CONFIG_SYS_I2C) */
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#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
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#endif
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#endif
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#define DISP_LINE_LEN 16
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#define DISP_LINE_LEN 16
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@ -209,7 +209,7 @@ void i2c_init_board(void)
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*
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*
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* Returns I2C bus speed in Hz.
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* Returns I2C bus speed in Hz.
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*/
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*/
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#if !defined(CONFIG_SYS_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
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#if !defined(CONFIG_SYS_I2C_LEGACY) && !CONFIG_IS_ENABLED(DM_I2C)
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/*
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/*
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* TODO: Implement architecture-specific get/set functions
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* TODO: Implement architecture-specific get/set functions
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* Should go away, if we switched completely to new multibus support
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* Should go away, if we switched completely to new multibus support
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@ -1725,7 +1725,7 @@ static void show_bus(struct udevice *bus)
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*
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*
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* Returns zero always.
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* Returns zero always.
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*/
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*/
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#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
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#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
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static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
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static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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char *const argv[])
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{
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{
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@ -1811,7 +1811,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
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* Returns zero on success, CMD_RET_USAGE in case of misuse and negative
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* Returns zero on success, CMD_RET_USAGE in case of misuse and negative
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* on error.
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* on error.
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*/
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*/
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#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
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#if defined(CONFIG_SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
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CONFIG_IS_ENABLED(DM_I2C)
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CONFIG_IS_ENABLED(DM_I2C)
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static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
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static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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char *const argv[])
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@ -1834,7 +1834,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
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printf("Current bus is %d\n", bus_no);
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printf("Current bus is %d\n", bus_no);
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} else {
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} else {
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bus_no = simple_strtoul(argv[1], NULL, 10);
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bus_no = simple_strtoul(argv[1], NULL, 10);
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#if defined(CONFIG_SYS_I2C)
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#if defined(CONFIG_SYS_I2C_LEGACY)
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if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
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if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
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printf("Invalid bus %d\n", bus_no);
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printf("Invalid bus %d\n", bus_no);
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return -1;
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return -1;
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@ -1852,7 +1852,7 @@ static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
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return ret ? CMD_RET_FAILURE : 0;
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return ret ? CMD_RET_FAILURE : 0;
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}
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}
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#endif /* defined(CONFIG_SYS_I2C) */
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#endif /* defined(CONFIG_SYS_I2C_LEGACY) */
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/**
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/**
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* do_i2c_bus_speed() - Handle the "i2c speed" command-line command
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* do_i2c_bus_speed() - Handle the "i2c speed" command-line command
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@ -1951,7 +1951,7 @@ static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
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printf("Error: Not supported by the driver\n");
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printf("Error: Not supported by the driver\n");
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return CMD_RET_FAILURE;
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return CMD_RET_FAILURE;
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}
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}
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#elif defined(CONFIG_SYS_I2C)
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#elif defined(CONFIG_SYS_I2C_LEGACY)
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i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
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i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
|
||||||
#else
|
#else
|
||||||
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||||
|
@ -1960,11 +1960,11 @@ static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct cmd_tbl cmd_i2c_sub[] = {
|
static struct cmd_tbl cmd_i2c_sub[] = {
|
||||||
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
|
#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
|
||||||
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
|
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
|
||||||
#endif
|
#endif
|
||||||
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
|
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
|
||||||
#if defined(CONFIG_SYS_I2C) || \
|
#if defined(CONFIG_SYS_I2C_LEGACY) || \
|
||||||
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
|
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
|
||||||
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
|
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
|
||||||
#endif /* CONFIG_I2C_MULTI_BUS */
|
#endif /* CONFIG_I2C_MULTI_BUS */
|
||||||
|
@ -2036,12 +2036,12 @@ static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
|
||||||
/***************************************************/
|
/***************************************************/
|
||||||
#ifdef CONFIG_SYS_LONGHELP
|
#ifdef CONFIG_SYS_LONGHELP
|
||||||
static char i2c_help_text[] =
|
static char i2c_help_text[] =
|
||||||
#if defined(CONFIG_SYS_I2C) || CONFIG_IS_ENABLED(DM_I2C)
|
#if defined(CONFIG_SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
|
||||||
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
|
"bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
|
||||||
"i2c " /* That's the prefix for the crc32 command below. */
|
"i2c " /* That's the prefix for the crc32 command below. */
|
||||||
#endif
|
#endif
|
||||||
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
|
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
|
||||||
#if defined(CONFIG_SYS_I2C) || \
|
#if defined(CONFIG_SYS_I2C_LEGACY) || \
|
||||||
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
|
defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
|
||||||
"i2c dev [dev] - show or set current I2C bus\n"
|
"i2c dev [dev] - show or set current I2C bus\n"
|
||||||
#endif /* CONFIG_I2C_MULTI_BUS */
|
#endif /* CONFIG_I2C_MULTI_BUS */
|
||||||
|
|
|
@ -244,7 +244,7 @@ __weak int dram_init_banksize(void)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_SYS_I2C)
|
#if defined(CONFIG_SYS_I2C_LEGACY)
|
||||||
static int init_func_i2c(void)
|
static int init_func_i2c(void)
|
||||||
{
|
{
|
||||||
puts("I2C: ");
|
puts("I2C: ");
|
||||||
|
@ -871,7 +871,7 @@ static const init_fnc_t init_sequence_f[] = {
|
||||||
misc_init_f,
|
misc_init_f,
|
||||||
#endif
|
#endif
|
||||||
INIT_FUNC_WATCHDOG_RESET
|
INIT_FUNC_WATCHDOG_RESET
|
||||||
#if defined(CONFIG_SYS_I2C)
|
#if defined(CONFIG_SYS_I2C_LEGACY)
|
||||||
init_func_i2c,
|
init_func_i2c,
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
|
#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
|
||||||
|
|
|
@ -336,7 +336,7 @@ int stdio_add_devices(void)
|
||||||
dev->name);
|
dev->name);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#ifdef CONFIG_SYS_I2C
|
#ifdef CONFIG_SYS_I2C_LEGACY
|
||||||
i2c_init_all();
|
i2c_init_all();
|
||||||
#endif
|
#endif
|
||||||
if (IS_ENABLED(CONFIG_DM_VIDEO)) {
|
if (IS_ENABLED(CONFIG_DM_VIDEO)) {
|
||||||
|
|
|
@ -11,7 +11,7 @@ obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o
|
||||||
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
|
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
|
||||||
|
|
||||||
obj-$(CONFIG_I2C_MV) += mv_i2c.o
|
obj-$(CONFIG_I2C_MV) += mv_i2c.o
|
||||||
obj-$(CONFIG_SYS_I2C) += i2c_core.o
|
obj-$(CONFIG_SYS_I2C_LEGACY) += i2c_core.o
|
||||||
obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
|
obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o
|
||||||
obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
|
obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o
|
||||||
obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
|
obj-$(CONFIG_SYS_I2C_CADENCE) += i2c-cdns.o
|
||||||
|
|
|
@ -277,7 +277,7 @@ struct global_data {
|
||||||
*/
|
*/
|
||||||
void *trace_buff;
|
void *trace_buff;
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_SYS_I2C)
|
#if defined(CONFIG_SYS_I2C_LEGACY)
|
||||||
/**
|
/**
|
||||||
* @cur_i2c_bus: currently used I2C bus
|
* @cur_i2c_bus: currently used I2C bus
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -47,8 +47,8 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if CONFIG_IS_ENABLED(DM_I2C)
|
#if CONFIG_IS_ENABLED(DM_I2C)
|
||||||
# ifdef CONFIG_SYS_I2C
|
# ifdef CONFIG_SYS_I2C_LEGACY
|
||||||
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
|
# error "Cannot define CONFIG_SYS_I2C_LEGACY when CONFIG_DM_I2C is used"
|
||||||
# endif
|
# endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -40,7 +40,7 @@
|
||||||
#define CONFIG_MCFTMR
|
#define CONFIG_MCFTMR
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -49,7 +49,7 @@
|
||||||
#define CONFIG_MCFTMR
|
#define CONFIG_MCFTMR
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_i2C_FSL
|
#define CONFIG_SYS_i2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -70,7 +70,7 @@
|
||||||
#define CONFIG_HOSTNAME "M5253DEMO"
|
#define CONFIG_HOSTNAME "M5253DEMO"
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -59,7 +59,7 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -55,7 +55,7 @@
|
||||||
#define CONFIG_MCFTMR
|
#define CONFIG_MCFTMR
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -49,7 +49,7 @@
|
||||||
#define CONFIG_MCFTMR
|
#define CONFIG_MCFTMR
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -51,7 +51,7 @@
|
||||||
#define CONFIG_MCFTMR
|
#define CONFIG_MCFTMR
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -165,7 +165,7 @@
|
||||||
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
|
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -220,7 +220,7 @@
|
||||||
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
|
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600)
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -203,7 +203,7 @@
|
||||||
#define CONFIG_FSL_SERDES2 0xe3100
|
#define CONFIG_FSL_SERDES2 0xe3100
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -206,7 +206,7 @@
|
||||||
/*
|
/*
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -295,7 +295,7 @@ extern unsigned long get_clock_freq(void);
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
|
||||||
|
|
|
@ -203,7 +203,7 @@
|
||||||
/*
|
/*
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -526,7 +526,7 @@ extern unsigned long get_sdram_size(void);
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
|
||||||
|
|
|
@ -260,7 +260,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
||||||
|
|
|
@ -423,7 +423,7 @@ unsigned long get_board_ddr_clk(void);
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
|
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
|
#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
|
||||||
|
|
|
@ -453,7 +453,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
|
||||||
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C3_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C3_SPEED 400000
|
||||||
|
|
|
@ -371,7 +371,7 @@ unsigned long get_board_ddr_clk(void);
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
|
||||||
|
|
|
@ -323,7 +323,7 @@ unsigned long get_board_ddr_clk(void);
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
|
||||||
|
|
|
@ -155,7 +155,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
||||||
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
|
||||||
|
|
|
@ -310,7 +310,7 @@
|
||||||
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
|
#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -58,7 +58,7 @@
|
||||||
#define CONFIG_MCFTMR
|
#define CONFIG_MCFTMR
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
#define CONFIG_SYS_FSL_I2C_SPEED 80000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -20,7 +20,7 @@
|
||||||
#define CONFIG_SYS_NS16550_COM1 0x44e09000
|
#define CONFIG_SYS_NS16550_COM1 0x44e09000
|
||||||
|
|
||||||
#define CONFIG_I2C
|
#define CONFIG_I2C
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
|
|
||||||
#endif /* CONFIG_DM */
|
#endif /* CONFIG_DM */
|
||||||
|
|
||||||
|
|
|
@ -31,7 +31,7 @@
|
||||||
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
|
#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
|
||||||
|
|
||||||
/* I2C configs */
|
/* I2C configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
|
||||||
#define CONFIG_SYS_I2C_SPEED 100000
|
#define CONFIG_SYS_I2C_SPEED 100000
|
||||||
|
|
|
@ -166,7 +166,7 @@
|
||||||
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
|
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -41,7 +41,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* I2C support */
|
/* I2C support */
|
||||||
#ifdef CONFIG_SYS_I2C
|
#ifdef CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_PXA
|
#define CONFIG_SYS_I2C_PXA
|
||||||
#define CONFIG_PXA_STD_I2C
|
#define CONFIG_PXA_STD_I2C
|
||||||
#define CONFIG_PXA_PWR_I2C
|
#define CONFIG_PXA_PWR_I2C
|
||||||
|
|
|
@ -270,7 +270,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
||||||
|
|
|
@ -18,7 +18,7 @@
|
||||||
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
|
#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||||
|
|
|
@ -13,7 +13,7 @@
|
||||||
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||||
|
|
|
@ -19,7 +19,7 @@
|
||||||
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||||
|
|
|
@ -40,7 +40,7 @@
|
||||||
/*
|
/*
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_SPEED 100000
|
#define CONFIG_SYS_I2C_SPEED 100000
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -21,7 +21,7 @@
|
||||||
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||||
|
|
|
@ -194,7 +194,7 @@
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
|
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
|
||||||
|
|
|
@ -153,7 +153,7 @@
|
||||||
* I2C related stuff
|
* I2C related stuff
|
||||||
*/
|
*/
|
||||||
#ifdef CONFIG_CMD_I2C
|
#ifdef CONFIG_CMD_I2C
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
|
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||||
|
|
|
@ -26,7 +26,7 @@
|
||||||
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
||||||
|
|
||||||
/* I2C config */
|
/* I2C config */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -21,7 +21,7 @@
|
||||||
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
|
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
|
||||||
|
|
||||||
/* I2C Configs */
|
/* I2C Configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -97,7 +97,7 @@
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_MAX_I2C_BUS 1
|
#define CONFIG_SYS_MAX_I2C_BUS 1
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||||
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
|
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
|
||||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0
|
#define CONFIG_SYS_I2C_SOFT_SLAVE 0
|
||||||
|
|
|
@ -36,7 +36,7 @@
|
||||||
/*
|
/*
|
||||||
* Hardware drivers
|
* Hardware drivers
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -42,7 +42,7 @@
|
||||||
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
|
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
|
||||||
|
|
||||||
/* I2C Configs */
|
/* I2C Configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -163,7 +163,7 @@
|
||||||
/*
|
/*
|
||||||
* I2C setup
|
* I2C setup
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
|
|
|
@ -37,7 +37,7 @@
|
||||||
#define CONFIG_POWER_I2C
|
#define CONFIG_POWER_I2C
|
||||||
#define CONFIG_POWER_PCA9450
|
#define CONFIG_POWER_PCA9450
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -44,7 +44,7 @@
|
||||||
#undef CONFIG_DM_PMIC
|
#undef CONFIG_DM_PMIC
|
||||||
#undef CONFIG_DM_PMIC_PFUZE100
|
#undef CONFIG_DM_PMIC_PFUZE100
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
||||||
|
|
|
@ -41,7 +41,7 @@
|
||||||
#undef CONFIG_DM_PMIC
|
#undef CONFIG_DM_PMIC
|
||||||
#undef CONFIG_DM_PMIC_PFUZE100
|
#undef CONFIG_DM_PMIC_PFUZE100
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
||||||
|
|
|
@ -62,7 +62,7 @@
|
||||||
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
|
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_NUM_I2C_BUSES 4
|
#define CONFIG_SYS_NUM_I2C_BUSES 4
|
||||||
#define CONFIG_SYS_I2C_MAX_HOPS 1
|
#define CONFIG_SYS_I2C_MAX_HOPS 1
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
|
|
|
@ -90,7 +90,7 @@
|
||||||
* I2C related stuff
|
* I2C related stuff
|
||||||
*/
|
*/
|
||||||
#undef CONFIG_I2C_MVTWSI
|
#undef CONFIG_I2C_MVTWSI
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||||
#define CONFIG_SYS_I2C_INIT_BOARD
|
#define CONFIG_SYS_I2C_INIT_BOARD
|
||||||
|
|
||||||
|
|
|
@ -191,7 +191,7 @@
|
||||||
/*
|
/*
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_INIT_BOARD
|
#define CONFIG_SYS_I2C_INIT_BOARD
|
||||||
#define CONFIG_SYS_I2C_SPEED 100000
|
#define CONFIG_SYS_I2C_SPEED 100000
|
||||||
|
|
||||||
|
|
|
@ -83,7 +83,7 @@
|
||||||
#define CONFIG_NFS_TIMEOUT 10000UL
|
#define CONFIG_NFS_TIMEOUT 10000UL
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_SH
|
#define CONFIG_SYS_I2C_SH
|
||||||
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
|
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
|
||||||
#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
|
#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
|
||||||
|
|
|
@ -47,7 +47,7 @@
|
||||||
/*
|
/*
|
||||||
* I2C Configuration
|
* I2C Configuration
|
||||||
*/
|
*/
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
|
#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
|
#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
|
||||||
|
|
||||||
|
|
|
@ -56,7 +56,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#else
|
#else
|
||||||
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
||||||
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
||||||
|
|
|
@ -99,7 +99,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#else
|
#else
|
||||||
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
||||||
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
||||||
|
|
|
@ -331,7 +331,7 @@ unsigned long get_board_ddr_clk(void);
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#else
|
#else
|
||||||
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
||||||
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
||||||
|
|
|
@ -105,7 +105,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#else
|
#else
|
||||||
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
||||||
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
||||||
|
|
|
@ -209,7 +209,7 @@
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#else
|
#else
|
||||||
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
|
||||||
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
|
||||||
|
|
|
@ -45,7 +45,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Serial Port */
|
/* Serial Port */
|
||||||
|
|
|
@ -150,7 +150,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
||||||
|
|
|
@ -134,7 +134,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
||||||
|
|
|
@ -62,7 +62,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -75,7 +75,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Serial Port */
|
/* Serial Port */
|
||||||
|
|
|
@ -88,7 +88,7 @@
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
#ifdef CONFIG_CMD_I2C
|
#ifdef CONFIG_CMD_I2C
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -18,7 +18,7 @@
|
||||||
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x0
|
#define CONFIG_SYS_I2C_SLAVE 0x0
|
||||||
|
|
|
@ -36,7 +36,7 @@
|
||||||
#define CONFIG_MXC_USB_FLAGS 0
|
#define CONFIG_MXC_USB_FLAGS 0
|
||||||
|
|
||||||
/* I2C Configs */
|
/* I2C Configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -51,7 +51,7 @@
|
||||||
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
||||||
|
|
||||||
/* I2C Configs */
|
/* I2C Configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -38,7 +38,7 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* I2C Configs */
|
/* I2C Configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -21,7 +21,7 @@
|
||||||
#define CONFIG_MXC_UART_BASE UART2_BASE
|
#define CONFIG_MXC_UART_BASE UART2_BASE
|
||||||
|
|
||||||
/* I2C Configs */
|
/* I2C Configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -52,7 +52,7 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
|
|
|
@ -464,7 +464,7 @@
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
#define CONFIG_SYS_FSL_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
|
||||||
|
|
|
@ -33,7 +33,7 @@
|
||||||
#define CONFIG_POWER_I2C
|
#define CONFIG_POWER_I2C
|
||||||
#define CONFIG_POWER_PCA9450
|
#define CONFIG_POWER_PCA9450
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -126,7 +126,7 @@
|
||||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||||
|
|
||||||
/* I2C configs */
|
/* I2C configs */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC
|
#define CONFIG_SYS_I2C_MXC
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1
|
#define CONFIG_SYS_I2C_MXC_I2C1
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2
|
#define CONFIG_SYS_I2C_MXC_I2C2
|
||||||
|
|
|
@ -40,7 +40,7 @@
|
||||||
#undef CONFIG_DM_MMC
|
#undef CONFIG_DM_MMC
|
||||||
#undef CONFIG_DM_PMIC
|
#undef CONFIG_DM_PMIC
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
||||||
|
|
|
@ -74,7 +74,7 @@
|
||||||
|
|
||||||
/* I2C Configuration */
|
/* I2C Configuration */
|
||||||
#define CONFIG_I2C
|
#define CONFIG_I2C
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
|
|
||||||
/* Defines for SPL */
|
/* Defines for SPL */
|
||||||
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
|
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
|
||||||
|
|
|
@ -73,7 +73,7 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* I2C - Bit-bashed */
|
/* I2C - Bit-bashed */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||||
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
|
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
|
||||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
|
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
|
||||||
|
|
|
@ -53,7 +53,7 @@
|
||||||
* I2C
|
* I2C
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_I2C_MULTI_BUS
|
#define CONFIG_I2C_MULTI_BUS
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -199,7 +199,7 @@
|
||||||
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
|
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_SPEED 400000
|
#define CONFIG_SYS_I2C_SPEED 400000
|
||||||
#define CONFIG_SYS_I2C_SLAVE 0x7f
|
#define CONFIG_SYS_I2C_SLAVE 0x7f
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -116,7 +116,7 @@
|
||||||
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
|
#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_FSL
|
#define CONFIG_SYS_I2C_FSL
|
||||||
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
|
||||||
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
|
||||||
|
|
|
@ -56,7 +56,7 @@
|
||||||
/* EHCI */
|
/* EHCI */
|
||||||
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
|
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
|
||||||
|
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
|
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
|
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
|
||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
|
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
|
||||||
|
|
|
@ -24,7 +24,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* I2C */
|
/* I2C */
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#define CONFIG_SYS_I2C_MVTWSI
|
#define CONFIG_SYS_I2C_MVTWSI
|
||||||
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
|
||||||
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
|
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
|
||||||
|
|
|
@ -89,7 +89,7 @@
|
||||||
/* If DM_I2C, enable non-DM I2C support */
|
/* If DM_I2C, enable non-DM I2C support */
|
||||||
#if !CONFIG_IS_ENABLED(DM_I2C)
|
#if !CONFIG_IS_ENABLED(DM_I2C)
|
||||||
#define CONFIG_I2C
|
#define CONFIG_I2C
|
||||||
#define CONFIG_SYS_I2C
|
#define CONFIG_SYS_I2C_LEGACY
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -118,7 +118,7 @@
|
||||||
|
|
||||||
#ifdef CONFIG_SPL_BUILD
|
#ifdef CONFIG_SPL_BUILD
|
||||||
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
|
/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
|
||||||
#undef CONFIG_SYS_I2C
|
#undef CONFIG_SYS_I2C_LEGACY
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
|
#endif /* __CONFIG_TI_OMAP4_COMMON_H */
|
||||||
|
|
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