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am33xx evm: Update secure_emif_sdram_config during ddr init
This patch updates secure_emif_sdram_config with the same value written to sdram_config during ddr3 initialization. During suspend/resume, this value is copied into sdram_config. With this, a write to sdram_config at the end of resume sequence which triggers an init sequence can be avoided. Without this register write in place, the DDR_RESET line goes low for a few cycles during resume which is a violation of the JEDEC spec. Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
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parent
25f8bf6eff
commit
6995a28937
3 changed files with 7 additions and 1 deletions
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@ -17,6 +17,7 @@ http://www.ti.com/
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#include <asm/arch/cpu.h>
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#include <asm/arch/ddr_defs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/io.h>
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#include <asm/emif.h>
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@ -46,8 +47,10 @@ void config_sdram(const struct emif_regs *regs)
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{
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writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl);
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writel(regs->ref_ctrl, &emif_reg->emif_sdram_ref_ctrl_shdw);
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if (regs->zq_config)
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if (regs->zq_config){
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writel(regs->zq_config, &emif_reg->emif_zq_config);
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writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
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}
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writel(regs->sdram_config, &emif_reg->emif_sdram_config);
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}
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@ -234,6 +234,8 @@ struct vtp_reg {
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struct ctrl_stat {
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unsigned int resv1[16];
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unsigned int statusreg; /* ofset 0x40 */
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unsigned int resv2[51];
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unsigned int secure_emif_sdram_config; /* offset 0x0110 */
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};
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/* AM33XX GPIO registers */
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@ -46,6 +46,7 @@ u32 get_sysboot_value(void);
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int print_cpuinfo(void);
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#endif
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extern struct ctrl_stat *cstat;
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u32 get_device_type(void);
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void setup_clocks_for_console(void);
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void ddr_pll_config(unsigned int ddrpll_M);
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