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Coldfire: M527x: Add missing GPIO register address defines
Add missing GPIO registers address definition for Coldfire M5271. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
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1 changed files with 32 additions and 0 deletions
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#define MCF_GPIO_PDDR_QSPI 0x10001A
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#define MCF_GPIO_PDDR_TIMER 0x10001B
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#define MCF_GPIO_PPDSDR_ADDR 0x100020
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#define MCF_GPIO_PPDSDR_DATAH 0x100021
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#define MCF_GPIO_PPDSDR_DATAL 0x100022
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#define MCF_GPIO_PPDSDR_BUSCTL 0x100023
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#define MCF_GPIO_PPDSDR_BS 0x100024
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#define MCF_GPIO_PPDSDR_CS 0x100025
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#define MCF_GPIO_PPDSDR_SDRAM 0x100026
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#define MCF_GPIO_PPDSDR_FECI2C 0x100027
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#define MCF_GPIO_PPDSDR_UARTH 0x100028
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#define MCF_GPIO_PPDSDR_UARTL 0x100029
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#define MCF_GPIO_PPDSDR_QSPI 0x10002A
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#define MCF_GPIO_PPDSDR_TIMER 0x10002B
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#define MCF_GPIO_PCLRR_ADDR 0x100030
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#define MCF_GPIO_PCLRR_DATAH 0x100031
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#define MCF_GPIO_PCLRR_DATAL 0x100032
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#define MCF_GPIO_PCLRR_BUSCTL 0x100033
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#define MCF_GPIO_PCLRR_BS 0x100034
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#define MCF_GPIO_PCLRR_CS 0x100035
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#define MCF_GPIO_PCLRR_SDRAM 0x100036
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#define MCF_GPIO_PCLRR_FECI2C 0x100037
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#define MCF_GPIO_PCLRR_UARTH 0x100038
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#define MCF_GPIO_PCLRR_UARTL 0x100039
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#define MCF_GPIO_PCLRR_QSPI 0x10003A
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#define MCF_GPIO_PCLRR_TIMER 0x10003B
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#define MCF_GPIO_PAR_AD 0x100040
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#define MCF_GPIO_PAR_BUSCTL 0x100042
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#define MCF_GPIO_PAR_BS 0x100044
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#define MCF_GPIO_PAR_QSPI 0x10004A
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#define MCF_GPIO_PAR_TIMER 0x10004C
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#define MCF_DSCR_EIM 0x100050
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#define MCF_DCSR_FEC12C 0x100052
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#define MCF_DCSR_UART 0x100053
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#define MCF_DCSR_QSPI 0x100054
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#define MCF_DCSR_TIMER 0x100055
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#define MCF_CCM_CIR 0x11000A
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#define MCF_CCM_CIR_PRN_MASK 0x3F
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#define MCF_CCM_CIR_PIN_LEN 6
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