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renesas: Fix RPC-IF compatible values

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The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.

Correct them in both DTSi files and drivers, to match the final DT
Bindings.

Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Geert Uytterhoeven 2022-03-29 14:19:09 +02:00 committed by Marek Vasut
parent 33aca1c868
commit 68083b897b
12 changed files with 14 additions and 18 deletions
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2
arch/arm/dts/r7s72100-gr-peach-u-boot.dts
View file

@ -47,7 +47,7 @@
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r7s72100", "renesas,rpc"; compatible = "renesas,r7s72100-rpc-if";
reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>; reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
bank-width = <2>; bank-width = <2>;
num-cs = <1>; num-cs = <1>;

2
arch/arm/dts/r8a774c0-u-boot.dtsi
View file

@ -11,7 +11,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rcar-gen3-rpc", "renesas,rpc-r8a774c0"; compatible = "renesas,r8a774c0-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a77950-u-boot.dtsi
View file

@ -14,7 +14,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a7795", "renesas,rpc"; compatible = "renesas,r8a7795-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a77960-u-boot.dtsi
View file

@ -14,7 +14,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a7796", "renesas,rpc"; compatible = "renesas,r8a7796-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a77965-u-boot.dtsi
View file

@ -14,7 +14,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77965", "renesas,rpc"; compatible = "renesas,r8a77965-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a77970-u-boot.dtsi
View file

@ -14,7 +14,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77970", "renesas,rpc"; compatible = "renesas,r8a77970-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a77980-u-boot.dtsi
View file

@ -14,7 +14,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77980", "renesas,rpc"; compatible = "renesas,r8a77980-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a77990-u-boot.dtsi
View file

@ -10,7 +10,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77990", "renesas,rpc"; compatible = "renesas,r8a77990-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a77995-u-boot.dtsi
View file

@ -10,7 +10,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77995", "renesas,rpc"; compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>; clocks = <&cpg CPG_MOD 917>;
bank-width = <2>; bank-width = <2>;

2
arch/arm/dts/r8a779a0-u-boot.dtsi
View file

@ -10,7 +10,7 @@
/ { / {
soc { soc {
rpc: spi@ee200000 { rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a779a0", "renesas,rcar-gen3-rpc"; compatible = "renesas,r8a779a0-rpc-if", "renesas,rcar-gen3-rpc-if";
reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>; reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
clocks = <&cpg CPG_MOD 629>; clocks = <&cpg CPG_MOD 629>;
bank-width = <2>; bank-width = <2>;

3
drivers/mtd/renesas_rpc_hf.c
View file

@ -388,7 +388,8 @@ static int rpc_hf_probe(struct udevice *dev)
} }
static const struct udevice_id rpc_hf_ids[] = { static const struct udevice_id rpc_hf_ids[] = {
{ .compatible = "renesas,rpc" }, { .compatible = "renesas,r7s72100-rpc-if" },
{ .compatible = "renesas,rcar-gen3-rpc-if" },
{} {}
}; };

9
drivers/spi/renesas_rpc_spi.c
View file

@ -449,13 +449,8 @@ static const struct dm_spi_ops rpc_spi_ops = {
}; };
static const struct udevice_id rpc_spi_ids[] = { static const struct udevice_id rpc_spi_ids[] = {
{ .compatible = "renesas,rpc-r7s72100" }, { .compatible = "renesas,r7s72100-rpc-if" },
{ .compatible = "renesas,rpc-r8a7795" }, { .compatible = "renesas,rcar-gen3-rpc-if" },
{ .compatible = "renesas,rpc-r8a7796" },
{ .compatible = "renesas,rpc-r8a77965" },
{ .compatible = "renesas,rpc-r8a77970" },
{ .compatible = "renesas,rpc-r8a77995" },
{ .compatible = "renesas,rcar-gen3-rpc" },
{ } { }
}; };