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https://github.com/AsahiLinux/u-boot
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SPC1920: cleanup memory contoller setup
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parent
8fc2102faa
commit
67fea022fa
3 changed files with 10 additions and 15 deletions
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@ -148,8 +148,8 @@ int hpi_init(void)
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udelay(100);
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memctl->memc_mamr = CFG_MAMR;
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memctl->memc_or3 = CFG_OR3_PRELIM;
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memctl->memc_br3 = CFG_BR3_PRELIM;
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memctl->memc_or3 = CFG_OR3;
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memctl->memc_br3 = CFG_BR3;
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/* reset dsp */
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dsp_reset();
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@ -175,14 +175,9 @@ long int initdram (int board_type)
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/* initalize the DSP Host Port Interface */
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hpi_init();
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/* PLD Setup */
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memctl->memc_or4 = CFG_OR4_PRELIM;
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memctl->memc_br4 = CFG_BR4_PRELIM;
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udelay(1000);
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/* PLD Setup */
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memctl->memc_or5 = CFG_OR5_PRELIM;
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memctl->memc_br5 = CFG_BR5_PRELIM;
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/* FRAM Setup */
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memctl->memc_or4 = CFG_OR4;
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memctl->memc_br4 = CFG_BR4;
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udelay(1000);
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return (size_b0);
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@ -361,14 +361,14 @@
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* DSP Host Port Interface CS3
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*/
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#define CFG_SPC1920_HPI_BASE 0x90000000
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#define CFG_PRELIM_OR3_AM 0xF0000000
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#define CFG_PRELIM_OR3_AM 0xF8000000
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#define CFG_OR3_PRELIM (CFG_PRELIM_OR3_AM | \
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#define CFG_OR3 (CFG_PRELIM_OR3_AM | \
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OR_G5LS | \
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OR_SCY_0_CLK | \
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OR_BI)
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#define CFG_BR3_PRELIM ((CFG_SPC1920_HPI_BASE & BR_BA_MSK) | \
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#define CFG_BR3 ((CFG_SPC1920_HPI_BASE & BR_BA_MSK) | \
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BR_MS_UPMA | \
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BR_PS_16 | \
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BR_V);
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@ -396,13 +396,13 @@
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*/
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#define CFG_SPC1920_FRAM_BASE 0x80100000
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#define CFG_PRELIM_OR4_AM 0xffff8000
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#define CFG_OR4_PRELIM (CFG_PRELIM_OR4_AM | \
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#define CFG_OR4 (CFG_PRELIM_OR4_AM | \
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OR_ACS_DIV2 | \
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OR_BI | \
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OR_SCY_4_CLK | \
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OR_TRLX)
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#define CFG_BR4_PRELIM ((CFG_SPC1920_FRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
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#define CFG_BR4 ((CFG_SPC1920_FRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
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/*
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* PLD CS5
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