mirror of
https://github.com/AsahiLinux/u-boot
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- add support for Amlogic A1 SoC and ad401 board
- add support for Videostrong KII Pro - introduce secure power domain for A1 SoC -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmSb6pQACgkQd9zb2sjI SdEv6g//Z+bH20JjcXZ4elFMDVbZRFaHcjxxxT4hXfaRy+nzPlVCFNnhks07XbrM kPsHGPg1MOSMJL3gMsKIc2fEESeNsFptny08A3OIb1rGvQ12DlznWAPkRMWpVzLM 7lc9ya0E7bC0A69Yg38xGqwrCYGqHkXdl4u7OlK0HqppH1aPq7inZVBkIsfaZggA f2yWkIjE4HXZ0DsOfTbQB82WCLz84tL3JcAtRuFWZO0ZjXSHhpzyfYqD5CfN3sIc axuKI6uXMkpmpSwyLPPfUydiVWoYdW8zfYTblaCUl19goadsze3WZ0WMyDVRlmtC mSY+M1PNFcq9ZnVmE8Dkuao+YDI6Lmkasaz2baW1DH5XaSuBBpTymYVUB53XqXoo nznIKRO75cq40UQIoDEtmWMI+PUHfZWjyJlrXypZfEuWCMxjSGqs/vRgLAet44uX whJF1esltAKVaqYy/v+8l6aWK3HnjdIRc1wMJgQfkMHxXH0IZ1nUALXN3nqweCY2 aqvxadxood/ZqessCKJGb3UYzWK7n9hHjVC87Exe+8pLlV9cOodKXU4/5qYBvFvl OCdl41zc3rqDN5+hCW3onpI1ra7JJ8vmNSNspBc//p9ajCjbcBrt+7di4tnBemFM Tko0WeX9lTTaaCF8Ic5KhO22bl6LuSlnhe7L4Dp9WAfSMt8Mm2g= =NbSq -----END PGP SIGNATURE----- Merge tag 'u-boot-amlogic-next-20230628' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next - add support for Amlogic A1 SoC and ad401 board - add support for Videostrong KII Pro - introduce secure power domain for A1 SoC
This commit is contained in:
Tom Rini
commit
67d8b46e6e
28 changed files with 1889 additions and 0 deletions
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@ -187,8 +187,10 @@ dtb-$(CONFIG_ARCH_S5P4418) += \
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s5p4418-nanopi2.dtb
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dtb-$(CONFIG_ARCH_MESON) += \
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meson-a1-ad401.dtb \
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meson-axg-s400.dtb \
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meson-axg-jethome-jethub-j100.dtb \
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meson-gxbb-kii-pro.dtb \
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meson-gxbb-nanopi-k2.dtb \
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meson-gxbb-odroidc2.dtb \
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meson-gxbb-nanopi-k2.dtb \
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30
arch/arm/dts/meson-a1-ad401.dts
Normal file
30
arch/arm/dts/meson-a1-ad401.dts
Normal file
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@ -0,0 +1,30 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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/dts-v1/;
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#include "meson-a1.dtsi"
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/ {
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compatible = "amlogic,ad401", "amlogic,a1";
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model = "Amlogic Meson A1 AD401 Development Board";
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aliases {
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serial0 = &uart_AO_B;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x8000000>;
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};
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};
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&uart_AO_B {
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status = "okay";
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};
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161
arch/arm/dts/meson-a1.dtsi
Normal file
161
arch/arm/dts/meson-a1.dtsi
Normal file
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@ -0,0 +1,161 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/meson-a1-gpio.h>
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/ {
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compatible = "amlogic,a1";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a35";
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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};
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l2: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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};
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x800000>;
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alignment = <0x0 0x400000>;
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linux,cma-default;
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};
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};
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sm: secure-monitor {
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compatible = "amlogic,meson-gxbb-sm";
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pwrc: power-controller {
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compatible = "amlogic,meson-a1-pwrc";
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#power-domain-cells = <1>;
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status = "okay";
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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apb: bus@fe000000 {
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compatible = "simple-bus";
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reg = <0x0 0xfe000000 0x0 0x1000000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
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reset: reset-controller@0 {
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compatible = "amlogic,meson-a1-reset";
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reg = <0x0 0x0 0x0 0x8c>;
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#reset-cells = <1>;
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};
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periphs_pinctrl: pinctrl@400 {
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compatible = "amlogic,meson-a1-periphs-pinctrl";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gpio: bank@400 {
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reg = <0x0 0x0400 0x0 0x003c>,
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<0x0 0x0480 0x0 0x0118>;
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reg-names = "mux", "gpio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&periphs_pinctrl 0 0 62>;
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};
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};
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uart_AO: serial@1c00 {
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compatible = "amlogic,meson-gx-uart",
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"amlogic,meson-ao-uart";
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reg = <0x0 0x1c00 0x0 0x18>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>, <&xtal>, <&xtal>;
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clock-names = "xtal", "pclk", "baud";
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status = "disabled";
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};
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uart_AO_B: serial@2000 {
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compatible = "amlogic,meson-gx-uart",
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"amlogic,meson-ao-uart";
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reg = <0x0 0x2000 0x0 0x18>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>, <&xtal>, <&xtal>;
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clock-names = "xtal", "pclk", "baud";
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status = "disabled";
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};
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};
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gic: interrupt-controller@ff901000 {
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compatible = "arm,gic-400";
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reg = <0x0 0xff901000 0x0 0x1000>,
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<0x0 0xff902000 0x0 0x2000>,
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<0x0 0xff904000 0x0 0x2000>,
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<0x0 0xff906000 0x0 0x2000>;
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interrupt-controller;
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interrupts = <GIC_PPI 9
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
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#interrupt-cells = <3>;
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#address-cells = <0>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
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};
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xtal: xtal-clk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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};
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13
arch/arm/dts/meson-gxbb-kii-pro-u-boot.dtsi
Normal file
13
arch/arm/dts/meson-gxbb-kii-pro-u-boot.dtsi
Normal file
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@ -0,0 +1,13 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-gx-u-boot.dtsi"
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ðmac {
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snps,reset-gpio = <&gpio GPIOZ_14 0>;
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snps,reset-delays-us = <0>, <10000>, <1000000>;
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snps,reset-active-low;
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};
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140
arch/arm/dts/meson-gxbb-kii-pro.dts
Normal file
140
arch/arm/dts/meson-gxbb-kii-pro.dts
Normal file
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@ -0,0 +1,140 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Mohammad Rasim <mohammad.rasim96@gmail.com>
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*/
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/dts-v1/;
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#include "meson-gxbb-p20x.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/sound/meson-aiu.h>
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/ {
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compatible = "videostrong,kii-pro", "amlogic,meson-gxbb";
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model = "Videostrong KII Pro";
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spdif_dit: audio-codec-0 {
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#sound-dai-cells = <0>;
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compatible = "linux,spdif-dit";
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status = "okay";
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sound-name-prefix = "DIT";
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};
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leds {
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compatible = "gpio-leds";
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led {
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gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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default-state = "off";
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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button-reset {
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label = "reset";
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linux,code = <KEY_POWER>;
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gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
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};
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};
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sound {
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compatible = "amlogic,gx-sound-card";
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model = "KII-PRO";
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assigned-clocks = <&clkc CLKID_MPLL0>,
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<&clkc CLKID_MPLL1>,
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<&clkc CLKID_MPLL2>;
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assigned-clock-parents = <0>, <0>, <0>;
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assigned-clock-rates = <294912000>,
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<270950400>,
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<393216000>;
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dai-link-0 {
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sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
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};
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dai-link-1 {
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sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
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};
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dai-link-2 {
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sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
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dai-format = "i2s";
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mclk-fs = <256>;
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codec-0 {
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sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
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};
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};
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dai-link-3 {
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sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
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codec-0 {
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sound-dai = <&spdif_dit>;
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};
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};
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dai-link-4 {
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sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
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codec-0 {
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sound-dai = <&hdmi_tx>;
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};
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};
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};
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};
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&aiu {
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status = "okay";
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pinctrl-0 = <&spdif_out_y_pins>;
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pinctrl-names = "default";
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};
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ðmac {
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status = "okay";
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pinctrl-0 = <ð_rmii_pins>;
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pinctrl-names = "default";
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phy-handle = <ð_phy0>;
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phy-mode = "rmii";
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mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
|
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#size-cells = <0>;
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|
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eth_phy0: ethernet-phy@0 {
|
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/* IC Plus IP101GR (0x02430c54) */
|
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reg = <0>;
|
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reset-assert-us = <10000>;
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reset-deassert-us = <10000>;
|
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reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
|
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};
|
||||
};
|
||||
};
|
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|
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&ir {
|
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linux,rc-map-name = "rc-videostrong-kii-pro";
|
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};
|
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|
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&uart_A {
|
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status = "okay";
|
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pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
|
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pinctrl-names = "default";
|
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uart-has-rtscts;
|
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|
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bluetooth {
|
||||
compatible = "brcm,bcm4335a0";
|
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shutdown-gpios = <&gpio GPIOX_20 GPIO_ACTIVE_HIGH>;
|
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host-wakeup-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
|
||||
max-speed = <2000000>;
|
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clocks = <&wifi32k>;
|
||||
clock-names = "lpo";
|
||||
};
|
||||
};
|
||||
20
arch/arm/include/asm/arch-meson/a1.h
Normal file
20
arch/arm/include/asm/arch-meson/a1.h
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* (C) Copyright 2023 SberDevices, Inc.
|
||||
* Author: Igor Prusov <ivprusov@sberdevices.ru>
|
||||
*/
|
||||
|
||||
#ifndef __MESON_A1_H__
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#define __MESON_A1_H__
|
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||||
#define A1_SYSCTRL_BASE 0xfe005800
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||||
|
||||
/* SYSCTRL registers */
|
||||
#define A1_SYSCTRL_ADDR(off) (A1_SYSCTRL_BASE + ((off) << 2))
|
||||
|
||||
#define A1_SYSCTRL_SEC_STATUS_REG4 A1_SYSCTRL_ADDR(0xc4)
|
||||
|
||||
#define A1_SYSCTRL_MEM_SIZE_MASK 0xFFFF0000
|
||||
#define A1_SYSCTRL_MEM_SIZE_SHIFT 16
|
||||
|
||||
#endif /* __MESON_A1_H__ */
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||||
|
|
@ -58,4 +58,34 @@ enum {
|
|||
*/
|
||||
int meson_sm_get_reboot_reason(void);
|
||||
|
||||
#define PWRDM_OFF 0
|
||||
#define PWRDM_ON 1
|
||||
|
||||
/**
|
||||
* meson_sm_pwrdm_set - do command at specified power domain.
|
||||
*
|
||||
* @index: power domain index.
|
||||
* @cmd: command index.
|
||||
* @return: zero on success or error code on failure.
|
||||
*/
|
||||
int meson_sm_pwrdm_set(size_t index, int cmd);
|
||||
|
||||
/**
|
||||
* meson_sm_pwrdm_off - disable specified power domain.
|
||||
*
|
||||
* @index: power domain index.
|
||||
* @return: zero on success or error code on failure.
|
||||
*/
|
||||
#define meson_sm_pwrdm_off(index) \
|
||||
meson_sm_pwrdm_set(index, PWRDM_OFF)
|
||||
|
||||
/**
|
||||
* meson_sm_pwrdm_on - enable specified power domain.
|
||||
*
|
||||
* @index: power domain index.
|
||||
* @return: zero on success or error code on failure.
|
||||
*/
|
||||
#define meson_sm_pwrdm_on(index) \
|
||||
meson_sm_pwrdm_set(index, PWRDM_ON)
|
||||
|
||||
#endif /* __MESON_SM_H__ */
|
||||
|
|
|
|||
|
|
@ -51,6 +51,12 @@ config MESON_G12A
|
|||
help
|
||||
Select this if your SoC is an S905X/D2
|
||||
|
||||
config MESON_A1
|
||||
bool "A1"
|
||||
select MESON64_COMMON
|
||||
help
|
||||
Select this if your SoC is an A113L
|
||||
|
||||
endchoice
|
||||
|
||||
config SYS_SOC
|
||||
|
|
@ -69,6 +75,7 @@ config SYS_VENDOR
|
|||
|
||||
config SYS_BOARD
|
||||
string "Board name"
|
||||
default "ad401" if MESON_A1
|
||||
default "p200" if MESON_GXBB
|
||||
default "p212" if MESON_GXL
|
||||
default "q200" if MESON_GXM
|
||||
|
|
|
|||
|
|
@ -6,3 +6,4 @@ obj-y += board-common.o sm.o board-info.o
|
|||
obj-$(CONFIG_MESON_GX) += board-gx.o
|
||||
obj-$(CONFIG_MESON_AXG) += board-axg.o
|
||||
obj-$(CONFIG_MESON_G12A) += board-g12a.o
|
||||
obj-$(CONFIG_MESON_A1) += board-a1.o
|
||||
|
|
|
|||
59
arch/arm/mach-meson/board-a1.c
Normal file
59
arch/arm/mach-meson/board-a1.c
Normal file
|
|
@ -0,0 +1,59 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2023 SberDevices, Inc.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/a1.h>
|
||||
#include <asm/arch/boot.h>
|
||||
#include <asm/armv8/mmu.h>
|
||||
#include <asm/io.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/sizes.h>
|
||||
|
||||
phys_size_t get_effective_memsize(void)
|
||||
{
|
||||
return ((readl(A1_SYSCTRL_SEC_STATUS_REG4) & A1_SYSCTRL_MEM_SIZE_MASK)
|
||||
>> A1_SYSCTRL_MEM_SIZE_SHIFT) * SZ_1M;
|
||||
}
|
||||
|
||||
void meson_init_reserved_memory(__maybe_unused void *fdt)
|
||||
{
|
||||
}
|
||||
|
||||
int meson_get_boot_device(void)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static struct mm_region a1_mem_map[] = {
|
||||
{
|
||||
.virt = 0x00000000UL,
|
||||
.phys = 0x00000000UL,
|
||||
.size = 0x80000000UL,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE
|
||||
}, {
|
||||
.virt = 0x80000000UL,
|
||||
.phys = 0x80000000UL,
|
||||
.size = 0x7FE00000UL,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/*
|
||||
* This mem region contains in/out shared memory with bl31,
|
||||
* hence it's marked as NORMAL memory type
|
||||
*/
|
||||
.virt = 0xFFE00000UL,
|
||||
.phys = 0xFFE00000UL,
|
||||
.size = 0x00200000UL,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE
|
||||
}, {
|
||||
/* List terminator */
|
||||
0,
|
||||
}
|
||||
};
|
||||
|
||||
struct mm_region *mem_map = a1_mem_map;
|
||||
|
|
@ -24,6 +24,7 @@
|
|||
#define FN_EFUSE_READ 0x82000030
|
||||
#define FN_EFUSE_WRITE 0x82000031
|
||||
#define FN_CHIP_ID 0x82000044
|
||||
#define FN_PWRDM_SET 0x82000093
|
||||
|
||||
static void *shmem_input;
|
||||
static void *shmem_output;
|
||||
|
|
@ -137,3 +138,16 @@ int meson_sm_get_reboot_reason(void)
|
|||
/* The SMC call is not used, we directly use AO_SEC_SD_CFG15 */
|
||||
return FIELD_GET(REBOOT_REASON_MASK, reason);
|
||||
}
|
||||
|
||||
int meson_sm_pwrdm_set(size_t index, int cmd)
|
||||
{
|
||||
struct pt_regs regs;
|
||||
|
||||
regs.regs[0] = FN_PWRDM_SET;
|
||||
regs.regs[1] = index;
|
||||
regs.regs[2] = cmd;
|
||||
|
||||
smc_call(®s);
|
||||
|
||||
return regs.regs[0];
|
||||
}
|
||||
|
|
|
|||
6
board/amlogic/ad401/MAINTAINERS
Normal file
6
board/amlogic/ad401/MAINTAINERS
Normal file
|
|
@ -0,0 +1,6 @@
|
|||
AD401
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
S: Maintained
|
||||
L: u-boot-amlogic@groups.io
|
||||
F: board/amlogic/ad401/
|
||||
F: configs/ad401_defconfig
|
||||
4
board/amlogic/ad401/Makefile
Normal file
4
board/amlogic/ad401/Makefile
Normal file
|
|
@ -0,0 +1,4 @@
|
|||
# SPDX-License-Identifier: GPL-2.0+
|
||||
# (C) Copyright 2023 SberDevices, Inc.
|
||||
|
||||
obj-y := ad401.o
|
||||
15
board/amlogic/ad401/ad401.c
Normal file
15
board/amlogic/ad401/ad401.c
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* (C) Copyright 2023 SberDevices, Inc.
|
||||
* Author: Igor Prusov <ivprusov@sberdevices.ru>
|
||||
*/
|
||||
|
||||
#include <init.h>
|
||||
#include <asm/arch/eth.h>
|
||||
|
||||
int misc_init_r(void)
|
||||
{
|
||||
meson_generate_serial_ethaddr();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -9,8 +9,10 @@ F: configs/odroid-c2_defconfig
|
|||
F: configs/p200_defconfig
|
||||
F: configs/wetek-hub_defconfig
|
||||
F: configs/wetek-play2_defconfig
|
||||
F: configs/videostrong-kii-pro_defconfig
|
||||
F: doc/board/amlogic/p200.rst
|
||||
F: doc/board/amlogic/nanopi-k2.rst
|
||||
F: doc/board/amlogic/odroid-c2.rst
|
||||
F: doc/board/amlogic/videostrong-kii-pro.rst
|
||||
F: doc/board/amlogic/wetek-hub.rst
|
||||
F: doc/board/amlogic/wetek-play2.rst
|
||||
|
|
|
|||
54
configs/ad401_defconfig
Normal file
54
configs/ad401_defconfig
Normal file
|
|
@ -0,0 +1,54 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_MESON=y
|
||||
CONFIG_TEXT_BASE=0x00000000
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x00200000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="meson-a1-ad401"
|
||||
CONFIG_SYS_PROMPT="ad401 # "
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_MESON_A1=y
|
||||
CONFIG_DEBUG_UART_BASE=0xfe001c00
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_SYS_LOAD_ADDR=0x0
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_SIGNATURE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_BOOTCOMMAND="run storeboot"
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
# CONFIG_CMD_BDI is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_CMD_UBI=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_ADC=y
|
||||
CONFIG_SARADC_MESON=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_MESON=y
|
||||
CONFIG_LED=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_A1=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_PWM=y
|
||||
CONFIG_PWM_MESON=y
|
||||
CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
CONFIG_MESON_SERIAL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_WDT=y
|
||||
70
configs/videostrong-kii-pro_defconfig
Normal file
70
configs/videostrong-kii-pro_defconfig
Normal file
|
|
@ -0,0 +1,70 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_MESON=y
|
||||
CONFIG_TEXT_BASE=0x01000000
|
||||
CONFIG_SYS_LOAD_ADDR=0x1000000
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_ENV_SIZE=0x2000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DEBUG_UART_BASE=0xc81004c0
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_IDENT_STRING=" kii-pro"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-kii-pro"
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_MISC_INIT_R=y
|
||||
# CONFIG_CMD_BDI is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
CONFIG_CMD_ADC=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_I2C=y
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SARADC_MESON=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_MESON=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_MESON_GX=y
|
||||
CONFIG_PHY_REALTEK=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_ETH_DESIGNWARE_MESON8B=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_MESON_GXBB_USB_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_MESON_GXBB=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_MESON_EE_POWER_DOMAIN=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
CONFIG_MESON_SERIAL=y
|
||||
CONFIG_SYSINFO=y
|
||||
CONFIG_SYSINFO_SMBIOS=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_USB_DWC2=y
|
||||
CONFIG_USB_KEYBOARD=y
|
||||
CONFIG_VIDEO=y
|
||||
# CONFIG_VIDEO_BPP8 is not set
|
||||
# CONFIG_VIDEO_BPP16 is not set
|
||||
CONFIG_SYS_WHITE_ON_BLACK=y
|
||||
CONFIG_VIDEO_MESON=y
|
||||
CONFIG_VIDEO_DT_SIMPLEFB=y
|
||||
CONFIG_SPLASH_SCREEN=y
|
||||
CONFIG_SPLASH_SCREEN_ALIGN=y
|
||||
CONFIG_VIDEO_BMP_RLE8=y
|
||||
CONFIG_BMP_16BPP=y
|
||||
CONFIG_BMP_24BPP=y
|
||||
CONFIG_BMP_32BPP=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
|
@ -118,6 +118,7 @@ Board Documentation
|
|||
sei610
|
||||
s400
|
||||
u200
|
||||
videostrong-kii-pro
|
||||
wetek-core2
|
||||
wetek-hub
|
||||
wetek-play2
|
||||
|
|
|
|||
112
doc/board/amlogic/videostrong-kii-pro.rst
Normal file
112
doc/board/amlogic/videostrong-kii-pro.rst
Normal file
|
|
@ -0,0 +1,112 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
U-Boot for Videostrong KII Pro (S905)
|
||||
=====================================
|
||||
|
||||
Videostrong KII Pro is an Android STB manufactured by Videostrong and
|
||||
based on the Amlogic p201 reference board, with the following specification:
|
||||
|
||||
- Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
|
||||
- ARM Mali 450 GPU
|
||||
- 2GB DDR3 SDRAM
|
||||
- 16GB eMMC
|
||||
- Gigabit Ethernet
|
||||
- Boardcom BCM4335 WiFi and BT 4.0
|
||||
- HDMI 2.0 4K/60Hz display
|
||||
- 3x USB 2.0 host
|
||||
- 1x USB 2.0 otg
|
||||
- microSD
|
||||
- Infrared receiver
|
||||
- Blue LED
|
||||
- Red LED
|
||||
- Power button (case, front)
|
||||
- Reset button (underside)
|
||||
- DVB Card: DVB-S and DVB-T/C
|
||||
|
||||
Schematics are not publicly available.
|
||||
|
||||
U-Boot Compilation
|
||||
------------------
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ export CROSS_COMPILE=aarch64-none-elf-
|
||||
$ make videostrong-kii-pro_defconfig
|
||||
$ make
|
||||
|
||||
U-Boot Signing with Pre-Built FIP repo
|
||||
--------------------------------------
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
|
||||
$ cd amlogic-boot-fip
|
||||
$ mkdir my-output-dir
|
||||
$ ./build-fip.sh wetek-play2 /path/to/u-boot/u-boot.bin my-output-dir
|
||||
|
||||
U-Boot Manual Signing
|
||||
---------------------
|
||||
|
||||
Amlogic does not provide sources for the firmware and tools needed to create
|
||||
a bootloader image and Videostrong has not publicly shared the U-Boot sources
|
||||
needed to build FIP binaries for signing. However you can use the WeTek
|
||||
Play2 binaries from the amlogic-boot-fip repo as the WeTek Play2 and the
|
||||
Videostrong KII Pro share the same RAM chips.
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
|
||||
$ cd amlogic-boot-fip/wetek-play2
|
||||
$ export FIPDIR=$PWD
|
||||
|
||||
Go back to the mainline U-Boot source tree then:
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ mkdir fip
|
||||
$ cp $FIPDIR/bl2.bin fip/
|
||||
$ cp $FIPDIR/acs.bin fip/
|
||||
$ cp $FIPDIR/bl21.bin fip/
|
||||
$ cp $FIPDIR/bl30.bin fip/
|
||||
$ cp $FIPDIR/bl301.bin fip/
|
||||
$ cp $FIPDIR/bl31.img fip/
|
||||
$ cp u-boot.bin fip/bl33.bin
|
||||
$ $FIPDIR/blx_fix.sh \
|
||||
fip/bl30.bin \
|
||||
fip/zero_tmp \
|
||||
fip/bl30_zero.bin \
|
||||
fip/bl301.bin \
|
||||
fip/bl301_zero.bin \
|
||||
fip/bl30_new.bin \
|
||||
bl30
|
||||
$ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \
|
||||
--bl31 fip/bl31.img \
|
||||
--bl33 fip/bl33.bin \
|
||||
fip/fip.bin
|
||||
$ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin
|
||||
$ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
|
||||
$ $FIPDIR/blx_fix.sh \
|
||||
fip/bl2_acs.bin \
|
||||
fip/zero_tmp \
|
||||
fip/bl2_zero.bin \
|
||||
fip/bl21.bin \
|
||||
fip/bl21_zero.bin \
|
||||
fip/bl2_new.bin \
|
||||
bl2
|
||||
$ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
|
||||
$ $FIPDIR/aml_encrypt_gxb --bootsig \
|
||||
--input fip/boot_new.bin
|
||||
--output fip/u-boot.bin
|
||||
|
||||
Then write U-Boot to SD or eMMC with:
|
||||
|
||||
.. code-block:: bash
|
||||
|
||||
$ DEV=/dev/boot_device
|
||||
$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync
|
||||
$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc
|
||||
$ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc
|
||||
$ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc
|
||||
$ ./aml_chksum fip/u-boot.bin.gxbb
|
||||
$ dd if=fip/u-boot.bin.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
|
||||
$ dd if=fip/u-boot.bin.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440
|
||||
|
|
@ -29,4 +29,8 @@ config PINCTRL_MESON_G12A
|
|||
bool "Amlogic Meson G12a SoC pinctrl driver"
|
||||
select PINCTRL_MESON_AXG_PMX
|
||||
|
||||
config PINCTRL_MESON_A1
|
||||
bool "Amlogic Meson A1 SoC pinctrl driver"
|
||||
select PINCTRL_MESON_AXG_PMX
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -7,3 +7,4 @@ obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o
|
|||
obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_AXG) += pinctrl-meson-axg.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_G12A) += pinctrl-meson-g12a.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_A1) += pinctrl-meson-a1.o
|
||||
|
|
|
|||
867
drivers/pinctrl/meson/pinctrl-meson-a1.c
Normal file
867
drivers/pinctrl/meson/pinctrl-meson-a1.c
Normal file
|
|
@ -0,0 +1,867 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
|
||||
* Author: Qianggui Song <qianggui.song@amlogic.com>
|
||||
* Copyright (C) 2023 SberDevices, Inc.
|
||||
* Author: Igor Prusov <ivprusov@sberdevices.ru>
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <dm/pinctrl.h>
|
||||
#include <dt-bindings/gpio/meson-a1-gpio.h>
|
||||
|
||||
#include "pinctrl-meson.h"
|
||||
#include "pinctrl-meson-axg.h"
|
||||
|
||||
/* psram */
|
||||
static const unsigned int psram_clkn_pins[] = { GPIOP_0 };
|
||||
static const unsigned int psram_clkp_pins[] = { GPIOP_1 };
|
||||
static const unsigned int psram_ce_n_pins[] = { GPIOP_2 };
|
||||
static const unsigned int psram_rst_n_pins[] = { GPIOP_3 };
|
||||
static const unsigned int psram_adq0_pins[] = { GPIOP_4 };
|
||||
static const unsigned int psram_adq1_pins[] = { GPIOP_5 };
|
||||
static const unsigned int psram_adq2_pins[] = { GPIOP_6 };
|
||||
static const unsigned int psram_adq3_pins[] = { GPIOP_7 };
|
||||
static const unsigned int psram_adq4_pins[] = { GPIOP_8 };
|
||||
static const unsigned int psram_adq5_pins[] = { GPIOP_9 };
|
||||
static const unsigned int psram_adq6_pins[] = { GPIOP_10 };
|
||||
static const unsigned int psram_adq7_pins[] = { GPIOP_11 };
|
||||
static const unsigned int psram_dqs_dm_pins[] = { GPIOP_12 };
|
||||
|
||||
/* sdcard */
|
||||
static const unsigned int sdcard_d0_b_pins[] = { GPIOB_0 };
|
||||
static const unsigned int sdcard_d1_b_pins[] = { GPIOB_1 };
|
||||
static const unsigned int sdcard_d2_b_pins[] = { GPIOB_2 };
|
||||
static const unsigned int sdcard_d3_b_pins[] = { GPIOB_3 };
|
||||
static const unsigned int sdcard_clk_b_pins[] = { GPIOB_4 };
|
||||
static const unsigned int sdcard_cmd_b_pins[] = { GPIOB_5 };
|
||||
|
||||
static const unsigned int sdcard_d0_x_pins[] = { GPIOX_0 };
|
||||
static const unsigned int sdcard_d1_x_pins[] = { GPIOX_1 };
|
||||
static const unsigned int sdcard_d2_x_pins[] = { GPIOX_2 };
|
||||
static const unsigned int sdcard_d3_x_pins[] = { GPIOX_3 };
|
||||
static const unsigned int sdcard_clk_x_pins[] = { GPIOX_4 };
|
||||
static const unsigned int sdcard_cmd_x_pins[] = { GPIOX_5 };
|
||||
|
||||
/* spif */
|
||||
static const unsigned int spif_mo_pins[] = { GPIOB_0 };
|
||||
static const unsigned int spif_mi_pins[] = { GPIOB_1 };
|
||||
static const unsigned int spif_wp_n_pins[] = { GPIOB_2 };
|
||||
static const unsigned int spif_hold_n_pins[] = { GPIOB_3 };
|
||||
static const unsigned int spif_clk_pins[] = { GPIOB_4 };
|
||||
static const unsigned int spif_cs_pins[] = { GPIOB_5 };
|
||||
|
||||
/* i2c0 */
|
||||
static const unsigned int i2c0_sck_f9_pins[] = { GPIOF_9 };
|
||||
static const unsigned int i2c0_sda_f10_pins[] = { GPIOF_10 };
|
||||
static const unsigned int i2c0_sck_f11_pins[] = { GPIOF_11 };
|
||||
static const unsigned int i2c0_sda_f12_pins[] = { GPIOF_12 };
|
||||
|
||||
/* i2c1 */
|
||||
static const unsigned int i2c1_sda_x_pins[] = { GPIOX_9 };
|
||||
static const unsigned int i2c1_sck_x_pins[] = { GPIOX_10 };
|
||||
static const unsigned int i2c1_sda_a_pins[] = { GPIOA_10 };
|
||||
static const unsigned int i2c1_sck_a_pins[] = { GPIOA_11 };
|
||||
|
||||
/* i2c2 */
|
||||
static const unsigned int i2c2_sck_x0_pins[] = { GPIOX_0 };
|
||||
static const unsigned int i2c2_sda_x1_pins[] = { GPIOX_1 };
|
||||
static const unsigned int i2c2_sck_x15_pins[] = { GPIOX_15 };
|
||||
static const unsigned int i2c2_sda_x16_pins[] = { GPIOX_16 };
|
||||
static const unsigned int i2c2_sck_a4_pins[] = { GPIOA_4 };
|
||||
static const unsigned int i2c2_sda_a5_pins[] = { GPIOA_5 };
|
||||
static const unsigned int i2c2_sck_a8_pins[] = { GPIOA_8 };
|
||||
static const unsigned int i2c2_sda_a9_pins[] = { GPIOA_9 };
|
||||
|
||||
/* i2c3 */
|
||||
static const unsigned int i2c3_sck_f_pins[] = { GPIOF_4 };
|
||||
static const unsigned int i2c3_sda_f_pins[] = { GPIOF_5 };
|
||||
static const unsigned int i2c3_sck_x_pins[] = { GPIOX_11 };
|
||||
static const unsigned int i2c3_sda_x_pins[] = { GPIOX_12 };
|
||||
|
||||
/* i2c slave */
|
||||
static const unsigned int i2c_slave_sck_a_pins[] = { GPIOA_10 };
|
||||
static const unsigned int i2c_slave_sda_a_pins[] = { GPIOA_11 };
|
||||
static const unsigned int i2c_slave_sck_f_pins[] = { GPIOF_11 };
|
||||
static const unsigned int i2c_slave_sda_f_pins[] = { GPIOF_12 };
|
||||
|
||||
/* uart_a */
|
||||
static const unsigned int uart_a_tx_pins[] = { GPIOX_11 };
|
||||
static const unsigned int uart_a_rx_pins[] = { GPIOX_12 };
|
||||
static const unsigned int uart_a_cts_pins[] = { GPIOX_13 };
|
||||
static const unsigned int uart_a_rts_pins[] = { GPIOX_14 };
|
||||
|
||||
/* uart_b */
|
||||
static const unsigned int uart_b_tx_x_pins[] = { GPIOX_7 };
|
||||
static const unsigned int uart_b_rx_x_pins[] = { GPIOX_8 };
|
||||
static const unsigned int uart_b_tx_f_pins[] = { GPIOF_0 };
|
||||
static const unsigned int uart_b_rx_f_pins[] = { GPIOF_1 };
|
||||
|
||||
/* uart_c */
|
||||
static const unsigned int uart_c_tx_x0_pins[] = { GPIOX_0 };
|
||||
static const unsigned int uart_c_rx_x1_pins[] = { GPIOX_1 };
|
||||
static const unsigned int uart_c_cts_pins[] = { GPIOX_2 };
|
||||
static const unsigned int uart_c_rts_pins[] = { GPIOX_3 };
|
||||
static const unsigned int uart_c_tx_x15_pins[] = { GPIOX_15 };
|
||||
static const unsigned int uart_c_rx_x16_pins[] = { GPIOX_16 };
|
||||
|
||||
/* pmw_a */
|
||||
static const unsigned int pwm_a_x6_pins[] = { GPIOX_6 };
|
||||
static const unsigned int pwm_a_x7_pins[] = { GPIOX_7 };
|
||||
static const unsigned int pwm_a_f6_pins[] = { GPIOF_6 };
|
||||
static const unsigned int pwm_a_f10_pins[] = { GPIOF_10 };
|
||||
static const unsigned int pwm_a_a_pins[] = { GPIOA_5 };
|
||||
|
||||
/* pmw_b */
|
||||
static const unsigned int pwm_b_x_pins[] = { GPIOX_8 };
|
||||
static const unsigned int pwm_b_f_pins[] = { GPIOF_7 };
|
||||
static const unsigned int pwm_b_a_pins[] = { GPIOA_11 };
|
||||
|
||||
/* pmw_c */
|
||||
static const unsigned int pwm_c_x_pins[] = { GPIOX_9 };
|
||||
static const unsigned int pwm_c_f3_pins[] = { GPIOF_3 };
|
||||
static const unsigned int pwm_c_f8_pins[] = { GPIOF_8 };
|
||||
static const unsigned int pwm_c_a_pins[] = { GPIOA_10 };
|
||||
|
||||
/* pwm_d */
|
||||
static const unsigned int pwm_d_x10_pins[] = { GPIOX_10 };
|
||||
static const unsigned int pwm_d_x13_pins[] = { GPIOX_13 };
|
||||
static const unsigned int pwm_d_x15_pins[] = { GPIOX_15 };
|
||||
static const unsigned int pwm_d_f_pins[] = { GPIOF_11 };
|
||||
|
||||
/* pwm_e */
|
||||
static const unsigned int pwm_e_p_pins[] = { GPIOP_3 };
|
||||
static const unsigned int pwm_e_x2_pins[] = { GPIOX_2 };
|
||||
static const unsigned int pwm_e_x14_pins[] = { GPIOX_14 };
|
||||
static const unsigned int pwm_e_x16_pins[] = { GPIOX_16 };
|
||||
static const unsigned int pwm_e_f_pins[] = { GPIOF_3 };
|
||||
static const unsigned int pwm_e_a_pins[] = { GPIOA_0 };
|
||||
|
||||
/* pwm_f */
|
||||
static const unsigned int pwm_f_b_pins[] = { GPIOB_6 };
|
||||
static const unsigned int pwm_f_x_pins[] = { GPIOX_3 };
|
||||
static const unsigned int pwm_f_f4_pins[] = { GPIOF_4 };
|
||||
static const unsigned int pwm_f_f12_pins[] = { GPIOF_12 };
|
||||
|
||||
/* pwm_a_hiz */
|
||||
static const unsigned int pwm_a_hiz_f8_pins[] = { GPIOF_8 };
|
||||
static const unsigned int pwm_a_hiz_f10_pins[] = { GPIOF_10 };
|
||||
static const unsigned int pmw_a_hiz_f6_pins[] = { GPIOF_6 };
|
||||
|
||||
/* pwm_b_hiz */
|
||||
static const unsigned int pwm_b_hiz_pins[] = { GPIOF_7 };
|
||||
|
||||
/* pmw_c_hiz */
|
||||
static const unsigned int pwm_c_hiz_pins[] = { GPIOF_8 };
|
||||
|
||||
/* tdm_a */
|
||||
static const unsigned int tdm_a_dout1_pins[] = { GPIOX_7 };
|
||||
static const unsigned int tdm_a_dout0_pins[] = { GPIOX_8 };
|
||||
static const unsigned int tdm_a_fs_pins[] = { GPIOX_9 };
|
||||
static const unsigned int tdm_a_sclk_pins[] = { GPIOX_10 };
|
||||
static const unsigned int tdm_a_din1_pins[] = { GPIOX_7 };
|
||||
static const unsigned int tdm_a_din0_pins[] = { GPIOX_8 };
|
||||
static const unsigned int tdm_a_slv_fs_pins[] = { GPIOX_9 };
|
||||
static const unsigned int tdm_a_slv_sclk_pins[] = { GPIOX_10 };
|
||||
|
||||
/* spi_a */
|
||||
static const unsigned int spi_a_mosi_x2_pins[] = { GPIOX_2 };
|
||||
static const unsigned int spi_a_ss0_x3_pins[] = { GPIOX_3 };
|
||||
static const unsigned int spi_a_sclk_x4_pins[] = { GPIOX_4 };
|
||||
static const unsigned int spi_a_miso_x5_pins[] = { GPIOX_5 };
|
||||
static const unsigned int spi_a_mosi_x7_pins[] = { GPIOX_7 };
|
||||
static const unsigned int spi_a_miso_x8_pins[] = { GPIOX_8 };
|
||||
static const unsigned int spi_a_ss0_x9_pins[] = { GPIOX_9 };
|
||||
static const unsigned int spi_a_sclk_x10_pins[] = { GPIOX_10 };
|
||||
|
||||
static const unsigned int spi_a_mosi_a_pins[] = { GPIOA_6 };
|
||||
static const unsigned int spi_a_miso_a_pins[] = { GPIOA_7 };
|
||||
static const unsigned int spi_a_ss0_a_pins[] = { GPIOA_8 };
|
||||
static const unsigned int spi_a_sclk_a_pins[] = { GPIOA_9 };
|
||||
|
||||
/* pdm */
|
||||
static const unsigned int pdm_din0_x_pins[] = { GPIOX_7 };
|
||||
static const unsigned int pdm_din1_x_pins[] = { GPIOX_8 };
|
||||
static const unsigned int pdm_din2_x_pins[] = { GPIOX_9 };
|
||||
static const unsigned int pdm_dclk_x_pins[] = { GPIOX_10 };
|
||||
|
||||
static const unsigned int pdm_din2_a_pins[] = { GPIOA_6 };
|
||||
static const unsigned int pdm_din1_a_pins[] = { GPIOA_7 };
|
||||
static const unsigned int pdm_din0_a_pins[] = { GPIOA_8 };
|
||||
static const unsigned int pdm_dclk_pins[] = { GPIOA_9 };
|
||||
|
||||
/* gen_clk */
|
||||
static const unsigned int gen_clk_x_pins[] = { GPIOX_7 };
|
||||
static const unsigned int gen_clk_f8_pins[] = { GPIOF_8 };
|
||||
static const unsigned int gen_clk_f10_pins[] = { GPIOF_10 };
|
||||
static const unsigned int gen_clk_a_pins[] = { GPIOA_11 };
|
||||
|
||||
/* jtag_a */
|
||||
static const unsigned int jtag_a_clk_pins[] = { GPIOF_4 };
|
||||
static const unsigned int jtag_a_tms_pins[] = { GPIOF_5 };
|
||||
static const unsigned int jtag_a_tdi_pins[] = { GPIOF_6 };
|
||||
static const unsigned int jtag_a_tdo_pins[] = { GPIOF_7 };
|
||||
|
||||
/* clk_32_in */
|
||||
static const unsigned int clk_32k_in_pins[] = { GPIOF_2 };
|
||||
|
||||
/* ir in */
|
||||
static const unsigned int remote_input_f_pins[] = { GPIOF_3 };
|
||||
static const unsigned int remote_input_a_pins[] = { GPIOA_11 };
|
||||
|
||||
/* ir out */
|
||||
static const unsigned int remote_out_pins[] = { GPIOF_5 };
|
||||
|
||||
/* spdif */
|
||||
static const unsigned int spdif_in_f6_pins[] = { GPIOF_6 };
|
||||
static const unsigned int spdif_in_f7_pins[] = { GPIOF_7 };
|
||||
|
||||
/* sw */
|
||||
static const unsigned int swclk_pins[] = { GPIOF_4 };
|
||||
static const unsigned int swdio_pins[] = { GPIOF_5 };
|
||||
|
||||
/* clk_25 */
|
||||
static const unsigned int clk25_pins[] = { GPIOF_10 };
|
||||
|
||||
/* cec_a */
|
||||
static const unsigned int cec_a_pins[] = { GPIOF_2 };
|
||||
|
||||
/* cec_b */
|
||||
static const unsigned int cec_b_pins[] = { GPIOF_2 };
|
||||
|
||||
/* clk12_24 */
|
||||
static const unsigned int clk12_24_pins[] = { GPIOF_10 };
|
||||
|
||||
/* mclk_0 */
|
||||
static const unsigned int mclk_0_pins[] = { GPIOA_0 };
|
||||
|
||||
/* tdm_b */
|
||||
static const unsigned int tdm_b_sclk_pins[] = { GPIOA_1 };
|
||||
static const unsigned int tdm_b_fs_pins[] = { GPIOA_2 };
|
||||
static const unsigned int tdm_b_dout0_pins[] = { GPIOA_3 };
|
||||
static const unsigned int tdm_b_dout1_pins[] = { GPIOA_4 };
|
||||
static const unsigned int tdm_b_dout2_pins[] = { GPIOA_5 };
|
||||
static const unsigned int tdm_b_dout3_pins[] = { GPIOA_6 };
|
||||
static const unsigned int tdm_b_dout4_pins[] = { GPIOA_7 };
|
||||
static const unsigned int tdm_b_dout5_pins[] = { GPIOA_8 };
|
||||
static const unsigned int tdm_b_slv_sclk_pins[] = { GPIOA_5 };
|
||||
static const unsigned int tdm_b_slv_fs_pins[] = { GPIOA_6 };
|
||||
static const unsigned int tdm_b_din0_pins[] = { GPIOA_7 };
|
||||
static const unsigned int tdm_b_din1_pins[] = { GPIOA_8 };
|
||||
static const unsigned int tdm_b_din2_pins[] = { GPIOA_9 };
|
||||
|
||||
/* mclk_vad */
|
||||
static const unsigned int mclk_vad_pins[] = { GPIOA_0 };
|
||||
|
||||
/* tdm_vad */
|
||||
static const unsigned int tdm_vad_sclk_a1_pins[] = { GPIOA_1 };
|
||||
static const unsigned int tdm_vad_fs_a2_pins[] = { GPIOA_2 };
|
||||
static const unsigned int tdm_vad_sclk_a5_pins[] = { GPIOA_5 };
|
||||
static const unsigned int tdm_vad_fs_a6_pins[] = { GPIOA_6 };
|
||||
|
||||
/* tst_out */
|
||||
static const unsigned int tst_out0_pins[] = { GPIOA_0 };
|
||||
static const unsigned int tst_out1_pins[] = { GPIOA_1 };
|
||||
static const unsigned int tst_out2_pins[] = { GPIOA_2 };
|
||||
static const unsigned int tst_out3_pins[] = { GPIOA_3 };
|
||||
static const unsigned int tst_out4_pins[] = { GPIOA_4 };
|
||||
static const unsigned int tst_out5_pins[] = { GPIOA_5 };
|
||||
static const unsigned int tst_out6_pins[] = { GPIOA_6 };
|
||||
static const unsigned int tst_out7_pins[] = { GPIOA_7 };
|
||||
static const unsigned int tst_out8_pins[] = { GPIOA_8 };
|
||||
static const unsigned int tst_out9_pins[] = { GPIOA_9 };
|
||||
static const unsigned int tst_out10_pins[] = { GPIOA_10 };
|
||||
static const unsigned int tst_out11_pins[] = { GPIOA_11 };
|
||||
|
||||
/* mute */
|
||||
static const unsigned int mute_key_pins[] = { GPIOA_4 };
|
||||
static const unsigned int mute_en_pins[] = { GPIOA_5 };
|
||||
|
||||
static struct meson_pmx_group meson_a1_periphs_groups[] = {
|
||||
GPIO_GROUP(GPIOP_0, 0),
|
||||
GPIO_GROUP(GPIOP_1, 0),
|
||||
GPIO_GROUP(GPIOP_2, 0),
|
||||
GPIO_GROUP(GPIOP_3, 0),
|
||||
GPIO_GROUP(GPIOP_4, 0),
|
||||
GPIO_GROUP(GPIOP_5, 0),
|
||||
GPIO_GROUP(GPIOP_6, 0),
|
||||
GPIO_GROUP(GPIOP_7, 0),
|
||||
GPIO_GROUP(GPIOP_8, 0),
|
||||
GPIO_GROUP(GPIOP_9, 0),
|
||||
GPIO_GROUP(GPIOP_10, 0),
|
||||
GPIO_GROUP(GPIOP_11, 0),
|
||||
GPIO_GROUP(GPIOP_12, 0),
|
||||
GPIO_GROUP(GPIOB_0, 0),
|
||||
GPIO_GROUP(GPIOB_1, 0),
|
||||
GPIO_GROUP(GPIOB_2, 0),
|
||||
GPIO_GROUP(GPIOB_3, 0),
|
||||
GPIO_GROUP(GPIOB_4, 0),
|
||||
GPIO_GROUP(GPIOB_5, 0),
|
||||
GPIO_GROUP(GPIOB_6, 0),
|
||||
GPIO_GROUP(GPIOX_0, 0),
|
||||
GPIO_GROUP(GPIOX_1, 0),
|
||||
GPIO_GROUP(GPIOX_2, 0),
|
||||
GPIO_GROUP(GPIOX_3, 0),
|
||||
GPIO_GROUP(GPIOX_4, 0),
|
||||
GPIO_GROUP(GPIOX_5, 0),
|
||||
GPIO_GROUP(GPIOX_6, 0),
|
||||
GPIO_GROUP(GPIOX_7, 0),
|
||||
GPIO_GROUP(GPIOX_8, 0),
|
||||
GPIO_GROUP(GPIOX_9, 0),
|
||||
GPIO_GROUP(GPIOX_10, 0),
|
||||
GPIO_GROUP(GPIOX_11, 0),
|
||||
GPIO_GROUP(GPIOX_12, 0),
|
||||
GPIO_GROUP(GPIOX_13, 0),
|
||||
GPIO_GROUP(GPIOX_14, 0),
|
||||
GPIO_GROUP(GPIOX_15, 0),
|
||||
GPIO_GROUP(GPIOX_16, 0),
|
||||
GPIO_GROUP(GPIOF_0, 0),
|
||||
GPIO_GROUP(GPIOF_1, 0),
|
||||
GPIO_GROUP(GPIOF_2, 0),
|
||||
GPIO_GROUP(GPIOF_3, 0),
|
||||
GPIO_GROUP(GPIOF_4, 0),
|
||||
GPIO_GROUP(GPIOF_5, 0),
|
||||
GPIO_GROUP(GPIOF_6, 0),
|
||||
GPIO_GROUP(GPIOF_7, 0),
|
||||
GPIO_GROUP(GPIOF_8, 0),
|
||||
GPIO_GROUP(GPIOF_9, 0),
|
||||
GPIO_GROUP(GPIOF_10, 0),
|
||||
GPIO_GROUP(GPIOF_11, 0),
|
||||
GPIO_GROUP(GPIOF_12, 0),
|
||||
GPIO_GROUP(GPIOA_0, 0),
|
||||
GPIO_GROUP(GPIOA_1, 0),
|
||||
GPIO_GROUP(GPIOA_2, 0),
|
||||
GPIO_GROUP(GPIOA_3, 0),
|
||||
GPIO_GROUP(GPIOA_4, 0),
|
||||
GPIO_GROUP(GPIOA_5, 0),
|
||||
GPIO_GROUP(GPIOA_6, 0),
|
||||
GPIO_GROUP(GPIOA_7, 0),
|
||||
GPIO_GROUP(GPIOA_8, 0),
|
||||
GPIO_GROUP(GPIOA_9, 0),
|
||||
GPIO_GROUP(GPIOA_10, 0),
|
||||
GPIO_GROUP(GPIOA_11, 0),
|
||||
|
||||
/* bank P func1 */
|
||||
GROUP(psram_clkn, 1),
|
||||
GROUP(psram_clkp, 1),
|
||||
GROUP(psram_ce_n, 1),
|
||||
GROUP(psram_rst_n, 1),
|
||||
GROUP(psram_adq0, 1),
|
||||
GROUP(psram_adq1, 1),
|
||||
GROUP(psram_adq2, 1),
|
||||
GROUP(psram_adq3, 1),
|
||||
GROUP(psram_adq4, 1),
|
||||
GROUP(psram_adq5, 1),
|
||||
GROUP(psram_adq6, 1),
|
||||
GROUP(psram_adq7, 1),
|
||||
GROUP(psram_dqs_dm, 1),
|
||||
|
||||
/* bank P func2 */
|
||||
GROUP(pwm_e_p, 2),
|
||||
|
||||
/* bank B func1 */
|
||||
GROUP(spif_mo, 1),
|
||||
GROUP(spif_mi, 1),
|
||||
GROUP(spif_wp_n, 1),
|
||||
GROUP(spif_hold_n, 1),
|
||||
GROUP(spif_clk, 1),
|
||||
GROUP(spif_cs, 1),
|
||||
GROUP(pwm_f_b, 1),
|
||||
|
||||
/* bank B func2 */
|
||||
GROUP(sdcard_d0_b, 2),
|
||||
GROUP(sdcard_d1_b, 2),
|
||||
GROUP(sdcard_d2_b, 2),
|
||||
GROUP(sdcard_d3_b, 2),
|
||||
GROUP(sdcard_clk_b, 2),
|
||||
GROUP(sdcard_cmd_b, 2),
|
||||
|
||||
/* bank X func1 */
|
||||
GROUP(sdcard_d0_x, 1),
|
||||
GROUP(sdcard_d1_x, 1),
|
||||
GROUP(sdcard_d2_x, 1),
|
||||
GROUP(sdcard_d3_x, 1),
|
||||
GROUP(sdcard_clk_x, 1),
|
||||
GROUP(sdcard_cmd_x, 1),
|
||||
GROUP(pwm_a_x6, 1),
|
||||
GROUP(tdm_a_dout1, 1),
|
||||
GROUP(tdm_a_dout0, 1),
|
||||
GROUP(tdm_a_fs, 1),
|
||||
GROUP(tdm_a_sclk, 1),
|
||||
GROUP(uart_a_tx, 1),
|
||||
GROUP(uart_a_rx, 1),
|
||||
GROUP(uart_a_cts, 1),
|
||||
GROUP(uart_a_rts, 1),
|
||||
GROUP(pwm_d_x15, 1),
|
||||
GROUP(pwm_e_x16, 1),
|
||||
|
||||
/* bank X func2 */
|
||||
GROUP(i2c2_sck_x0, 2),
|
||||
GROUP(i2c2_sda_x1, 2),
|
||||
GROUP(spi_a_mosi_x2, 2),
|
||||
GROUP(spi_a_ss0_x3, 2),
|
||||
GROUP(spi_a_sclk_x4, 2),
|
||||
GROUP(spi_a_miso_x5, 2),
|
||||
GROUP(tdm_a_din1, 2),
|
||||
GROUP(tdm_a_din0, 2),
|
||||
GROUP(tdm_a_slv_fs, 2),
|
||||
GROUP(tdm_a_slv_sclk, 2),
|
||||
GROUP(i2c3_sck_x, 2),
|
||||
GROUP(i2c3_sda_x, 2),
|
||||
GROUP(pwm_d_x13, 2),
|
||||
GROUP(pwm_e_x14, 2),
|
||||
GROUP(i2c2_sck_x15, 2),
|
||||
GROUP(i2c2_sda_x16, 2),
|
||||
|
||||
/* bank X func3 */
|
||||
GROUP(uart_c_tx_x0, 3),
|
||||
GROUP(uart_c_rx_x1, 3),
|
||||
GROUP(uart_c_cts, 3),
|
||||
GROUP(uart_c_rts, 3),
|
||||
GROUP(pdm_din0_x, 3),
|
||||
GROUP(pdm_din1_x, 3),
|
||||
GROUP(pdm_din2_x, 3),
|
||||
GROUP(pdm_dclk_x, 3),
|
||||
GROUP(uart_c_tx_x15, 3),
|
||||
GROUP(uart_c_rx_x16, 3),
|
||||
|
||||
/* bank X func4 */
|
||||
GROUP(pwm_e_x2, 4),
|
||||
GROUP(pwm_f_x, 4),
|
||||
GROUP(spi_a_mosi_x7, 4),
|
||||
GROUP(spi_a_miso_x8, 4),
|
||||
GROUP(spi_a_ss0_x9, 4),
|
||||
GROUP(spi_a_sclk_x10, 4),
|
||||
|
||||
/* bank X func5 */
|
||||
GROUP(uart_b_tx_x, 5),
|
||||
GROUP(uart_b_rx_x, 5),
|
||||
GROUP(i2c1_sda_x, 5),
|
||||
GROUP(i2c1_sck_x, 5),
|
||||
|
||||
/* bank X func6 */
|
||||
GROUP(pwm_a_x7, 6),
|
||||
GROUP(pwm_b_x, 6),
|
||||
GROUP(pwm_c_x, 6),
|
||||
GROUP(pwm_d_x10, 6),
|
||||
|
||||
/* bank X func7 */
|
||||
GROUP(gen_clk_x, 7),
|
||||
|
||||
/* bank F func1 */
|
||||
GROUP(uart_b_tx_f, 1),
|
||||
GROUP(uart_b_rx_f, 1),
|
||||
GROUP(remote_input_f, 1),
|
||||
GROUP(jtag_a_clk, 1),
|
||||
GROUP(jtag_a_tms, 1),
|
||||
GROUP(jtag_a_tdi, 1),
|
||||
GROUP(jtag_a_tdo, 1),
|
||||
GROUP(gen_clk_f8, 1),
|
||||
GROUP(pwm_a_f10, 1),
|
||||
GROUP(i2c0_sck_f11, 1),
|
||||
GROUP(i2c0_sda_f12, 1),
|
||||
|
||||
/* bank F func2 */
|
||||
GROUP(clk_32k_in, 2),
|
||||
GROUP(pwm_e_f, 2),
|
||||
GROUP(pwm_f_f4, 2),
|
||||
GROUP(remote_out, 2),
|
||||
GROUP(spdif_in_f6, 2),
|
||||
GROUP(spdif_in_f7, 2),
|
||||
GROUP(pwm_a_hiz_f8, 2),
|
||||
GROUP(pwm_a_hiz_f10, 2),
|
||||
GROUP(pwm_d_f, 2),
|
||||
GROUP(pwm_f_f12, 2),
|
||||
|
||||
/* bank F func3 */
|
||||
GROUP(pwm_c_f3, 3),
|
||||
GROUP(swclk, 3),
|
||||
GROUP(swdio, 3),
|
||||
GROUP(pwm_a_f6, 3),
|
||||
GROUP(pwm_b_f, 3),
|
||||
GROUP(pwm_c_f8, 3),
|
||||
GROUP(clk25, 3),
|
||||
GROUP(i2c_slave_sck_f, 3),
|
||||
GROUP(i2c_slave_sda_f, 3),
|
||||
|
||||
/* bank F func4 */
|
||||
GROUP(cec_a, 4),
|
||||
GROUP(i2c3_sck_f, 4),
|
||||
GROUP(i2c3_sda_f, 4),
|
||||
GROUP(pmw_a_hiz_f6, 4),
|
||||
GROUP(pwm_b_hiz, 4),
|
||||
GROUP(pwm_c_hiz, 4),
|
||||
GROUP(i2c0_sck_f9, 4),
|
||||
GROUP(i2c0_sda_f10, 4),
|
||||
|
||||
/* bank F func5 */
|
||||
GROUP(cec_b, 5),
|
||||
GROUP(clk12_24, 5),
|
||||
|
||||
/* bank F func7 */
|
||||
GROUP(gen_clk_f10, 7),
|
||||
|
||||
/* bank A func1 */
|
||||
GROUP(mclk_0, 1),
|
||||
GROUP(tdm_b_sclk, 1),
|
||||
GROUP(tdm_b_fs, 1),
|
||||
GROUP(tdm_b_dout0, 1),
|
||||
GROUP(tdm_b_dout1, 1),
|
||||
GROUP(tdm_b_dout2, 1),
|
||||
GROUP(tdm_b_dout3, 1),
|
||||
GROUP(tdm_b_dout4, 1),
|
||||
GROUP(tdm_b_dout5, 1),
|
||||
GROUP(remote_input_a, 1),
|
||||
|
||||
/* bank A func2 */
|
||||
GROUP(pwm_e_a, 2),
|
||||
GROUP(tdm_b_slv_sclk, 2),
|
||||
GROUP(tdm_b_slv_fs, 2),
|
||||
GROUP(tdm_b_din0, 2),
|
||||
GROUP(tdm_b_din1, 2),
|
||||
GROUP(tdm_b_din2, 2),
|
||||
GROUP(i2c1_sda_a, 2),
|
||||
GROUP(i2c1_sck_a, 2),
|
||||
|
||||
/* bank A func3 */
|
||||
GROUP(i2c2_sck_a4, 3),
|
||||
GROUP(i2c2_sda_a5, 3),
|
||||
GROUP(pdm_din2_a, 3),
|
||||
GROUP(pdm_din1_a, 3),
|
||||
GROUP(pdm_din0_a, 3),
|
||||
GROUP(pdm_dclk, 3),
|
||||
GROUP(pwm_c_a, 3),
|
||||
GROUP(pwm_b_a, 3),
|
||||
|
||||
/* bank A func4 */
|
||||
GROUP(pwm_a_a, 4),
|
||||
GROUP(spi_a_mosi_a, 4),
|
||||
GROUP(spi_a_miso_a, 4),
|
||||
GROUP(spi_a_ss0_a, 4),
|
||||
GROUP(spi_a_sclk_a, 4),
|
||||
GROUP(i2c_slave_sck_a, 4),
|
||||
GROUP(i2c_slave_sda_a, 4),
|
||||
|
||||
/* bank A func5 */
|
||||
GROUP(mclk_vad, 5),
|
||||
GROUP(tdm_vad_sclk_a1, 5),
|
||||
GROUP(tdm_vad_fs_a2, 5),
|
||||
GROUP(tdm_vad_sclk_a5, 5),
|
||||
GROUP(tdm_vad_fs_a6, 5),
|
||||
GROUP(i2c2_sck_a8, 5),
|
||||
GROUP(i2c2_sda_a9, 5),
|
||||
|
||||
/* bank A func6 */
|
||||
GROUP(tst_out0, 6),
|
||||
GROUP(tst_out1, 6),
|
||||
GROUP(tst_out2, 6),
|
||||
GROUP(tst_out3, 6),
|
||||
GROUP(tst_out4, 6),
|
||||
GROUP(tst_out5, 6),
|
||||
GROUP(tst_out6, 6),
|
||||
GROUP(tst_out7, 6),
|
||||
GROUP(tst_out8, 6),
|
||||
GROUP(tst_out9, 6),
|
||||
GROUP(tst_out10, 6),
|
||||
GROUP(tst_out11, 6),
|
||||
|
||||
/* bank A func7 */
|
||||
GROUP(mute_key, 7),
|
||||
GROUP(mute_en, 7),
|
||||
GROUP(gen_clk_a, 7),
|
||||
};
|
||||
|
||||
static const char * const gpio_periphs_groups[] = {
|
||||
"GPIOP_0", "GPIOP_1", "GPIOP_2", "GPIOP_3", "GPIOP_4",
|
||||
"GPIOP_5", "GPIOP_6", "GPIOP_7", "GPIOP_8", "GPIOP_9",
|
||||
"GPIOP_10", "GPIOP_11", "GPIOP_12",
|
||||
|
||||
"GPIOB_0", "GPIOB_1", "GPIOB_2", "GPIOB_3", "GPIOB_4",
|
||||
"GPIOB_5", "GPIOB_6",
|
||||
|
||||
"GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
|
||||
"GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
|
||||
"GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
|
||||
"GPIOX_15", "GPIOX_16",
|
||||
|
||||
"GPIOF_0", "GPIOF_1", "GPIOF_2", "GPIOF_3", "GPIOF_4",
|
||||
"GPIOF_5", "GPIOF_6", "GPIOF_7", "GPIOF_8", "GPIOF_9",
|
||||
"GPIOF_10", "GPIOF_11", "GPIOF_12",
|
||||
|
||||
"GPIOA_0", "GPIOA_1", "GPIOA_2", "GPIOA_3", "GPIOA_4",
|
||||
"GPIOA_5", "GPIOA_6", "GPIOA_7", "GPIOA_8", "GPIOA_9",
|
||||
"GPIOA_10", "GPIOA_11",
|
||||
};
|
||||
|
||||
static const char * const psram_groups[] = {
|
||||
"psram_clkn", "psram_clkp", "psram_ce_n", "psram_rst_n", "psram_adq0",
|
||||
"psram_adq1", "psram_adq2", "psram_adq3", "psram_adq4", "psram_adq5",
|
||||
"psram_adq6", "psram_adq7", "psram_dqs_dm",
|
||||
};
|
||||
|
||||
static const char * const pwm_a_groups[] = {
|
||||
"pwm_a_x6", "pwm_a_x7", "pwm_a_f10", "pwm_a_f6", "pwm_a_a",
|
||||
};
|
||||
|
||||
static const char * const pwm_b_groups[] = {
|
||||
"pwm_b_x", "pwm_b_f", "pwm_b_a",
|
||||
};
|
||||
|
||||
static const char * const pwm_c_groups[] = {
|
||||
"pwm_c_x", "pwm_c_f3", "pwm_c_f8", "pwm_c_a",
|
||||
};
|
||||
|
||||
static const char * const pwm_d_groups[] = {
|
||||
"pwm_d_x15", "pwm_d_x13", "pwm_d_x10", "pwm_d_f",
|
||||
};
|
||||
|
||||
static const char * const pwm_e_groups[] = {
|
||||
"pwm_e_p", "pwm_e_x16", "pwm_e_x14", "pwm_e_x2", "pwm_e_f",
|
||||
"pwm_e_a",
|
||||
};
|
||||
|
||||
static const char * const pwm_f_groups[] = {
|
||||
"pwm_f_b", "pwm_f_x", "pwm_f_f4", "pwm_f_f12",
|
||||
};
|
||||
|
||||
static const char * const pwm_a_hiz_groups[] = {
|
||||
"pwm_a_hiz_f8", "pwm_a_hiz_f10", "pwm_a_hiz_f6",
|
||||
};
|
||||
|
||||
static const char * const pwm_b_hiz_groups[] = {
|
||||
"pwm_b_hiz",
|
||||
};
|
||||
|
||||
static const char * const pwm_c_hiz_groups[] = {
|
||||
"pwm_c_hiz",
|
||||
};
|
||||
|
||||
static const char * const spif_groups[] = {
|
||||
"spif_mo", "spif_mi", "spif_wp_n", "spif_hold_n", "spif_clk",
|
||||
"spif_cs",
|
||||
};
|
||||
|
||||
static const char * const sdcard_groups[] = {
|
||||
"sdcard_d0_b", "sdcard_d1_b", "sdcard_d2_b", "sdcard_d3_b",
|
||||
"sdcard_clk_b", "sdcard_cmd_b",
|
||||
|
||||
"sdcard_d0_x", "sdcard_d1_x", "sdcard_d2_x", "sdcard_d3_x",
|
||||
"sdcard_clk_x", "sdcard_cmd_x",
|
||||
};
|
||||
|
||||
static const char * const tdm_a_groups[] = {
|
||||
"tdm_a_din0", "tdm_a_din1", "tdm_a_fs", "tdm_a_sclk",
|
||||
"tdm_a_slv_fs", "tdm_a_slv_sclk", "tdm_a_dout0", "tdm_a_dout1",
|
||||
};
|
||||
|
||||
static const char * const uart_a_groups[] = {
|
||||
"uart_a_tx", "uart_a_rx", "uart_a_cts", "uart_a_rts",
|
||||
};
|
||||
|
||||
static const char * const uart_b_groups[] = {
|
||||
"uart_b_tx_x", "uart_b_rx_x", "uart_b_tx_f", "uart_b_rx_f",
|
||||
};
|
||||
|
||||
static const char * const uart_c_groups[] = {
|
||||
"uart_c_tx_x0", "uart_c_rx_x1", "uart_c_cts", "uart_c_rts",
|
||||
"uart_c_tx_x15", "uart_c_rx_x16",
|
||||
};
|
||||
|
||||
static const char * const i2c0_groups[] = {
|
||||
"i2c0_sck_f11", "i2c0_sda_f12", "i2c0_sck_f9", "i2c0_sda_f10",
|
||||
};
|
||||
|
||||
static const char * const i2c1_groups[] = {
|
||||
"i2c1_sda_x", "i2c1_sck_x", "i2c1_sda_a", "i2c1_sck_a",
|
||||
};
|
||||
|
||||
static const char * const i2c2_groups[] = {
|
||||
"i2c2_sck_x0", "i2c2_sda_x1", "i2c2_sck_x15", "i2c2_sda_x16",
|
||||
"i2c2_sck_a4", "i2c2_sda_a5", "i2c2_sck_a8", "i2c2_sda_a9",
|
||||
};
|
||||
|
||||
static const char * const i2c3_groups[] = {
|
||||
"i2c3_sck_x", "i2c3_sda_x", "i2c3_sck_f", "i2c3_sda_f",
|
||||
};
|
||||
|
||||
static const char * const spi_a_groups[] = {
|
||||
"spi_a_mosi_x2", "spi_a_ss0_x3", "spi_a_sclk_x4", "spi_a_miso_x5",
|
||||
"spi_a_mosi_x7", "spi_a_miso_x8", "spi_a_ss0_x9", "spi_a_sclk_x10",
|
||||
|
||||
"spi_a_mosi_a", "spi_a_miso_a", "spi_a_ss0_a", "spi_a_sclk_a",
|
||||
};
|
||||
|
||||
static const char * const pdm_groups[] = {
|
||||
"pdm_din0_x", "pdm_din1_x", "pdm_din2_x", "pdm_dclk_x", "pdm_din2_a",
|
||||
"pdm_din1_a", "pdm_din0_a", "pdm_dclk",
|
||||
};
|
||||
|
||||
static const char * const gen_clk_groups[] = {
|
||||
"gen_clk_x", "gen_clk_f8", "gen_clk_f10", "gen_clk_a",
|
||||
};
|
||||
|
||||
static const char * const remote_input_groups[] = {
|
||||
"remote_input_f",
|
||||
"remote_input_a",
|
||||
};
|
||||
|
||||
static const char * const jtag_a_groups[] = {
|
||||
"jtag_a_clk", "jtag_a_tms", "jtag_a_tdi", "jtag_a_tdo",
|
||||
};
|
||||
|
||||
static const char * const clk_32k_in_groups[] = {
|
||||
"clk_32k_in",
|
||||
};
|
||||
|
||||
static const char * const remote_out_groups[] = {
|
||||
"remote_out",
|
||||
};
|
||||
|
||||
static const char * const spdif_in_groups[] = {
|
||||
"spdif_in_f6", "spdif_in_f7",
|
||||
};
|
||||
|
||||
static const char * const sw_groups[] = {
|
||||
"swclk", "swdio",
|
||||
};
|
||||
|
||||
static const char * const clk25_groups[] = {
|
||||
"clk_25",
|
||||
};
|
||||
|
||||
static const char * const cec_a_groups[] = {
|
||||
"cec_a",
|
||||
};
|
||||
|
||||
static const char * const cec_b_groups[] = {
|
||||
"cec_b",
|
||||
};
|
||||
|
||||
static const char * const clk12_24_groups[] = {
|
||||
"clk12_24",
|
||||
};
|
||||
|
||||
static const char * const mclk_0_groups[] = {
|
||||
"mclk_0",
|
||||
};
|
||||
|
||||
static const char * const tdm_b_groups[] = {
|
||||
"tdm_b_din0", "tdm_b_din1", "tdm_b_din2",
|
||||
"tdm_b_sclk", "tdm_b_fs", "tdm_b_dout0", "tdm_b_dout1",
|
||||
"tdm_b_dout2", "tdm_b_dout3", "tdm_b_dout4", "tdm_b_dout5",
|
||||
"tdm_b_slv_sclk", "tdm_b_slv_fs",
|
||||
};
|
||||
|
||||
static const char * const mclk_vad_groups[] = {
|
||||
"mclk_vad",
|
||||
};
|
||||
|
||||
static const char * const tdm_vad_groups[] = {
|
||||
"tdm_vad_sclk_a1", "tdm_vad_fs_a2", "tdm_vad_sclk_a5", "tdm_vad_fs_a6",
|
||||
};
|
||||
|
||||
static const char * const tst_out_groups[] = {
|
||||
"tst_out0", "tst_out1", "tst_out2", "tst_out3",
|
||||
"tst_out4", "tst_out5", "tst_out6", "tst_out7",
|
||||
"tst_out8", "tst_out9", "tst_out10", "tst_out11",
|
||||
};
|
||||
|
||||
static const char * const mute_groups[] = {
|
||||
"mute_key", "mute_en",
|
||||
};
|
||||
|
||||
static struct meson_pmx_func meson_a1_periphs_functions[] = {
|
||||
FUNCTION(gpio_periphs),
|
||||
FUNCTION(psram),
|
||||
FUNCTION(pwm_a),
|
||||
FUNCTION(pwm_b),
|
||||
FUNCTION(pwm_c),
|
||||
FUNCTION(pwm_d),
|
||||
FUNCTION(pwm_e),
|
||||
FUNCTION(pwm_f),
|
||||
FUNCTION(pwm_a_hiz),
|
||||
FUNCTION(pwm_b_hiz),
|
||||
FUNCTION(pwm_c_hiz),
|
||||
FUNCTION(spif),
|
||||
FUNCTION(sdcard),
|
||||
FUNCTION(tdm_a),
|
||||
FUNCTION(uart_a),
|
||||
FUNCTION(uart_b),
|
||||
FUNCTION(uart_c),
|
||||
FUNCTION(i2c0),
|
||||
FUNCTION(i2c1),
|
||||
FUNCTION(i2c2),
|
||||
FUNCTION(i2c3),
|
||||
FUNCTION(spi_a),
|
||||
FUNCTION(pdm),
|
||||
FUNCTION(gen_clk),
|
||||
FUNCTION(remote_input),
|
||||
FUNCTION(jtag_a),
|
||||
FUNCTION(clk_32k_in),
|
||||
FUNCTION(remote_out),
|
||||
FUNCTION(spdif_in),
|
||||
FUNCTION(sw),
|
||||
FUNCTION(clk25),
|
||||
FUNCTION(cec_a),
|
||||
FUNCTION(cec_b),
|
||||
FUNCTION(clk12_24),
|
||||
FUNCTION(mclk_0),
|
||||
FUNCTION(tdm_b),
|
||||
FUNCTION(mclk_vad),
|
||||
FUNCTION(tdm_vad),
|
||||
FUNCTION(tst_out),
|
||||
FUNCTION(mute),
|
||||
};
|
||||
|
||||
static struct meson_bank meson_a1_periphs_banks[] = {
|
||||
/* name first last pullen pull dir out in ds */
|
||||
BANK_DS("P", GPIOP_0, GPIOP_12, 0x3, 0, 0x4, 0, 0x2, 0, 0x1, 0, 0x0, 0, 0x5, 0),
|
||||
BANK_DS("B", GPIOB_0, GPIOB_6, 0x13, 0, 0x14, 0, 0x12, 0, 0x11, 0, 0x10, 0, 0x15, 0),
|
||||
BANK_DS("X", GPIOX_0, GPIOX_16, 0x23, 0, 0x24, 0, 0x22, 0, 0x21, 0, 0x20, 0, 0x25, 0),
|
||||
BANK_DS("F", GPIOF_0, GPIOF_12, 0x33, 0, 0x34, 0, 0x32, 0, 0x31, 0, 0x30, 0, 0x35, 0),
|
||||
BANK_DS("A", GPIOA_0, GPIOA_11, 0x43, 0, 0x44, 0, 0x42, 0, 0x41, 0, 0x40, 0, 0x45, 0),
|
||||
};
|
||||
|
||||
static struct meson_pmx_bank meson_a1_periphs_pmx_banks[] = {
|
||||
/* name first last reg offset */
|
||||
BANK_PMX("P", GPIOP_0, GPIOP_12, 0x0, 0),
|
||||
BANK_PMX("B", GPIOB_0, GPIOB_6, 0x2, 0),
|
||||
BANK_PMX("X", GPIOX_0, GPIOX_16, 0x3, 0),
|
||||
BANK_PMX("F", GPIOF_0, GPIOF_12, 0x6, 0),
|
||||
BANK_PMX("A", GPIOA_0, GPIOA_11, 0x8, 0),
|
||||
};
|
||||
|
||||
static struct meson_axg_pmx_data meson_a1_periphs_pmx_banks_data = {
|
||||
.pmx_banks = meson_a1_periphs_pmx_banks,
|
||||
.num_pmx_banks = ARRAY_SIZE(meson_a1_periphs_pmx_banks),
|
||||
};
|
||||
|
||||
static struct meson_pinctrl_data meson_a1_periphs_pinctrl_data = {
|
||||
.name = "periphs-banks",
|
||||
.groups = meson_a1_periphs_groups,
|
||||
.funcs = meson_a1_periphs_functions,
|
||||
.banks = meson_a1_periphs_banks,
|
||||
.num_pins = 62,
|
||||
.num_groups = ARRAY_SIZE(meson_a1_periphs_groups),
|
||||
.num_funcs = ARRAY_SIZE(meson_a1_periphs_functions),
|
||||
.num_banks = ARRAY_SIZE(meson_a1_periphs_banks),
|
||||
.pmx_data = &meson_a1_periphs_pmx_banks_data,
|
||||
};
|
||||
|
||||
static const struct udevice_id meson_a1_pinctrl_match[] = {
|
||||
{
|
||||
.compatible = "amlogic,meson-a1-periphs-pinctrl",
|
||||
.data = (ulong)&meson_a1_periphs_pinctrl_data,
|
||||
},
|
||||
{ },
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(meson_a1_pinctrl) = {
|
||||
.name = "meson-a1-pinctrl",
|
||||
.id = UCLASS_PINCTRL,
|
||||
.of_match = of_match_ptr(meson_a1_pinctrl_match),
|
||||
.probe = meson_pinctrl_probe,
|
||||
.priv_auto = sizeof(struct meson_pinctrl),
|
||||
.ops = &meson_axg_pinctrl_ops,
|
||||
};
|
||||
|
|
@ -68,6 +68,13 @@ config MESON_EE_POWER_DOMAIN
|
|||
Enable support for manipulating Amlogic Meson Everything-Else power
|
||||
domains.
|
||||
|
||||
config MESON_SECURE_POWER_DOMAIN
|
||||
bool "Enable Amlogic Secure power domain driver"
|
||||
depends on POWER_DOMAIN && ARCH_MESON && MESON_A1
|
||||
help
|
||||
Enable support for manipulating Amlogic Meson Secure power domains.
|
||||
Support for Amlogic A1 series.
|
||||
|
||||
config SANDBOX_POWER_DOMAIN
|
||||
bool "Enable the sandbox power domain test driver"
|
||||
depends on POWER_DOMAIN && SANDBOX
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ obj-$(CONFIG_IMX8MP_HSIOMIX_BLKCTRL) += imx8mp-hsiomix.o
|
|||
obj-$(CONFIG_MTK_POWER_DOMAIN) += mtk-power-domain.o
|
||||
obj-$(CONFIG_MESON_GX_VPU_POWER_DOMAIN) += meson-gx-pwrc-vpu.o
|
||||
obj-$(CONFIG_MESON_EE_POWER_DOMAIN) += meson-ee-pwrc.o
|
||||
obj-$(CONFIG_MESON_SECURE_POWER_DOMAIN) += meson-secure-pwrc.o
|
||||
obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o
|
||||
obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain-test.o
|
||||
obj-$(CONFIG_TEGRA186_POWER_DOMAIN) += tegra186-power-domain.o
|
||||
|
|
|
|||
160
drivers/power/domain/meson-secure-pwrc.c
Normal file
160
drivers/power/domain/meson-secure-pwrc.c
Normal file
|
|
@ -0,0 +1,160 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* Copyright (c) 2023 SberDevices, Inc.
|
||||
* Author: Alexey Romanov <avromanov@sberdevices.ru>
|
||||
*/
|
||||
|
||||
#include <dm.h>
|
||||
#include <asm/arch/sm.h>
|
||||
#include <power-domain.h>
|
||||
#include <power-domain-uclass.h>
|
||||
#include <dt-bindings/power/meson-a1-power.h>
|
||||
|
||||
struct meson_secure_pwrc_domain_desc {
|
||||
char *name;
|
||||
size_t index;
|
||||
};
|
||||
|
||||
struct meson_secure_pwrc_domain_data {
|
||||
unsigned int count;
|
||||
struct meson_secure_pwrc_domain_desc *domains;
|
||||
};
|
||||
|
||||
struct meson_secure_pwrc_priv {
|
||||
const struct meson_secure_pwrc_domain_data *data;
|
||||
};
|
||||
|
||||
static int meson_secure_pwrc_on(struct power_domain *power_domain)
|
||||
{
|
||||
struct meson_secure_pwrc_priv *priv = dev_get_priv(power_domain->dev);
|
||||
struct meson_secure_pwrc_domain_desc *pwrc_domain;
|
||||
int err;
|
||||
|
||||
pwrc_domain = &priv->data->domains[power_domain->id];
|
||||
|
||||
err = meson_sm_pwrdm_on(pwrc_domain->index);
|
||||
if (err) {
|
||||
pr_err("meson_sm_pwrdm_on() failed (%d)\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
pr_debug("enable %s power domain\n", pwrc_domain->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int meson_secure_pwrc_off(struct power_domain *power_domain)
|
||||
{
|
||||
struct meson_secure_pwrc_priv *priv = dev_get_priv(power_domain->dev);
|
||||
struct meson_secure_pwrc_domain_desc *pwrc_domain;
|
||||
int err;
|
||||
|
||||
pwrc_domain = &priv->data->domains[power_domain->id];
|
||||
|
||||
err = meson_sm_pwrdm_off(pwrc_domain->index);
|
||||
if (err) {
|
||||
pr_err("meson_sm_pwrdm_off() failed (%d)\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
pr_debug("disable %s power domain\n", pwrc_domain->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int meson_secure_pwrc_of_xlate(struct power_domain *power_domain,
|
||||
struct ofnode_phandle_args *args)
|
||||
{
|
||||
struct meson_secure_pwrc_priv *priv = dev_get_priv(power_domain->dev);
|
||||
struct meson_secure_pwrc_domain_desc *pwrc_domain;
|
||||
|
||||
if (args->args_count < 1) {
|
||||
pr_err("invalid args count: %d\n", args->args_count);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
power_domain->id = args->args[0];
|
||||
|
||||
if (power_domain->id >= priv->data->count) {
|
||||
pr_err("domain with ID=%lu is invalid\n", power_domain->id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pwrc_domain = &priv->data->domains[power_domain->id];
|
||||
|
||||
if (!pwrc_domain->name) {
|
||||
pr_err("domain with ID=%lu is invalid\n", power_domain->id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define SEC_PD(__name) \
|
||||
[PWRC_##__name##_ID] = \
|
||||
{ \
|
||||
.name = #__name, \
|
||||
.index = PWRC_##__name##_ID, \
|
||||
}
|
||||
|
||||
static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = {
|
||||
SEC_PD(DSPA),
|
||||
SEC_PD(DSPB),
|
||||
SEC_PD(UART),
|
||||
SEC_PD(DMC),
|
||||
SEC_PD(I2C),
|
||||
SEC_PD(PSRAM),
|
||||
SEC_PD(ACODEC),
|
||||
SEC_PD(AUDIO),
|
||||
SEC_PD(OTP),
|
||||
SEC_PD(DMA),
|
||||
SEC_PD(SD_EMMC),
|
||||
SEC_PD(RAMA),
|
||||
SEC_PD(RAMB),
|
||||
SEC_PD(IR),
|
||||
SEC_PD(SPICC),
|
||||
SEC_PD(SPIFC),
|
||||
SEC_PD(USB),
|
||||
SEC_PD(NIC),
|
||||
SEC_PD(PDMIN),
|
||||
SEC_PD(RSA),
|
||||
};
|
||||
|
||||
struct power_domain_ops meson_secure_pwrc_ops = {
|
||||
.on = meson_secure_pwrc_on,
|
||||
.off = meson_secure_pwrc_off,
|
||||
.of_xlate = meson_secure_pwrc_of_xlate,
|
||||
};
|
||||
|
||||
static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = {
|
||||
.count = ARRAY_SIZE(a1_pwrc_domains),
|
||||
.domains = a1_pwrc_domains,
|
||||
};
|
||||
|
||||
static const struct udevice_id meson_secure_pwrc_ids[] = {
|
||||
{
|
||||
.compatible = "amlogic,meson-a1-pwrc",
|
||||
.data = (unsigned long)&meson_secure_a1_pwrc_data,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
static int meson_secure_pwrc_probe(struct udevice *dev)
|
||||
{
|
||||
struct meson_secure_pwrc_priv *priv = dev_get_priv(dev);
|
||||
|
||||
priv->data = (void *)dev_get_driver_data(dev);
|
||||
if (!priv->data)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_DRIVER(meson_secure_pwrc) = {
|
||||
.name = "meson_secure_pwrc",
|
||||
.id = UCLASS_POWER_DOMAIN,
|
||||
.of_match = meson_secure_pwrc_ids,
|
||||
.probe = meson_secure_pwrc_probe,
|
||||
.ops = &meson_secure_pwrc_ops,
|
||||
.priv_auto = sizeof(struct meson_secure_pwrc_priv),
|
||||
};
|
||||
|
|
@ -11,6 +11,9 @@
|
|||
#if (defined(CONFIG_MESON_AXG) || defined(CONFIG_MESON_G12A))
|
||||
#define GICD_BASE 0xffc01000
|
||||
#define GICC_BASE 0xffc02000
|
||||
#elif defined(CONFIG_MESON_A1)
|
||||
#define GICD_BASE 0xff901000
|
||||
#define GICC_BASE 0xff902000
|
||||
#else /* MESON GXL and GXBB */
|
||||
#define GICD_BASE 0xc4301000
|
||||
#define GICC_BASE 0xc4302000
|
||||
|
|
|
|||
73
include/dt-bindings/gpio/meson-a1-gpio.h
Normal file
73
include/dt-bindings/gpio/meson-a1-gpio.h
Normal file
|
|
@ -0,0 +1,73 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
|
||||
/*
|
||||
* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
|
||||
* Author: Qianggui Song <qianggui.song@amlogic.com>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_MESON_A1_GPIO_H
|
||||
#define _DT_BINDINGS_MESON_A1_GPIO_H
|
||||
|
||||
#define GPIOP_0 0
|
||||
#define GPIOP_1 1
|
||||
#define GPIOP_2 2
|
||||
#define GPIOP_3 3
|
||||
#define GPIOP_4 4
|
||||
#define GPIOP_5 5
|
||||
#define GPIOP_6 6
|
||||
#define GPIOP_7 7
|
||||
#define GPIOP_8 8
|
||||
#define GPIOP_9 9
|
||||
#define GPIOP_10 10
|
||||
#define GPIOP_11 11
|
||||
#define GPIOP_12 12
|
||||
#define GPIOB_0 13
|
||||
#define GPIOB_1 14
|
||||
#define GPIOB_2 15
|
||||
#define GPIOB_3 16
|
||||
#define GPIOB_4 17
|
||||
#define GPIOB_5 18
|
||||
#define GPIOB_6 19
|
||||
#define GPIOX_0 20
|
||||
#define GPIOX_1 21
|
||||
#define GPIOX_2 22
|
||||
#define GPIOX_3 23
|
||||
#define GPIOX_4 24
|
||||
#define GPIOX_5 25
|
||||
#define GPIOX_6 26
|
||||
#define GPIOX_7 27
|
||||
#define GPIOX_8 28
|
||||
#define GPIOX_9 29
|
||||
#define GPIOX_10 30
|
||||
#define GPIOX_11 31
|
||||
#define GPIOX_12 32
|
||||
#define GPIOX_13 33
|
||||
#define GPIOX_14 34
|
||||
#define GPIOX_15 35
|
||||
#define GPIOX_16 36
|
||||
#define GPIOF_0 37
|
||||
#define GPIOF_1 38
|
||||
#define GPIOF_2 39
|
||||
#define GPIOF_3 40
|
||||
#define GPIOF_4 41
|
||||
#define GPIOF_5 42
|
||||
#define GPIOF_6 43
|
||||
#define GPIOF_7 44
|
||||
#define GPIOF_8 45
|
||||
#define GPIOF_9 46
|
||||
#define GPIOF_10 47
|
||||
#define GPIOF_11 48
|
||||
#define GPIOF_12 49
|
||||
#define GPIOA_0 50
|
||||
#define GPIOA_1 51
|
||||
#define GPIOA_2 52
|
||||
#define GPIOA_3 53
|
||||
#define GPIOA_4 54
|
||||
#define GPIOA_5 55
|
||||
#define GPIOA_6 56
|
||||
#define GPIOA_7 57
|
||||
#define GPIOA_8 58
|
||||
#define GPIOA_9 59
|
||||
#define GPIOA_10 60
|
||||
#define GPIOA_11 61
|
||||
|
||||
#endif /* _DT_BINDINGS_MESON_A1_GPIO_H */
|
||||
32
include/dt-bindings/power/meson-a1-power.h
Normal file
32
include/dt-bindings/power/meson-a1-power.h
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
|
||||
/*
|
||||
* Copyright (c) 2023 SberDevices, Inc.
|
||||
* Author: Alexey Romanov <avromanov@sberdevices.ru>
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_MESON_A1_POWER_H
|
||||
#define _DT_BINDINGS_MESON_A1_POWER_H
|
||||
|
||||
#define PWRC_DSPA_ID 8
|
||||
#define PWRC_DSPB_ID 9
|
||||
#define PWRC_UART_ID 10
|
||||
#define PWRC_DMC_ID 11
|
||||
#define PWRC_I2C_ID 12
|
||||
#define PWRC_PSRAM_ID 13
|
||||
#define PWRC_ACODEC_ID 14
|
||||
#define PWRC_AUDIO_ID 15
|
||||
#define PWRC_OTP_ID 16
|
||||
#define PWRC_DMA_ID 17
|
||||
#define PWRC_SD_EMMC_ID 18
|
||||
#define PWRC_RAMA_ID 19
|
||||
#define PWRC_RAMB_ID 20
|
||||
#define PWRC_IR_ID 21
|
||||
#define PWRC_SPICC_ID 22
|
||||
#define PWRC_SPIFC_ID 23
|
||||
#define PWRC_USB_ID 24
|
||||
#define PWRC_NIC_ID 25
|
||||
#define PWRC_PDMIN_ID 26
|
||||
#define PWRC_RSA_ID 27
|
||||
#define PWRC_MAX_ID 28
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue