mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-01 08:59:33 +00:00
board: sl28: implement additional bootsources
The board is able to boot from the following source: - user-updateble SPI flash - write-protected part of the same SPI flash - eMMC - SD card Implement the needed function hooks to support all of these boot sources. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
parent
6622c30f2e
commit
67b5dab263
5 changed files with 102 additions and 2 deletions
|
@ -2,6 +2,9 @@
|
||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <asm/global_data.h>
|
#include <asm/global_data.h>
|
||||||
|
#include <asm/io.h>
|
||||||
|
|
||||||
|
#include "sl28.h"
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
|
@ -9,3 +12,22 @@ u32 get_lpuart_clk(void)
|
||||||
{
|
{
|
||||||
return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV;
|
return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
enum boot_source sl28_boot_source(void)
|
||||||
|
{
|
||||||
|
u32 rcw_src = in_le32(DCFG_BASE + DCFG_PORSR1) & DCFG_PORSR1_RCW_SRC;
|
||||||
|
|
||||||
|
switch (rcw_src) {
|
||||||
|
case DCFG_PORSR1_RCW_SRC_SDHC1:
|
||||||
|
return BOOT_SOURCE_SDHC;
|
||||||
|
case DCFG_PORSR1_RCW_SRC_SDHC2:
|
||||||
|
return BOOT_SOURCE_MMC;
|
||||||
|
case DCFG_PORSR1_RCW_SRC_I2C:
|
||||||
|
return BOOT_SOURCE_I2C;
|
||||||
|
case DCFG_PORSR1_RCW_SRC_FSPI_NOR:
|
||||||
|
return BOOT_SOURCE_SPI;
|
||||||
|
default:
|
||||||
|
debug("unknown bootsource (%08x)\n", rcw_src);
|
||||||
|
return BOOT_SOURCE_UNKNOWN;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
@ -24,6 +24,8 @@
|
||||||
#include <fdtdec.h>
|
#include <fdtdec.h>
|
||||||
#include <miiphy.h>
|
#include <miiphy.h>
|
||||||
|
|
||||||
|
#include "sl28.h"
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
DECLARE_GLOBAL_DATA_PTR;
|
||||||
|
|
||||||
#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
|
#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT)
|
||||||
|
@ -60,6 +62,27 @@ int board_eth_init(struct bd_info *bis)
|
||||||
return pci_eth_init(bis);
|
return pci_eth_init(bis);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
enum env_location env_get_location(enum env_operation op, int prio)
|
||||||
|
{
|
||||||
|
enum boot_source src = sl28_boot_source();
|
||||||
|
|
||||||
|
if (prio)
|
||||||
|
return ENVL_UNKNOWN;
|
||||||
|
|
||||||
|
if (!CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
|
||||||
|
return ENVL_NOWHERE;
|
||||||
|
|
||||||
|
/* write and erase always operate on the environment */
|
||||||
|
if (op == ENVOP_SAVE || op == ENVOP_ERASE)
|
||||||
|
return ENVL_SPI_FLASH;
|
||||||
|
|
||||||
|
/* failsafe boot will always use the compiled-in default environment */
|
||||||
|
if (src == BOOT_SOURCE_SPI)
|
||||||
|
return ENVL_NOWHERE;
|
||||||
|
|
||||||
|
return ENVL_SPI_FLASH;
|
||||||
|
}
|
||||||
|
|
||||||
static int __sl28cpld_read(uint reg)
|
static int __sl28cpld_read(uint reg)
|
||||||
{
|
{
|
||||||
struct udevice *dev;
|
struct udevice *dev;
|
||||||
|
|
16
board/kontron/sl28/sl28.h
Normal file
16
board/kontron/sl28/sl28.h
Normal file
|
@ -0,0 +1,16 @@
|
||||||
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||||
|
|
||||||
|
#ifndef __SL28_H
|
||||||
|
#define __SL28_H
|
||||||
|
|
||||||
|
enum boot_source {
|
||||||
|
BOOT_SOURCE_UNKNOWN,
|
||||||
|
BOOT_SOURCE_SDHC,
|
||||||
|
BOOT_SOURCE_MMC,
|
||||||
|
BOOT_SOURCE_I2C,
|
||||||
|
BOOT_SOURCE_SPI,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum boot_source sl28_boot_source(void);
|
||||||
|
|
||||||
|
#endif
|
|
@ -5,6 +5,9 @@
|
||||||
#include <asm/spl.h>
|
#include <asm/spl.h>
|
||||||
#include <asm/arch-fsl-layerscape/fsl_serdes.h>
|
#include <asm/arch-fsl-layerscape/fsl_serdes.h>
|
||||||
#include <asm/arch-fsl-layerscape/soc.h>
|
#include <asm/arch-fsl-layerscape/soc.h>
|
||||||
|
#include <spi_flash.h>
|
||||||
|
|
||||||
|
#include "sl28.h"
|
||||||
|
|
||||||
#define DCFG_RCWSR25 0x160
|
#define DCFG_RCWSR25 0x160
|
||||||
#define GPINFO_HW_VARIANT_MASK 0xff
|
#define GPINFO_HW_VARIANT_MASK 0xff
|
||||||
|
@ -58,7 +61,40 @@ int board_fit_config_name_match(const char *name)
|
||||||
|
|
||||||
void board_boot_order(u32 *spl_boot_list)
|
void board_boot_order(u32 *spl_boot_list)
|
||||||
{
|
{
|
||||||
spl_boot_list[0] = BOOT_DEVICE_SPI;
|
enum boot_source src = sl28_boot_source();
|
||||||
|
|
||||||
|
switch (src) {
|
||||||
|
case BOOT_SOURCE_SDHC:
|
||||||
|
spl_boot_list[0] = BOOT_DEVICE_MMC2;
|
||||||
|
break;
|
||||||
|
case BOOT_SOURCE_SPI:
|
||||||
|
case BOOT_SOURCE_I2C:
|
||||||
|
spl_boot_list[0] = BOOT_DEVICE_SPI;
|
||||||
|
break;
|
||||||
|
case BOOT_SOURCE_MMC:
|
||||||
|
spl_boot_list[0] = BOOT_DEVICE_MMC1;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
panic("unexpected bootsource (%d)\n", src);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
unsigned int spl_spi_get_uboot_offs(struct spi_flash *flash)
|
||||||
|
{
|
||||||
|
enum boot_source src = sl28_boot_source();
|
||||||
|
|
||||||
|
switch (src) {
|
||||||
|
case BOOT_SOURCE_SPI:
|
||||||
|
return 0x000000;
|
||||||
|
case BOOT_SOURCE_I2C:
|
||||||
|
return 0x230000;
|
||||||
|
default:
|
||||||
|
panic("unexpected bootsource (%d)\n", src);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int board_early_init_f(void)
|
int board_early_init_f(void)
|
||||||
|
|
|
@ -12,6 +12,7 @@ CONFIG_ENV_SECT_SIZE=0x10000
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28"
|
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-kontron-sl28"
|
||||||
CONFIG_SPL_TEXT_BASE=0x18010000
|
CONFIG_SPL_TEXT_BASE=0x18010000
|
||||||
CONFIG_SYS_FSL_SDHC_CLK_DIV=1
|
CONFIG_SYS_FSL_SDHC_CLK_DIV=1
|
||||||
|
CONFIG_SPL_MMC=y
|
||||||
CONFIG_SPL_SERIAL=y
|
CONFIG_SPL_SERIAL=y
|
||||||
CONFIG_SPL_SIZE_LIMIT=0x20000
|
CONFIG_SPL_SIZE_LIMIT=0x20000
|
||||||
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0
|
CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0
|
||||||
|
@ -46,9 +47,11 @@ CONFIG_SPL_BOARD_INIT=y
|
||||||
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
||||||
CONFIG_SPL_STACK=0x18009ff0
|
CONFIG_SPL_STACK=0x18009ff0
|
||||||
CONFIG_SYS_SPL_MALLOC=y
|
CONFIG_SYS_SPL_MALLOC=y
|
||||||
|
CONFIG_SPL_SEPARATE_BSS=y
|
||||||
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
||||||
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x900
|
||||||
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
CONFIG_SPL_MPC8XXX_INIT_DDR=y
|
||||||
CONFIG_SPL_SPI_LOAD=y
|
CONFIG_SPL_SPI_LOAD=y
|
||||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x230000
|
|
||||||
CONFIG_SYS_CBSIZE=256
|
CONFIG_SYS_CBSIZE=256
|
||||||
CONFIG_SYS_PBSIZE=276
|
CONFIG_SYS_PBSIZE=276
|
||||||
CONFIG_SYS_BOOTM_LEN=0x800000
|
CONFIG_SYS_BOOTM_LEN=0x800000
|
||||||
|
|
Loading…
Reference in a new issue