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i2c: designware: Convert driver to multibus/multiadapter framework

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In preparation for the SoCFPGA support of the designware I2C driver,
convert this driver to the common CONFIG_SYS_I2C framework.

This patch converts all users of this driver, this is:

- ST spearxxx boards
- AXS101 (ARC700 platform)

I couldn't test this patch on those boards. Only compile tested for all
spear boards. And tested on SoCFPGA.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Tested-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Cc: Jeroen Hofstee <jeroen@myspectrum.nl>
This commit is contained in:
Stefan Roese 2014-10-28 12:12:00 +01:00 • committed by Heiko Schocher
parent 318a9cea49
commit 678398b19e
6 changed files with 141 additions and 177 deletions
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2
arch/arm/cpu/arm926ejs/spear/cpu.c
View file

@ -38,7 +38,7 @@ int arch_cpu_init(void)
#if defined(CONFIG_DW_UDC) #if defined(CONFIG_DW_UDC)
periph1_clken |= MISC_USBDENB; periph1_clken |= MISC_USBDENB;
#endif #endif
#if defined(CONFIG_DW_I2C) #if defined(CONFIG_SYS_I2C_DW)
periph1_clken |= MISC_I2CENB; periph1_clken |= MISC_I2CENB;
#endif #endif
#if defined(CONFIG_ST_SMI) #if defined(CONFIG_ST_SMI)

2
drivers/i2c/Makefile
View file

@ -6,7 +6,6 @@
# #
obj-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o obj-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o
obj-$(CONFIG_DW_I2C) += designware_i2c.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o obj-$(CONFIG_I2C_MV) += mv_i2c.o
obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
@ -14,6 +13,7 @@ obj-$(CONFIG_U8500_I2C) += u8500_i2c.o
obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o obj-$(CONFIG_SYS_I2C_DAVINCI) += davinci_i2c.o
obj-$(CONFIG_SYS_I2C_DW) += designware_i2c.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o obj-$(CONFIG_SYS_I2C_IHS) += ihs_i2c.o

297
drivers/i2c/designware_i2c.c
View file

@ -6,17 +6,33 @@
*/ */
#include <common.h> #include <common.h>
#include <i2c.h>
#include <asm/io.h> #include <asm/io.h>
#include "designware_i2c.h" #include "designware_i2c.h"
#include <i2c.h>
#ifdef CONFIG_I2C_MULTI_BUS static struct i2c_regs *i2c_get_base(struct i2c_adapter *adap)
static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX]; {
static unsigned int current_bus = 0; switch (adap->hwadapnr) {
#if CONFIG_SYS_I2C_BUS_MAX >= 4
case 3:
return (struct i2c_regs *)CONFIG_SYS_I2C_BASE3;
#endif #endif
#if CONFIG_SYS_I2C_BUS_MAX >= 3
case 2:
return (struct i2c_regs *)CONFIG_SYS_I2C_BASE2;
#endif
#if CONFIG_SYS_I2C_BUS_MAX >= 2
case 1:
return (struct i2c_regs *)CONFIG_SYS_I2C_BASE1;
#endif
case 0:
return (struct i2c_regs *)CONFIG_SYS_I2C_BASE;
default:
printf("Wrong I2C-adapter number %d\n", adap->hwadapnr);
}
static struct i2c_regs *i2c_regs_p = return NULL;
(struct i2c_regs *)CONFIG_SYS_I2C_BASE; }
/* /*
* set_speed - Set the i2c speed mode (standard, high, fast) * set_speed - Set the i2c speed mode (standard, high, fast)
@ -24,51 +40,52 @@ static struct i2c_regs *i2c_regs_p =
* *
* Set the i2c speed mode (standard, high, fast) * Set the i2c speed mode (standard, high, fast)
*/ */
static void set_speed(int i2c_spd) static void set_speed(struct i2c_adapter *adap, int i2c_spd)
{ {
struct i2c_regs *i2c_base = i2c_get_base(adap);
unsigned int cntl; unsigned int cntl;
unsigned int hcnt, lcnt; unsigned int hcnt, lcnt;
unsigned int enbl; unsigned int enbl;
/* to set speed cltr must be disabled */ /* to set speed cltr must be disabled */
enbl = readl(&i2c_regs_p->ic_enable); enbl = readl(&i2c_base->ic_enable);
enbl &= ~IC_ENABLE_0B; enbl &= ~IC_ENABLE_0B;
writel(enbl, &i2c_regs_p->ic_enable); writel(enbl, &i2c_base->ic_enable);
cntl = (readl(&i2c_regs_p->ic_con) & (~IC_CON_SPD_MSK)); cntl = (readl(&i2c_base->ic_con) & (~IC_CON_SPD_MSK));
switch (i2c_spd) { switch (i2c_spd) {
case IC_SPEED_MODE_MAX: case IC_SPEED_MODE_MAX:
cntl |= IC_CON_SPD_HS; cntl |= IC_CON_SPD_HS;
hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO; hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
writel(hcnt, &i2c_regs_p->ic_hs_scl_hcnt); writel(hcnt, &i2c_base->ic_hs_scl_hcnt);
lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO; lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
writel(lcnt, &i2c_regs_p->ic_hs_scl_lcnt); writel(lcnt, &i2c_base->ic_hs_scl_lcnt);
break; break;
case IC_SPEED_MODE_STANDARD: case IC_SPEED_MODE_STANDARD:
cntl |= IC_CON_SPD_SS; cntl |= IC_CON_SPD_SS;
hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO; hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
writel(hcnt, &i2c_regs_p->ic_ss_scl_hcnt); writel(hcnt, &i2c_base->ic_ss_scl_hcnt);
lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO; lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
writel(lcnt, &i2c_regs_p->ic_ss_scl_lcnt); writel(lcnt, &i2c_base->ic_ss_scl_lcnt);
break; break;
case IC_SPEED_MODE_FAST: case IC_SPEED_MODE_FAST:
default: default:
cntl |= IC_CON_SPD_FS; cntl |= IC_CON_SPD_FS;
hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO; hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
writel(hcnt, &i2c_regs_p->ic_fs_scl_hcnt); writel(hcnt, &i2c_base->ic_fs_scl_hcnt);
lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO; lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
writel(lcnt, &i2c_regs_p->ic_fs_scl_lcnt); writel(lcnt, &i2c_base->ic_fs_scl_lcnt);
break; break;
} }
writel(cntl, &i2c_regs_p->ic_con); writel(cntl, &i2c_base->ic_con);
/* Enable back i2c now speed set */ /* Enable back i2c now speed set */
enbl |= IC_ENABLE_0B; enbl |= IC_ENABLE_0B;
writel(enbl, &i2c_regs_p->ic_enable); writel(enbl, &i2c_base->ic_enable);
} }
/* /*
@ -77,7 +94,8 @@ static void set_speed(int i2c_spd)
* *
* Set the i2c speed. * Set the i2c speed.
*/ */
int i2c_set_bus_speed(unsigned int speed) static unsigned int dw_i2c_set_bus_speed(struct i2c_adapter *adap,
unsigned int speed)
{ {
int i2c_spd; int i2c_spd;
@ -88,28 +106,8 @@ int i2c_set_bus_speed(unsigned int speed)
else else
i2c_spd = IC_SPEED_MODE_STANDARD; i2c_spd = IC_SPEED_MODE_STANDARD;
set_speed(i2c_spd); set_speed(adap, i2c_spd);
adap->speed = speed;
return i2c_spd;
}
/*
* i2c_get_bus_speed - Gets the i2c speed
*
* Gets the i2c speed.
*/
unsigned int i2c_get_bus_speed(void)
{
u32 cntl;
cntl = (readl(&i2c_regs_p->ic_con) & IC_CON_SPD_MSK);
if (cntl == IC_CON_SPD_HS)
return I2C_MAX_SPEED;
else if (cntl == IC_CON_SPD_FS)
return I2C_FAST_SPEED;
else if (cntl == IC_CON_SPD_SS)
return I2C_STANDARD_SPEED;
return 0; return 0;
} }
@ -117,34 +115,32 @@ unsigned int i2c_get_bus_speed(void)
/* /*
* i2c_init - Init function * i2c_init - Init function
* @speed: required i2c speed * @speed: required i2c speed
* @slaveadd: slave address for the device * @slaveaddr: slave address for the device
* *
* Initialization function. * Initialization function.
*/ */
void i2c_init(int speed, int slaveadd) static void dw_i2c_init(struct i2c_adapter *adap, int speed,
int slaveaddr)
{ {
struct i2c_regs *i2c_base = i2c_get_base(adap);
unsigned int enbl; unsigned int enbl;
/* Disable i2c */ /* Disable i2c */
enbl = readl(&i2c_regs_p->ic_enable); enbl = readl(&i2c_base->ic_enable);
enbl &= ~IC_ENABLE_0B; enbl &= ~IC_ENABLE_0B;
writel(enbl, &i2c_regs_p->ic_enable); writel(enbl, &i2c_base->ic_enable);
writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_regs_p->ic_con); writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_base->ic_con);
writel(IC_RX_TL, &i2c_regs_p->ic_rx_tl); writel(IC_RX_TL, &i2c_base->ic_rx_tl);
writel(IC_TX_TL, &i2c_regs_p->ic_tx_tl); writel(IC_TX_TL, &i2c_base->ic_tx_tl);
i2c_set_bus_speed(speed); dw_i2c_set_bus_speed(adap, speed);
writel(IC_STOP_DET, &i2c_regs_p->ic_intr_mask); writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
writel(slaveadd, &i2c_regs_p->ic_sar); writel(slaveaddr, &i2c_base->ic_sar);
/* Enable i2c */ /* Enable i2c */
enbl = readl(&i2c_regs_p->ic_enable); enbl = readl(&i2c_base->ic_enable);
enbl |= IC_ENABLE_0B; enbl |= IC_ENABLE_0B;
writel(enbl, &i2c_regs_p->ic_enable); writel(enbl, &i2c_base->ic_enable);
#ifdef CONFIG_I2C_MULTI_BUS
bus_initialized[current_bus] = 1;
#endif
} }
/* /*
@ -153,21 +149,22 @@ void i2c_init(int speed, int slaveadd)
* *
* Sets the target slave address. * Sets the target slave address.
*/ */
static void i2c_setaddress(unsigned int i2c_addr) static void i2c_setaddress(struct i2c_adapter *adap, unsigned int i2c_addr)
{ {
struct i2c_regs *i2c_base = i2c_get_base(adap);
unsigned int enbl; unsigned int enbl;
/* Disable i2c */ /* Disable i2c */
enbl = readl(&i2c_regs_p->ic_enable); enbl = readl(&i2c_base->ic_enable);
enbl &= ~IC_ENABLE_0B; enbl &= ~IC_ENABLE_0B;
writel(enbl, &i2c_regs_p->ic_enable); writel(enbl, &i2c_base->ic_enable);
writel(i2c_addr, &i2c_regs_p->ic_tar); writel(i2c_addr, &i2c_base->ic_tar);
/* Enable i2c */ /* Enable i2c */
enbl = readl(&i2c_regs_p->ic_enable); enbl = readl(&i2c_base->ic_enable);
enbl |= IC_ENABLE_0B; enbl |= IC_ENABLE_0B;
writel(enbl, &i2c_regs_p->ic_enable); writel(enbl, &i2c_base->ic_enable);
} }
/* /*
@ -175,10 +172,12 @@ static void i2c_setaddress(unsigned int i2c_addr)
* *
* Flushes the i2c RX FIFO * Flushes the i2c RX FIFO
*/ */
static void i2c_flush_rxfifo(void) static void i2c_flush_rxfifo(struct i2c_adapter *adap)
{ {
while (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) struct i2c_regs *i2c_base = i2c_get_base(adap);
readl(&i2c_regs_p->ic_cmd_data);
while (readl(&i2c_base->ic_status) & IC_STATUS_RFNE)
readl(&i2c_base->ic_cmd_data);
} }
/* /*
@ -186,12 +185,13 @@ static void i2c_flush_rxfifo(void)
* *
* Waits for bus busy * Waits for bus busy
*/ */
static int i2c_wait_for_bb(void) static int i2c_wait_for_bb(struct i2c_adapter *adap)
{ {
struct i2c_regs *i2c_base = i2c_get_base(adap);
unsigned long start_time_bb = get_timer(0); unsigned long start_time_bb = get_timer(0);
while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) || while ((readl(&i2c_base->ic_status) & IC_STATUS_MA) ||
!(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) { !(readl(&i2c_base->ic_status) & IC_STATUS_TFE)) {
/* Evaluate timeout */ /* Evaluate timeout */
if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB)) if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB))
@ -201,40 +201,44 @@ static int i2c_wait_for_bb(void)
return 0; return 0;
} }
static int i2c_xfer_init(uchar chip, uint addr, int alen) static int i2c_xfer_init(struct i2c_adapter *adap, uchar chip, uint addr,
int alen)
{ {
if (i2c_wait_for_bb()) struct i2c_regs *i2c_base = i2c_get_base(adap);
if (i2c_wait_for_bb(adap))
return 1; return 1;
i2c_setaddress(chip); i2c_setaddress(adap, chip);
while (alen) { while (alen) {
alen--; alen--;
/* high byte address going out first */ /* high byte address going out first */
writel((addr >> (alen * 8)) & 0xff, writel((addr >> (alen * 8)) & 0xff,
&i2c_regs_p->ic_cmd_data); &i2c_base->ic_cmd_data);
} }
return 0; return 0;
} }
static int i2c_xfer_finish(void) static int i2c_xfer_finish(struct i2c_adapter *adap)
{ {
struct i2c_regs *i2c_base = i2c_get_base(adap);
ulong start_stop_det = get_timer(0); ulong start_stop_det = get_timer(0);
while (1) { while (1) {
if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) { if ((readl(&i2c_base->ic_raw_intr_stat) & IC_STOP_DET)) {
readl(&i2c_regs_p->ic_clr_stop_det); readl(&i2c_base->ic_clr_stop_det);
break; break;
} else if (get_timer(start_stop_det) > I2C_STOPDET_TO) { } else if (get_timer(start_stop_det) > I2C_STOPDET_TO) {
break; break;
} }
} }
if (i2c_wait_for_bb()) { if (i2c_wait_for_bb(adap)) {
printf("Timed out waiting for bus\n"); printf("Timed out waiting for bus\n");
return 1; return 1;
} }
i2c_flush_rxfifo(); i2c_flush_rxfifo(adap);
return 0; return 0;
} }
@ -249,8 +253,10 @@ static int i2c_xfer_finish(void)
* *
* Read from i2c memory. * Read from i2c memory.
*/ */
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) static int dw_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,
int alen, u8 *buffer, int len)
{ {
struct i2c_regs *i2c_base = i2c_get_base(adap);
unsigned long start_time_rx; unsigned long start_time_rx;
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
@ -265,25 +271,25 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
* still be one byte because the extra address bits are * still be one byte because the extra address bits are
* hidden in the chip address. * hidden in the chip address.
*/ */
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); dev |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8)); addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip, debug("%s: fix addr_overflow: dev %02x addr %02x\n", __func__, dev,
addr); addr);
#endif #endif
if (i2c_xfer_init(chip, addr, alen)) if (i2c_xfer_init(adap, dev, addr, alen))
return 1; return 1;
start_time_rx = get_timer(0); start_time_rx = get_timer(0);
while (len) { while (len) {
if (len == 1) if (len == 1)
writel(IC_CMD | IC_STOP, &i2c_regs_p->ic_cmd_data); writel(IC_CMD | IC_STOP, &i2c_base->ic_cmd_data);
else else
writel(IC_CMD, &i2c_regs_p->ic_cmd_data); writel(IC_CMD, &i2c_base->ic_cmd_data);
if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) { if (readl(&i2c_base->ic_status) & IC_STATUS_RFNE) {
*buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data); *buffer++ = (uchar)readl(&i2c_base->ic_cmd_data);
len--; len--;
start_time_rx = get_timer(0); start_time_rx = get_timer(0);
@ -292,7 +298,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
} }
} }
return i2c_xfer_finish(); return i2c_xfer_finish(adap);
} }
/* /*
@ -305,8 +311,10 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
* *
* Write to i2c memory. * Write to i2c memory.
*/ */
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) static int dw_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,
int alen, u8 *buffer, int len)
{ {
struct i2c_regs *i2c_base = i2c_get_base(adap);
int nb = len; int nb = len;
unsigned long start_time_tx; unsigned long start_time_tx;
@ -322,23 +330,25 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
* still be one byte because the extra address bits are * still be one byte because the extra address bits are
* hidden in the chip address. * hidden in the chip address.
*/ */
chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); dev |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8)); addr &= ~(CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW << (alen * 8));
debug("%s: fix addr_overflow: chip %02x addr %02x\n", __func__, chip, debug("%s: fix addr_overflow: dev %02x addr %02x\n", __func__, dev,
addr); addr);
#endif #endif
if (i2c_xfer_init(chip, addr, alen)) if (i2c_xfer_init(adap, dev, addr, alen))
return 1; return 1;
start_time_tx = get_timer(0); start_time_tx = get_timer(0);
while (len) { while (len) {
if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) { if (readl(&i2c_base->ic_status) & IC_STATUS_TFNF) {
if (--len == 0) if (--len == 0) {
writel(*buffer | IC_STOP, &i2c_regs_p->ic_cmd_data); writel(*buffer | IC_STOP,
else &i2c_base->ic_cmd_data);
writel(*buffer, &i2c_regs_p->ic_cmd_data); } else {
writel(*buffer, &i2c_base->ic_cmd_data);
}
buffer++; buffer++;
start_time_tx = get_timer(0); start_time_tx = get_timer(0);
@ -348,13 +358,13 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
} }
} }
return i2c_xfer_finish(); return i2c_xfer_finish(adap);
} }
/* /*
* i2c_probe - Probe the i2c chip * i2c_probe - Probe the i2c chip
*/ */
int i2c_probe(uchar chip) static int dw_i2c_probe(struct i2c_adapter *adap, u8 dev)
{ {
u32 tmp; u32 tmp;
int ret; int ret;
@ -362,80 +372,31 @@ int i2c_probe(uchar chip)
/* /*
* Try to read the first location of the chip. * Try to read the first location of the chip.
*/ */
ret = i2c_read(chip, 0, 1, (uchar *)&tmp, 1); ret = dw_i2c_read(adap, dev, 0, 1, (uchar *)&tmp, 1);
if (ret) if (ret)
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); dw_i2c_init(adap, adap->speed, adap->slaveaddr);
return ret; return ret;
} }
#ifdef CONFIG_I2C_MULTI_BUS U_BOOT_I2C_ADAP_COMPLETE(dw_0, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
int i2c_set_bus_num(unsigned int bus) dw_i2c_write, dw_i2c_set_bus_speed,
{ CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
switch (bus) {
case 0:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE;
break;
#ifdef CONFIG_SYS_I2C_BASE1
case 1:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE1;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE2
case 2:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE2;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE3
case 3:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE3;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE4
case 4:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE4;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE5
case 5:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE5;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE6
case 6:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE6;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE7
case 7:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE7;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE8
case 8:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE8;
break;
#endif
#ifdef CONFIG_SYS_I2C_BASE9
case 9:
i2c_regs_p = (void *)CONFIG_SYS_I2C_BASE9;
break;
#endif
default:
printf("Bad bus: %d\n", bus);
return -1;
}
current_bus = bus; #if CONFIG_SYS_I2C_BUS_MAX >= 2
U_BOOT_I2C_ADAP_COMPLETE(dw_1, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
if (!bus_initialized[current_bus]) dw_i2c_write, dw_i2c_set_bus_speed,
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); CONFIG_SYS_I2C_SPEED1, CONFIG_SYS_I2C_SLAVE1, 1)
#endif
return 0;
} #if CONFIG_SYS_I2C_BUS_MAX >= 3
U_BOOT_I2C_ADAP_COMPLETE(dw_2, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
unsigned int i2c_get_bus_num(void) dw_i2c_write, dw_i2c_set_bus_speed,
{ CONFIG_SYS_I2C_SPEED2, CONFIG_SYS_I2C_SLAVE2, 2)
return current_bus; #endif
}
#if CONFIG_SYS_I2C_BUS_MAX >= 4
U_BOOT_I2C_ADAP_COMPLETE(dw_3, dw_i2c_init, dw_i2c_probe, dw_i2c_read,
dw_i2c_write, dw_i2c_set_bus_speed,
CONFIG_SYS_I2C_SPEED3, CONFIG_SYS_I2C_SLAVE3, 3)
#endif #endif

9
include/configs/axs101.h
View file

@ -83,12 +83,15 @@
/* /*
* I2C configuration * I2C configuration
*/ */
#define CONFIG_HARD_I2C #define CONFIG_SYS_I2C
#define CONFIG_DW_I2C #define CONFIG_SYS_I2C_DW
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_ENV_EEPROM_BUS 2 #define CONFIG_I2C_ENV_EEPROM_BUS 2
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SPEED1 100000
#define CONFIG_SYS_I2C_SPEED2 100000
#define CONFIG_SYS_I2C_SLAVE 0 #define CONFIG_SYS_I2C_SLAVE 0
#define CONFIG_SYS_I2C_SLAVE1 0
#define CONFIG_SYS_I2C_SLAVE2 0
#define CONFIG_SYS_I2C_BASE 0xE001D000 #define CONFIG_SYS_I2C_BASE 0xE001D000
#define CONFIG_SYS_I2C_BASE1 0xE001E000 #define CONFIG_SYS_I2C_BASE1 0xE001E000
#define CONFIG_SYS_I2C_BASE2 0xE001F000 #define CONFIG_SYS_I2C_BASE2 0xE001F000

4
include/configs/spear-common.h
View file

@ -37,8 +37,8 @@
#define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0" #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0"
/* I2C driver configuration */ /* I2C driver configuration */
#define CONFIG_HARD_I2C #define CONFIG_SYS_I2C
#define CONFIG_DW_I2C #define CONFIG_SYS_I2C_DW
#if defined(CONFIG_SPEAR600) #if defined(CONFIG_SPEAR600)
#define CONFIG_SYS_I2C_BASE 0xD0200000 #define CONFIG_SYS_I2C_BASE 0xD0200000
#elif defined(CONFIG_SPEAR300) #elif defined(CONFIG_SPEAR300)

4
include/configs/x600.h
View file

@ -83,8 +83,8 @@
#define CONFIG_SPEAR_GPIO #define CONFIG_SPEAR_GPIO
/* I2C config options */ /* I2C config options */
#define CONFIG_HARD_I2C #define CONFIG_SYS_I2C
#define CONFIG_DW_I2C #define CONFIG_SYS_I2C_DW
#define CONFIG_SYS_I2C_BASE 0xD0200000 #define CONFIG_SYS_I2C_BASE 0xD0200000
#define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x02 #define CONFIG_SYS_I2C_SLAVE 0x02