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sh: tmu: Fix SH4 TCNT0 offset
Fix the offset of TCNT0 register, which is 0xc on SH4. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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@ -10,7 +10,7 @@
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/* Timer */
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0x8) /* TCNT0 */
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#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
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#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
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#endif
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