mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
Add driver for S-ATA-controller on Intel processors with South
Bridge, ICH-5, ICH-6 and ICH-7. Implementation: 1. Code is divided in to two files. All functions, which are controller specific are kept in "drivers/ata_piix.c" file and functions, which are not controller specific, are kept in "common/cmd_sata.c" file. 2. Reading and Writing from the S-ATA drive is done using PIO method. 3. Driver can be configured for 48-bit addressing by defining macro CONFIG_LBA48, if this macro is not defined driver uses the 28-bit addressing. 4. S-ATA read function is hooked to the File system, commands like ext2ls and ext2load file can be used. This has been tested. 5. U-Boot command "SATA_init" is added, which initializes the S-ATA controller and identifies the S-ATA drives connected to it. 6. U-Boot command "sata" is added, which is used to read/write, print partition table and get info about the drives present. This I have implemented in same way as "ide" command is implemented in U-Boot. 7. This driver is for S-ATA in native mode. 8. This driver does not support the Native command queuing and Hot-plugging. Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
This commit is contained in:
mushtaq khan
Wolfgang Denk
parent
644e6fb4eb
commit
66d9dbec1c
7 changed files with 1106 additions and 3 deletions
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@ -38,8 +38,8 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o cmd_autoscript.o \
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cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \
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cmd_nand.o cmd_net.o cmd_nvedit.o \
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cmd_pci.o cmd_pcmcia.o cmd_portio.o \
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cmd_reginfo.o cmd_reiser.o cmd_scsi.o cmd_spi.o cmd_universe.o \
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cmd_usb.o cmd_vfd.o \
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cmd_reginfo.o cmd_reiser.o cmd_sata.o cmd_scsi.o cmd_spi.o \
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cmd_universe.o cmd_usb.o cmd_vfd.o \
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command.o console.o cyclon2.o devices.o dlmalloc.o docecc.o \
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environment.o env_common.o \
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env_nand.o env_dataflash.o env_flash.o env_eeprom.o \
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710
common/cmd_sata.c
Normal file
710
common/cmd_sata.c
Normal file
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@ -0,0 +1,710 @@
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/*
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* Copyright (C) Procsys. All rights reserved.
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* Author: Mushtaq Khan <mushtaq_k@procsys.com>
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<mushtaqk_921@yahoo.co.in>
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*
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* with the reference to libata in kernel 2.4.32
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*
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*/
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/*File contains SATA read-write and other utility functions.*/
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#include <common.h>
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#include <asm/io.h>
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#include <pci.h>
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#include <command.h>
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#include <config.h>
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#include <ide.h>
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#include <ata.h>
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#ifdef CFG_SATA_SUPPORTED
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/*For debug prints set macro DEBUG_SATA to 1 */
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#define DEBUG_SATA 0
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/*Macro for SATA library specific declarations */
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#define SATA_DECL
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#include <sata.h>
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#undef SATA_DECL
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static u8 __inline__
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sata_inb (unsigned long ioaddr)
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{
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return inb (ioaddr);
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}
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static void __inline__
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sata_outb (unsigned char val, unsigned long ioaddr)
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{
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outb (val, ioaddr);
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}
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static void
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output_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
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{
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outsw (ioaddr->data_addr, sect_buf, words << 1);
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}
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static int
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input_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
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{
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insw (ioaddr->data_addr, sect_buf, words << 1);
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return 0;
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}
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static void
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sata_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
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{
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unsigned char *end, *last;
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last = dst;
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end = src + len - 1;
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/* reserve space for '\0' */
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if (len < 2)
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goto OUT;
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/* skip leading white space */
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while ((*src) && (src < end) && (*src == ' '))
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++src;
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/* copy string, omitting trailing white space */
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while ((*src) && (src < end)) {
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*dst++ = *src;
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if (*src++ != ' ')
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last = dst;
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}
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OUT:
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*last = '\0';
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}
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int
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sata_bus_softreset (int num)
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{
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u8 dev = 0, status = 0, i;
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port[num].dev_mask = 0;
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for (i = 0; i < CFG_SATA_DEVS_PER_BUS; i++) {
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if (!(sata_devchk (&port[num].ioaddr, i))) {
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PRINTF ("dev_chk failed for dev#%d\n", i);
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} else {
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port[num].dev_mask |= (1 << i);
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PRINTF ("dev_chk passed for dev#%d\n", i);
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}
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}
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if (!(port[num].dev_mask)) {
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printf ("no devices on port%d\n", num);
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return 1;
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}
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dev_select (&port[num].ioaddr, dev);
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port[num].ctl_reg = 0x08; /*Default value of control reg */
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sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
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udelay (10);
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sata_outb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
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udelay (10);
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sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
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/* spec mandates ">= 2ms" before checking status.
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* We wait 150ms, because that was the magic delay used for
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* ATAPI devices in Hale Landis's ATADRVR, for the period of time
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* between when the ATA command register is written, and then
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* status is checked. Because waiting for "a while" before
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* checking status is fine, post SRST, we perform this magic
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* delay here as well.
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*/
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msleep (150);
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status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300);
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while ((status & ATA_BUSY)) {
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msleep (100);
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status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 3);
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}
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if (status & ATA_BUSY)
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printf ("ata%u is slow to respond,plz be patient\n", port);
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while ((status & ATA_BUSY)) {
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msleep (100);
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status = sata_chk_status (&port[num].ioaddr);
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}
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if (status & ATA_BUSY) {
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printf ("ata%u failed to respond : ", port);
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printf ("bus reset failed\n");
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return 1;
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}
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return 0;
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}
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void
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sata_identify (int num, int dev)
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{
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u8 cmd = 0, status = 0, devno = num * CFG_SATA_DEVS_PER_BUS + dev;
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u16 iobuf[ATA_SECT_SIZE];
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u64 n_sectors = 0;
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u8 mask = 0;
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memset (iobuf, 0, sizeof (iobuf));
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hd_driveid_t *iop = (hd_driveid_t *) iobuf;
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if (dev == 0)
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mask = 0x01;
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else
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mask = 0x02;
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if (!(port[num].dev_mask & mask)) {
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printf ("dev%d is not present on port#%d\n", dev, num);
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return;
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}
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printf ("port=%d dev=%d\n", num, dev);
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dev_select (&port[num].ioaddr, dev);
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status = 0;
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cmd = ATA_CMD_IDENT; /*Device Identify Command */
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sata_outb (cmd, port[num].ioaddr.command_addr);
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sata_inb (port[num].ioaddr.altstatus_addr);
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udelay (10);
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status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 1000);
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if (status & ATA_ERR) {
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printf ("\ndevice not responding\n");
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port[num].dev_mask &= ~mask;
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return;
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}
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input_data (&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
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PRINTF ("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
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"86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
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iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
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iobuf[87], iobuf[88]);
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/* we require LBA and DMA support (bits 8 & 9 of word 49) */
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if (!ata_id_has_dma (iobuf) || !ata_id_has_lba (iobuf)) {
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PRINTF ("ata%u: no dma/lba\n", num);
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}
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ata_dump_id (iobuf);
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if (ata_id_has_lba48 (iobuf)) {
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n_sectors = ata_id_u64 (iobuf, 100);
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} else {
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n_sectors = ata_id_u32 (iobuf, 60);
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}
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PRINTF ("no. of sectors %u\n", ata_id_u64 (iobuf, 100));
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PRINTF ("no. of sectors %u\n", ata_id_u32 (iobuf, 60));
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if (n_sectors == 0) {
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port[num].dev_mask &= ~mask;
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return;
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}
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sata_cpy (sata_dev_desc[devno].revision, iop->fw_rev,
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sizeof (sata_dev_desc[devno].revision));
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sata_cpy (sata_dev_desc[devno].vendor, iop->model,
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sizeof (sata_dev_desc[devno].vendor));
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sata_cpy (sata_dev_desc[devno].product, iop->serial_no,
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sizeof (sata_dev_desc[devno].product));
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strswab (sata_dev_desc[devno].revision);
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strswab (sata_dev_desc[devno].vendor);
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if ((iop->config & 0x0080) == 0x0080) {
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sata_dev_desc[devno].removable = 1;
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} else {
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sata_dev_desc[devno].removable = 0;
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}
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sata_dev_desc[devno].lba = iop->lba_capacity;
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PRINTF ("lba=0x%x", sata_dev_desc[devno].lba);
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#ifdef CONFIG_LBA48
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if (iop->command_set_2 & 0x0400) {
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sata_dev_desc[devno].lba48 = 1;
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lba = (unsigned long long) iop->lba48_capacity[0] |
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((unsigned long long) iop->lba48_capacity[1] << 16) |
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((unsigned long long) iop->lba48_capacity[2] << 32) |
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((unsigned long long) iop->lba48_capacity[3] << 48);
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} else {
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sata_dev_desc[devno].lba48 = 0;
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}
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#endif
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/* assuming HD */
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sata_dev_desc[devno].type = DEV_TYPE_HARDDISK;
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sata_dev_desc[devno].blksz = ATA_BLOCKSIZE;
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sata_dev_desc[devno].lun = 0; /* just to fill something in... */
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}
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void
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set_Feature_cmd (int num, int dev)
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{
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u8 mask = 0x00, status = 0;
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if (dev == 0)
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mask = 0x01;
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else
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mask = 0x02;
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if (!(port[num].dev_mask & mask)) {
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PRINTF ("dev%d is not present on port#%d\n", dev, num);
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return;
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}
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dev_select (&port[num].ioaddr, dev);
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sata_outb (SETFEATURES_XFER, port[num].ioaddr.feature_addr);
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sata_outb (XFER_PIO_4, port[num].ioaddr.nsect_addr);
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sata_outb (0, port[num].ioaddr.lbal_addr);
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sata_outb (0, port[num].ioaddr.lbam_addr);
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sata_outb (0, port[num].ioaddr.lbah_addr);
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sata_outb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
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sata_outb (ATA_CMD_SETF, port[num].ioaddr.command_addr);
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udelay (50);
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msleep (150);
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status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 5000);
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if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
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printf ("Error : status 0x%02x\n", status);
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port[num].dev_mask &= ~mask;
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}
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}
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void
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sata_port (struct sata_ioports *ioport)
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{
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ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
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ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
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ioport->feature_addr = ioport->cmd_addr + ATA_REG_FEATURE;
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ioport->nsect_addr = ioport->cmd_addr + ATA_REG_NSECT;
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ioport->lbal_addr = ioport->cmd_addr + ATA_REG_LBAL;
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ioport->lbam_addr = ioport->cmd_addr + ATA_REG_LBAM;
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ioport->lbah_addr = ioport->cmd_addr + ATA_REG_LBAH;
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ioport->device_addr = ioport->cmd_addr + ATA_REG_DEVICE;
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ioport->status_addr = ioport->cmd_addr + ATA_REG_STATUS;
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ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
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}
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int
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sata_devchk (struct sata_ioports *ioaddr, int dev)
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{
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u8 nsect, lbal;
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dev_select (ioaddr, dev);
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sata_outb (0x55, ioaddr->nsect_addr);
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sata_outb (0xaa, ioaddr->lbal_addr);
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sata_outb (0xaa, ioaddr->nsect_addr);
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sata_outb (0x55, ioaddr->lbal_addr);
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sata_outb (0x55, ioaddr->nsect_addr);
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sata_outb (0xaa, ioaddr->lbal_addr);
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nsect = sata_inb (ioaddr->nsect_addr);
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lbal = sata_inb (ioaddr->lbal_addr);
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if ((nsect == 0x55) && (lbal == 0xaa))
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return 1; /* we found a device */
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else
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return 0; /* nothing found */
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}
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void
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dev_select (struct sata_ioports *ioaddr, int dev)
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{
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u8 tmp = 0;
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if (dev == 0)
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tmp = ATA_DEVICE_OBS;
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else
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tmp = ATA_DEVICE_OBS | ATA_DEV1;
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sata_outb (tmp, ioaddr->device_addr);
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sata_inb (ioaddr->altstatus_addr);
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udelay (5);
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}
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u8
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sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max)
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{
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u8 status;
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do {
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udelay (1000);
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status = sata_chk_status (ioaddr);
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max--;
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} while ((status & bits) && (max > 0));
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return status;
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}
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u8
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sata_chk_status (struct sata_ioports * ioaddr)
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{
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return sata_inb (ioaddr->status_addr);
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}
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void
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msleep (int count)
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{
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int i;
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for (i = 0; i < count; i++)
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udelay (1000);
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}
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ulong
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sata_read (int device, lbaint_t blknr, ulong blkcnt, ulong * buffer)
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{
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ulong n = 0;
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u8 dev = 0, num = 0, mask = 0, status = 0;
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#ifdef CONFIG_LBA48
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unsigned char lba48 = 0;
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if (blknr & 0x0000fffff0000000) {
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if (!sata_dev_desc[devno].lba48) {
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printf ("Drive doesn't support 48-bit addressing\n");
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return 0;
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}
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/* more than 28 bits used, use 48bit mode */
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lba48 = 1;
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}
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#endif
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/*Port Number */
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num = device / CFG_SATA_DEVS_PER_BUS;
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/*dev on the port */
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if (device >= CFG_SATA_DEVS_PER_BUS)
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dev = device - CFG_SATA_DEVS_PER_BUS;
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else
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dev = device;
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if (dev == 0)
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mask = 0x01;
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else
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mask = 0x02;
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if (!(port[num].dev_mask & mask)) {
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printf ("dev%d is not present on port#%d\n", dev, num);
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return 0;
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}
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/* Select device */
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dev_select (&port[num].ioaddr, dev);
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status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
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if (status & ATA_BUSY) {
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printf ("ata%u failed to respond\n", port[num].port_no);
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return n;
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}
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while (blkcnt-- > 0) {
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status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
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if (status & ATA_BUSY) {
|
||||
printf ("ata%u failed to respond\n", 0);
|
||||
return n;
|
||||
}
|
||||
#ifdef CONFIG_LBA48
|
||||
if (lba48) {
|
||||
/* write high bits */
|
||||
sata_outb (0, port[num].ioaddr.nsect_addr);
|
||||
sata_outb ((blknr >> 24) & 0xFF,
|
||||
port[num].ioaddr.lbal_addr);
|
||||
sata_outb ((blknr >> 32) & 0xFF,
|
||||
port[num].ioaddr.lbam_addr);
|
||||
sata_outb ((blknr >> 40) & 0xFF,
|
||||
port[num].ioaddr.lbah_addr);
|
||||
}
|
||||
#endif
|
||||
sata_outb (1, port[num].ioaddr.nsect_addr);
|
||||
sata_outb (((blknr) >> 0) & 0xFF,
|
||||
port[num].ioaddr.lbal_addr);
|
||||
sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
|
||||
sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
|
||||
|
||||
#ifdef CONFIG_LBA48
|
||||
if (lba48) {
|
||||
sata_outb (ATA_LBA, port[num].ioaddr.device_addr);
|
||||
sata_outb (ATA_CMD_READ_EXT,
|
||||
port[num].ioaddr.command_addr);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
sata_outb (ATA_LBA | ((blknr >> 24) & 0xF),
|
||||
port[num].ioaddr.device_addr);
|
||||
sata_outb (ATA_CMD_READ,
|
||||
port[num].ioaddr.command_addr);
|
||||
}
|
||||
|
||||
msleep (50);
|
||||
/*may take up to 4 sec */
|
||||
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000);
|
||||
|
||||
if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
|
||||
!= ATA_STAT_DRQ) {
|
||||
u8 err = 0;
|
||||
|
||||
printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
|
||||
device, (ulong) blknr, status);
|
||||
err = sata_inb (port[num].ioaddr.error_addr);
|
||||
printf ("Error reg = 0x%x\n", err);
|
||||
return (n);
|
||||
}
|
||||
input_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS);
|
||||
sata_inb (port[num].ioaddr.altstatus_addr);
|
||||
udelay (50);
|
||||
|
||||
++n;
|
||||
++blknr;
|
||||
buffer += ATA_SECTORWORDS;
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
||||
ulong
|
||||
sata_write (int device, lbaint_t blknr, ulong blkcnt, ulong * buffer)
|
||||
{
|
||||
ulong n = 0;
|
||||
unsigned char status = 0, num = 0, dev = 0, mask = 0;
|
||||
|
||||
#ifdef CONFIG_LBA48
|
||||
unsigned char lba48 = 0;
|
||||
|
||||
if (blknr & 0x0000fffff0000000) {
|
||||
if (!sata_dev_desc[devno].lba48) {
|
||||
printf ("Drive doesn't support 48-bit addressing\n");
|
||||
return 0;
|
||||
}
|
||||
/* more than 28 bits used, use 48bit mode */
|
||||
lba48 = 1;
|
||||
}
|
||||
#endif
|
||||
/*Port Number */
|
||||
num = device / CFG_SATA_DEVS_PER_BUS;
|
||||
/*dev on the Port */
|
||||
if (device >= CFG_SATA_DEVS_PER_BUS)
|
||||
dev = device - CFG_SATA_DEVS_PER_BUS;
|
||||
else
|
||||
dev = device;
|
||||
|
||||
if (dev == 0)
|
||||
mask = 0x01;
|
||||
else
|
||||
mask = 0x02;
|
||||
|
||||
/* Select device */
|
||||
dev_select (&port[num].ioaddr, dev);
|
||||
|
||||
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
|
||||
if (status & ATA_BUSY) {
|
||||
printf ("ata%u failed to respond\n", port[num].port_no);
|
||||
return n;
|
||||
}
|
||||
|
||||
while (blkcnt-- > 0) {
|
||||
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
|
||||
if (status & ATA_BUSY) {
|
||||
printf ("ata%u failed to respond\n",
|
||||
port[num].port_no);
|
||||
return n;
|
||||
}
|
||||
#ifdef CONFIG_LBA48
|
||||
if (lba48) {
|
||||
/* write high bits */
|
||||
sata_outb (0, port[num].ioaddr.nsect_addr);
|
||||
sata_outb ((blknr >> 24) & 0xFF,
|
||||
port[num].ioaddr.lbal_addr);
|
||||
sata_outb ((blknr >> 32) & 0xFF,
|
||||
port[num].ioaddr.lbam_addr);
|
||||
sata_outb ((blknr >> 40) & 0xFF,
|
||||
port[num].ioaddr.lbah_addr);
|
||||
}
|
||||
#endif
|
||||
sata_outb (1, port[num].ioaddr.nsect_addr);
|
||||
sata_outb ((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr);
|
||||
sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
|
||||
sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
|
||||
#ifdef CONFIG_LBA48
|
||||
if (lba48) {
|
||||
sata_outb (ATA_LBA, port[num].ioaddr.device_addr);
|
||||
sata_outb (ATA_CMD_WRITE_EXT,
|
||||
port[num].ioaddr.command_addr);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
sata_outb (ATA_LBA | ((blknr >> 24) & 0xF),
|
||||
port[num].ioaddr.device_addr);
|
||||
sata_outb (ATA_CMD_WRITE,
|
||||
port[num].ioaddr.command_addr);
|
||||
}
|
||||
|
||||
msleep (50);
|
||||
/*may take up to 4 sec */
|
||||
status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000);
|
||||
if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
|
||||
!= ATA_STAT_DRQ) {
|
||||
printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
|
||||
device, (ulong) blknr, status);
|
||||
return (n);
|
||||
}
|
||||
|
||||
output_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS);
|
||||
sata_inb (port[num].ioaddr.altstatus_addr);
|
||||
udelay (50);
|
||||
|
||||
++n;
|
||||
++blknr;
|
||||
buffer += ATA_SECTORWORDS;
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
||||
block_dev_desc_t *sata_get_dev (int dev);
|
||||
|
||||
block_dev_desc_t *
|
||||
sata_get_dev (int dev)
|
||||
{
|
||||
return ((block_dev_desc_t *) & sata_dev_desc[dev]);
|
||||
}
|
||||
|
||||
int
|
||||
do_sata (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
|
||||
{
|
||||
|
||||
switch (argc) {
|
||||
case 0:
|
||||
case 1:
|
||||
printf ("Usage:\n%s\n", cmdtp->usage);
|
||||
return 1;
|
||||
case 2:
|
||||
if (strncmp (argv[1], "init", 4) == 0) {
|
||||
int rcode = 0;
|
||||
|
||||
rcode = init_sata ();
|
||||
if (rcode)
|
||||
printf ("Sata initialization Failed\n");
|
||||
return rcode;
|
||||
} else if (strncmp (argv[1], "inf", 3) == 0) {
|
||||
int i;
|
||||
|
||||
putc ('\n');
|
||||
for (i = 0; i < CFG_SATA_MAXDEVICES; ++i) {
|
||||
/*List only known devices */
|
||||
if (sata_dev_desc[i].type ==
|
||||
DEV_TYPE_UNKNOWN)
|
||||
continue;
|
||||
printf ("sata dev %d: ", i);
|
||||
dev_print (&sata_dev_desc[i]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
printf ("Usage:\n%s\n", cmdtp->usage);
|
||||
return 1;
|
||||
case 3:
|
||||
if (strcmp (argv[1], "dev") == 0) {
|
||||
int dev = (int) simple_strtoul (argv[2], NULL, 10);
|
||||
|
||||
if (dev >= CFG_SATA_MAXDEVICES) {
|
||||
printf ("\nSata dev %d not available\n",
|
||||
dev);
|
||||
return 1;
|
||||
}
|
||||
printf ("\nSATA dev %d: ", dev);
|
||||
dev_print (&sata_dev_desc[dev]);
|
||||
if (sata_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
|
||||
return 1;
|
||||
curr_dev = dev;
|
||||
return 0;
|
||||
} else if (strcmp (argv[1], "part") == 0) {
|
||||
int dev = (int) simple_strtoul (argv[2], NULL, 10);
|
||||
|
||||
if (dev >= CFG_SATA_MAXDEVICES) {
|
||||
printf ("\nSata dev %d not available\n",
|
||||
dev);
|
||||
return 1;
|
||||
}
|
||||
PRINTF ("\nSATA dev %d: ", dev);
|
||||
if (sata_dev_desc[dev].part_type !=
|
||||
PART_TYPE_UNKNOWN) {
|
||||
print_part (&sata_dev_desc[dev]);
|
||||
} else {
|
||||
printf ("\nSata dev %d partition type "
|
||||
"unknown\n", dev);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
printf ("Usage:\n%s\n", cmdtp->usage);
|
||||
return 1;
|
||||
default:
|
||||
if (argc < 5) {
|
||||
printf ("Usage:\n%s\n", cmdtp->usage);
|
||||
return 1;
|
||||
}
|
||||
if (strcmp (argv[1], "read") == 0) {
|
||||
ulong addr = simple_strtoul (argv[2], NULL, 16);
|
||||
ulong cnt = simple_strtoul (argv[4], NULL, 16);
|
||||
ulong n;
|
||||
lbaint_t blk = simple_strtoul (argv[3], NULL, 16);
|
||||
|
||||
memset ((int *) addr, 0, cnt * 512);
|
||||
printf ("\nSATA read: dev %d blk # %ld,"
|
||||
"count %ld ... ", curr_dev, blk, cnt);
|
||||
n = sata_read (curr_dev, blk, cnt, (ulong *) addr);
|
||||
/* flush cache after read */
|
||||
flush_cache (addr, cnt * 512);
|
||||
printf ("%ld blocks read: %s\n", n,
|
||||
(n == cnt) ? "OK" : "ERR");
|
||||
if (n == cnt)
|
||||
return 1;
|
||||
else
|
||||
return 0;
|
||||
} else if (strcmp (argv[1], "write") == 0) {
|
||||
ulong addr = simple_strtoul (argv[2], NULL, 16);
|
||||
ulong cnt = simple_strtoul (argv[4], NULL, 16);
|
||||
ulong n;
|
||||
lbaint_t blk = simple_strtoul (argv[3], NULL, 16);
|
||||
|
||||
printf ("\nSata write: dev %d blk # %ld,"
|
||||
"count %ld ... ", curr_dev, blk, cnt);
|
||||
n = sata_write (curr_dev, blk, cnt, (ulong *) addr);
|
||||
printf ("%ld blocks written: %s\n", n,
|
||||
(n == cnt) ? "OK" : "ERR");
|
||||
if (n == cnt)
|
||||
return 1;
|
||||
else
|
||||
return 0;
|
||||
} else {
|
||||
printf ("Usage:\n%s\n", cmdtp->usage);
|
||||
return 1;
|
||||
}
|
||||
} /*End OF SWITCH */
|
||||
}
|
||||
|
||||
U_BOOT_CMD (sata, 5, 1, do_sata,
|
||||
"sata init\n"
|
||||
"sata info\n"
|
||||
"sata part device\n"
|
||||
"sata dev device\n"
|
||||
"sata read addr blk# cnt\n"
|
||||
"sata write addr blk# cnt\n", "cmd for init,rw and dev-info\n");
|
||||
|
||||
#endif
|
||||
|
|
@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk
|
|||
|
||||
LIB = $(obj)libdrivers.a
|
||||
|
||||
COBJS = 3c589.o 5701rls.o ali512x.o atmel_usart.o \
|
||||
COBJS = 3c589.o 5701rls.o ali512x.o ata_piix.o atmel_usart.o \
|
||||
bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
|
||||
cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
|
||||
e1000.o eepro100.o \
|
||||
|
|
|
|||
216
drivers/ata_piix.c
Normal file
216
drivers/ata_piix.c
Normal file
|
|
@ -0,0 +1,216 @@
|
|||
/*
|
||||
* Copyright (C) Procsys. All rights reserved.
|
||||
* Author: Mushtaq Khan <mushtaq_k@procsys.com>
|
||||
<mushtaqk_921@yahoo.co.in>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
* with the reference to ata_piix driver in kernel 2.4.32
|
||||
*/
|
||||
|
||||
/*
|
||||
This file contains SATA controller and SATA drive initialization functions
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <pci.h>
|
||||
#include <command.h>
|
||||
#include <config.h>
|
||||
#include <asm/byteorder.h>
|
||||
#include <ide.h>
|
||||
#include <ata.h>
|
||||
|
||||
#ifdef CFG_ATA_PIIX /*ata_piix driver */
|
||||
|
||||
#define DEBUG_SATA 0 /*For debug prints set DEBUG_SATA to 1 */
|
||||
|
||||
#define DRV_DECL /*For file specific declarations */
|
||||
#include <sata.h>
|
||||
#undef DRV_DECL
|
||||
|
||||
/*Macros realted to PCI*/
|
||||
#define PCI_SATA_BUS 0x00
|
||||
#define PCI_SATA_DEV 0x1f
|
||||
#define PCI_SATA_FUNC 0x02
|
||||
|
||||
#define PCI_SATA_BASE1 0x10
|
||||
#define PCI_SATA_BASE2 0x14
|
||||
#define PCI_SATA_BASE3 0x18
|
||||
#define PCI_SATA_BASE4 0x1c
|
||||
#define PCI_SATA_BASE5 0x20
|
||||
#define PCI_PMR 0x90
|
||||
#define PCI_PI 0x09
|
||||
#define PCI_PCS 0x92
|
||||
#define PCI_DMA_CTL 0x48
|
||||
|
||||
#define PORT_PRESENT (1<<0)
|
||||
#define PORT_ENABLED (1<<4)
|
||||
|
||||
u32 bdf;
|
||||
u32 iobase1 = 0; /*Primary cmd block */
|
||||
u32 iobase2 = 0; /*Primary ctl block */
|
||||
u32 iobase3 = 0; /*Sec cmd block */
|
||||
u32 iobase4 = 0; /*sec ctl block */
|
||||
u32 iobase5 = 0; /*BMDMA*/
|
||||
int
|
||||
pci_sata_init (void)
|
||||
{
|
||||
u32 bus = PCI_SATA_BUS;
|
||||
u32 dev = PCI_SATA_DEV;
|
||||
u32 fun = PCI_SATA_FUNC;
|
||||
u16 cmd = 0;
|
||||
u8 lat = 0, pcibios_max_latency = 0xff;
|
||||
u8 pmr; /*Port mapping reg */
|
||||
u8 pi; /*Prgming Interface reg */
|
||||
|
||||
bdf = PCI_BDF (bus, dev, fun);
|
||||
pci_read_config_dword (bdf, PCI_SATA_BASE1, &iobase1);
|
||||
pci_read_config_dword (bdf, PCI_SATA_BASE2, &iobase2);
|
||||
pci_read_config_dword (bdf, PCI_SATA_BASE3, &iobase3);
|
||||
pci_read_config_dword (bdf, PCI_SATA_BASE4, &iobase4);
|
||||
pci_read_config_dword (bdf, PCI_SATA_BASE5, &iobase5);
|
||||
|
||||
if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
|
||||
(iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
|
||||
(iobase5 == 0xFFFFFFFF)) {
|
||||
printf ("error no base addr for SATA controller\n");
|
||||
return 1;
|
||||
/*ERROR*/}
|
||||
|
||||
iobase1 &= 0xFFFFFFFE;
|
||||
iobase2 &= 0xFFFFFFFE;
|
||||
iobase3 &= 0xFFFFFFFE;
|
||||
iobase4 &= 0xFFFFFFFE;
|
||||
iobase5 &= 0xFFFFFFFE;
|
||||
|
||||
/*check for mode */
|
||||
pci_read_config_byte (bdf, PCI_PMR, &pmr);
|
||||
if (pmr > 1) {
|
||||
printf ("combined mode not supported\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
pci_read_config_byte (bdf, PCI_PI, &pi);
|
||||
if ((pi & 0x05) != 0x05) {
|
||||
printf ("Sata is in Legacy mode\n");
|
||||
return 1;
|
||||
} else {
|
||||
printf ("sata is in Native mode\n");
|
||||
}
|
||||
|
||||
/*MASTER CFG AND IO CFG */
|
||||
pci_read_config_word (bdf, PCI_COMMAND, &cmd);
|
||||
cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
|
||||
pci_write_config_word (bdf, PCI_COMMAND, cmd);
|
||||
pci_read_config_byte (dev, PCI_LATENCY_TIMER, &lat);
|
||||
|
||||
if (lat < 16)
|
||||
lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
|
||||
else if (lat > pcibios_max_latency)
|
||||
lat = pcibios_max_latency;
|
||||
pci_write_config_byte (dev, PCI_LATENCY_TIMER, lat);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
sata_bus_probe (int port_no)
|
||||
{
|
||||
int orig_mask, mask;
|
||||
u16 pcs;
|
||||
|
||||
mask = (PORT_PRESENT << port_no);
|
||||
pci_read_config_word (bdf, PCI_PCS, &pcs);
|
||||
orig_mask = (int) pcs & 0xff;
|
||||
if ((orig_mask & mask) != mask)
|
||||
return 0;
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
|
||||
int
|
||||
init_sata (void)
|
||||
{
|
||||
u8 i, rv = 0;
|
||||
|
||||
for (i = 0; i < CFG_SATA_MAXDEVICES; i++) {
|
||||
sata_dev_desc[i].type = DEV_TYPE_UNKNOWN;
|
||||
sata_dev_desc[i].if_type = IF_TYPE_IDE;
|
||||
sata_dev_desc[i].dev = i;
|
||||
sata_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
|
||||
sata_dev_desc[i].blksz = 0;
|
||||
sata_dev_desc[i].lba = 0;
|
||||
sata_dev_desc[i].block_read = sata_read;
|
||||
}
|
||||
|
||||
rv = pci_sata_init ();
|
||||
if (rv == 1) {
|
||||
printf ("pci initialization failed\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
port[0].port_no = 0;
|
||||
port[0].ioaddr.cmd_addr = iobase1;
|
||||
port[0].ioaddr.altstatus_addr = port[0].ioaddr.ctl_addr =
|
||||
iobase2 | ATA_PCI_CTL_OFS;
|
||||
port[0].ioaddr.bmdma_addr = iobase5;
|
||||
|
||||
port[1].port_no = 1;
|
||||
port[1].ioaddr.cmd_addr = iobase3;
|
||||
port[1].ioaddr.altstatus_addr = port[1].ioaddr.ctl_addr =
|
||||
iobase4 | ATA_PCI_CTL_OFS;
|
||||
port[1].ioaddr.bmdma_addr = iobase5 + 0x8;
|
||||
|
||||
for (i = 0; i < CFG_SATA_MAXBUS; i++)
|
||||
sata_port (&port[i].ioaddr);
|
||||
|
||||
for (i = 0; i < CFG_SATA_MAXBUS; i++) {
|
||||
if (!(sata_bus_probe (i))) {
|
||||
port[i].port_state = 0;
|
||||
printf ("SATA#%d port is not present \n", i);
|
||||
} else {
|
||||
printf ("SATA#%d port is present\n", i);
|
||||
if (sata_bus_softreset (i)) {
|
||||
port[i].port_state = 0;
|
||||
} else {
|
||||
port[i].port_state = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < CFG_SATA_MAXBUS; i++) {
|
||||
u8 j, devno;
|
||||
|
||||
if (port[i].port_state == 0)
|
||||
continue;
|
||||
for (j = 0; j < CFG_SATA_DEVS_PER_BUS; j++) {
|
||||
sata_identify (i, j);
|
||||
set_Feature_cmd (i, j);
|
||||
devno = i * CFG_SATA_DEVS_PER_BUS + j;
|
||||
if ((sata_dev_desc[devno].lba > 0) &&
|
||||
(sata_dev_desc[devno].blksz > 0)) {
|
||||
dev_print (&sata_dev_desc[devno]);
|
||||
/* initialize partition type */
|
||||
init_part (&sata_dev_desc[devno]);
|
||||
if (curr_dev < 0)
|
||||
curr_dev =
|
||||
i * CFG_SATA_DEVS_PER_BUS + j;
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -83,6 +83,66 @@
|
|||
#define ATA_DEVICE(x) ((x & 1)<<4)
|
||||
#define ATA_LBA 0xE0
|
||||
|
||||
enum {
|
||||
ATA_MAX_DEVICES = 1, /* per bus/port */
|
||||
ATA_MAX_PRD = 256, /* we could make these 256/256 */
|
||||
ATA_SECT_SIZE = 256, /*256 words per sector */
|
||||
|
||||
/* bits in ATA command block registers */
|
||||
ATA_HOB = (1 << 7), /* LBA48 selector */
|
||||
ATA_NIEN = (1 << 1), /* disable-irq flag */
|
||||
/*ATA_LBA = (1 << 6), *//* LBA28 selector */
|
||||
ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
|
||||
ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
|
||||
ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
|
||||
ATA_BUSY = (1 << 7), /* BSY status bit */
|
||||
ATA_DRDY = (1 << 6), /* device ready */
|
||||
ATA_DF = (1 << 5), /* device fault */
|
||||
ATA_DRQ = (1 << 3), /* data request i/o */
|
||||
ATA_ERR = (1 << 0), /* have an error */
|
||||
ATA_SRST = (1 << 2), /* software reset */
|
||||
ATA_ABORTED = (1 << 2), /* command aborted */
|
||||
/* ATA command block registers */
|
||||
ATA_REG_DATA = 0x00,
|
||||
ATA_REG_ERR = 0x01,
|
||||
ATA_REG_NSECT = 0x02,
|
||||
ATA_REG_LBAL = 0x03,
|
||||
ATA_REG_LBAM = 0x04,
|
||||
ATA_REG_LBAH = 0x05,
|
||||
ATA_REG_DEVICE = 0x06,
|
||||
ATA_REG_STATUS = 0x07,
|
||||
ATA_PCI_CTL_OFS = 0x02,
|
||||
/* and their aliases */
|
||||
ATA_REG_FEATURE = ATA_REG_ERR,
|
||||
ATA_REG_CMD = ATA_REG_STATUS,
|
||||
ATA_REG_BYTEL = ATA_REG_LBAM,
|
||||
ATA_REG_BYTEH = ATA_REG_LBAH,
|
||||
ATA_REG_DEVSEL = ATA_REG_DEVICE,
|
||||
ATA_REG_IRQ = ATA_REG_NSECT,
|
||||
|
||||
/* SETFEATURES stuff */
|
||||
SETFEATURES_XFER = 0x03,
|
||||
XFER_UDMA_7 = 0x47,
|
||||
XFER_UDMA_6 = 0x46,
|
||||
XFER_UDMA_5 = 0x45,
|
||||
XFER_UDMA_4 = 0x44,
|
||||
XFER_UDMA_3 = 0x43,
|
||||
XFER_UDMA_2 = 0x42,
|
||||
XFER_UDMA_1 = 0x41,
|
||||
XFER_UDMA_0 = 0x40,
|
||||
XFER_MW_DMA_2 = 0x22,
|
||||
XFER_MW_DMA_1 = 0x21,
|
||||
XFER_MW_DMA_0 = 0x20,
|
||||
XFER_PIO_4 = 0x0C,
|
||||
XFER_PIO_3 = 0x0B,
|
||||
XFER_PIO_2 = 0x0A,
|
||||
XFER_PIO_1 = 0x09,
|
||||
XFER_PIO_0 = 0x08,
|
||||
XFER_SW_DMA_2 = 0x12,
|
||||
XFER_SW_DMA_1 = 0x11,
|
||||
XFER_SW_DMA_0 = 0x10,
|
||||
XFER_PIO_SLOW = 0x00
|
||||
};
|
||||
/*
|
||||
* ATA Commands (only mandatory commands listed here)
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -181,6 +181,15 @@
|
|||
#undef CONFIG_IDE_RESET /* reset for ide unsupported... */
|
||||
#undef CONFIG_IDE_RESET_ROUTINE /* no special reset function */
|
||||
|
||||
/************************************************************
|
||||
*SATA/Native Stuff
|
||||
************************************************************/
|
||||
#define CFG_SATA_SUPPORTED 1
|
||||
#define CFG_SATA_MAXBUS 2 /*Max Sata buses supported */
|
||||
#define CFG_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
|
||||
#define CFG_SATA_MAXDEVICES (CFG_SATA_MAXBUS* CFG_SATA_DEVS_PER_BUS)
|
||||
#define CFG_ATA_PIIX 1 /*Supports ata_piix driver */
|
||||
|
||||
/************************************************************
|
||||
* ATAPI support (experimental)
|
||||
************************************************************/
|
||||
|
|
|
|||
108
include/sata.h
Normal file
108
include/sata.h
Normal file
|
|
@ -0,0 +1,108 @@
|
|||
|
||||
#if (DEBUG_SATA)
|
||||
#define PRINTF(fmt,args...) printf (fmt ,##args)
|
||||
#else
|
||||
#define PRINTF(fmt,args...)
|
||||
#endif
|
||||
|
||||
struct sata_ioports {
|
||||
unsigned long cmd_addr;
|
||||
unsigned long data_addr;
|
||||
unsigned long error_addr;
|
||||
unsigned long feature_addr;
|
||||
unsigned long nsect_addr;
|
||||
unsigned long lbal_addr;
|
||||
unsigned long lbam_addr;
|
||||
unsigned long lbah_addr;
|
||||
unsigned long device_addr;
|
||||
unsigned long status_addr;
|
||||
unsigned long command_addr;
|
||||
unsigned long altstatus_addr;
|
||||
unsigned long ctl_addr;
|
||||
unsigned long bmdma_addr;
|
||||
unsigned long scr_addr;
|
||||
};
|
||||
|
||||
struct sata_port {
|
||||
unsigned char port_no; /*primary-0, secondary=1 */
|
||||
struct sata_ioports ioaddr; /*ATA cmd/ctl/dma reg blks */
|
||||
unsigned char ctl_reg;
|
||||
unsigned char last_ctl;
|
||||
unsigned char port_state; /*1-port is present and
|
||||
0-port is not available */
|
||||
unsigned char dev_mask;
|
||||
};
|
||||
|
||||
/***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/
|
||||
#ifdef SATA_DECL /*SATA library specific declarations */
|
||||
#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
|
||||
#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
|
||||
#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
|
||||
#define ata_id_u32(id,n) \
|
||||
(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
|
||||
#define ata_id_u64(id,n) \
|
||||
(((u64) (id)[(n) + 3] << 48) | \
|
||||
((u64) (id)[(n) + 2] << 32) | \
|
||||
((u64) (id)[(n) + 1] << 16) | \
|
||||
((u64) (id)[(n) + 0]) )
|
||||
#endif
|
||||
|
||||
#ifdef SATA_DECL /*SATA library specific declarations */
|
||||
static inline void
|
||||
ata_dump_id (u16 * id)
|
||||
{
|
||||
PRINTF ("49==0x%04x "
|
||||
"53==0x%04x "
|
||||
"63==0x%04x "
|
||||
"64==0x%04x "
|
||||
"75==0x%04x \n", id[49], id[53], id[63], id[64], id[75]);
|
||||
PRINTF ("80==0x%04x "
|
||||
"81==0x%04x "
|
||||
"82==0x%04x "
|
||||
"83==0x%04x "
|
||||
"84==0x%04x \n", id[80], id[81], id[82], id[83], id[84]);
|
||||
PRINTF ("88==0x%04x " "93==0x%04x\n", id[88], id[93]);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SATA_DECL /*SATA library specific declarations */
|
||||
int sata_bus_softreset (int num);
|
||||
void sata_identify (int num, int dev);
|
||||
void sata_port (struct sata_ioports *ioport);
|
||||
void set_Feature_cmd (int num, int dev);
|
||||
int sata_devchk (struct sata_ioports *ioaddr, int dev);
|
||||
void dev_select (struct sata_ioports *ioaddr, int dev);
|
||||
u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max);
|
||||
u8 sata_chk_status (struct sata_ioports *ioaddr);
|
||||
ulong sata_read (int device, lbaint_t blknr, ulong blkcnt, ulong * buffer);
|
||||
ulong sata_write (int device, lbaint_t blknr, ulong blkcnt, ulong * buffer);
|
||||
void msleep (int count);
|
||||
#else
|
||||
extern int sata_bus_softreset (int num);
|
||||
extern void sata_identify (int num, int dev);
|
||||
extern void sata_port (struct sata_ioports *ioport);
|
||||
extern void set_Feature_cmd (int num, int dev);
|
||||
extern ulong sata_read (int device, lbaint_t blknr,
|
||||
ulong blkcnt, ulong * buffer);
|
||||
extern ulong sata_write (int device, lbaint_t blknr,
|
||||
ulong blkcnt, ulong * buffer);
|
||||
extern void msleep (int count);
|
||||
#endif
|
||||
|
||||
/************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/
|
||||
|
||||
#ifdef DRV_DECL /*Driver specific declaration */
|
||||
int init_sata (void);
|
||||
#else
|
||||
extern int init_sata (void);
|
||||
#endif
|
||||
|
||||
#ifdef DRV_DECL /*Defines Driver Specific variables */
|
||||
struct sata_port port[CFG_SATA_MAXBUS];
|
||||
block_dev_desc_t sata_dev_desc[CFG_SATA_MAXDEVICES];
|
||||
int curr_dev = -1;
|
||||
#else
|
||||
extern struct sata_port port[CFG_SATA_MAXBUS];
|
||||
extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAXDEVICES];
|
||||
extern int curr_dev;
|
||||
#endif
|
||||
Loading…
Reference in a new issue