Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-02-16 14:08:45 +00:00
Code Issues Projects Releases Packages Wiki Activity

davinci: remove macro CONFIG_DISPLAY_CPUINFO

Browse source 
remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer
required. This is because clock info will be printed as part
'bdinfo' command and also remove support print_cpuinfo() as it will
no longer be called.

Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Tom Rini <trini@ti.com>
This commit is contained in:
Hadli, Manjunath 2012-02-06 00:30:43 +00:00 • committed by Albert ARIBAUD
parent fd3d28e7a6
commit 6678cebc09
11 changed files with 0 additions and 54 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

44
arch/arm/cpu/arm926ejs/davinci/cpu.c
View file

@ -115,21 +115,8 @@ int clk_get(enum davinci_clk_ids id)
out:
return pll_out;
}
#ifdef CONFIG_DISPLAY_CPUINFO
int print_cpuinfo(void)
{
printf("Cores: ARM %d MHz",
clk_get(DAVINCI_ARM_CLKID) / 1000000);
printf("\nDDR: %d MHz\n",
/* DDR PHY uses an x2 input clock */
clk_get(0x10001) / 1000000);
return 0;
}
#endif
#else /* CONFIG_SOC_DA8XX */
#ifdef CONFIG_DISPLAY_CPUINFO
static unsigned pll_div(volatile void *pllbase, unsigned offset)
{
u32 div;
@ -185,36 +172,6 @@ static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div)
return DIV_ROUND_UP(base, 1000 * pll_div(pllbase, div));
}
int print_cpuinfo(void)
{
/* REVISIT fetch and display CPU ID and revision information
* too ... that will matter as more revisions appear.
*/
#if defined(CONFIG_SOC_DM365)
printf("Cores: ARM %d MHz",
pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, ARM_PLLDIV));
#else
printf("Cores: ARM %d MHz",
pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV));
#endif
#ifdef DSP_PLLDIV
printf(", DSP %d MHz",
pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV));
#endif
printf("\nDDR: %d MHz\n",
/* DDR PHY uses an x2 input clock */
#if defined(CONFIG_SOC_DM365)
pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DDR_PLLDIV)
/ 2);
#else
pll_sysclk_mhz(DAVINCI_PLL_CNTRL1_BASE, DDR_PLLDIV)
/ 2);
#endif
return 0;
}
#ifdef DAVINCI_DM6467EVM
unsigned int davinci_arm_clk_get()
{
@ -228,7 +185,6 @@ unsigned int davinci_clk_get(unsigned int div)
return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, div) * 1000000;
}
#endif
#endif /* CONFIG_DISPLAY_CPUINFO */
#endif /* !CONFIG_SOC_DA8XX */
/*

1
include/configs/cam_enc_4xx.h
View file

@ -264,7 +264,6 @@
#define CONFIG_POST CONFIG_SYS_POST_MEMORY
#define _POST_WORD_ADDR 0x0
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK

1
include/configs/davinci_dm355evm.h
View file

@ -26,7 +26,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_DISPLAY_CPUINFO
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU */

1
include/configs/davinci_dm355leopard.h
View file

@ -25,7 +25,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_DISPLAY_CPUINFO
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU */

1
include/configs/davinci_dm6467Tevm.h
View file

@ -23,7 +23,6 @@
/* Spectrum Digital TMS320DM6467T EVM board */
#define DAVINCI_DM6467EVM
#define DAVINCI_DM6467TEVM
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_SYS_USE_NAND
#define CONFIG_SYS_NAND_SMALLPAGE

1
include/configs/davinci_dm6467evm.h
View file

@ -22,7 +22,6 @@
/* Spectrum Digital TMS320DM6467 EVM board */
#define DAVINCI_DM6467EVM
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_SYS_USE_NAND
#define CONFIG_SYS_NAND_SMALLPAGE

1
include/configs/davinci_dvevm.h
View file

@ -51,7 +51,6 @@
#define DV_EVM
#define CONFIG_SYS_NAND_SMALLPAGE
#define CONFIG_SYS_USE_NAND
#define CONFIG_DISPLAY_CPUINFO
/*===================*/
/* SoC Configuration */
/*===================*/

1
include/configs/davinci_schmoogie.h
View file

@ -26,7 +26,6 @@
#define SCHMOOGIE
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_USE_NAND
#define CONFIG_DISPLAY_CPUINFO
#define MACH_TYPE_SCHMOOGIE 1255
#define CONFIG_MACH_TYPE MACH_TYPE_SCHMOOGIE

1
include/configs/davinci_sffsdr.h
View file

@ -28,7 +28,6 @@
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_USE_NAND
#define CONFIG_SYS_USE_DSPLINK /* don't power up the DSP. */
#define CONFIG_DISPLAY_CPUINFO
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */

1
include/configs/davinci_sonata.h
View file

@ -51,7 +51,6 @@
#define SONATA_BOARD
#define CONFIG_SYS_NAND_SMALLPAGE
#define CONFIG_SYS_USE_NOR
#define CONFIG_DISPLAY_CPUINFO
#define MACH_TYPE_SONATA 1254
#define CONFIG_MACH_TYPE MACH_TYPE_SONATA
/*===================*/

1
include/configs/enbw_cmc.h
View file

@ -50,7 +50,6 @@
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DA8XX_GPIO
#define CONFIG_HOSTNAME enbw_cmc
#define CONFIG_DISPLAY_CPUINFO
#define MACH_TYPE_ENBW_CMC 3585
#define CONFIG_MACH_TYPE MACH_TYPE_ENBW_CMC