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imx: mx6ull: misc soc update
Update misc SOC related settings for i.MX6ULL, such as FEC mac address, cpu speed grading and mmdc channel mask clearing. Also update s_init to skip pfd reset. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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6615da4da3
1 changed files with 4 additions and 4 deletions
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@ -126,7 +126,7 @@ u32 get_cpu_speed_grade_hz(void)
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val >>= OCOTP_CFG3_SPEED_SHIFT;
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val >>= OCOTP_CFG3_SPEED_SHIFT;
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val &= 0x3;
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val &= 0x3;
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if (is_mx6ul()) {
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if (is_mx6ul() || is_mx6ull()) {
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if (val == OCOTP_CFG3_SPEED_528MHZ)
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if (val == OCOTP_CFG3_SPEED_528MHZ)
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return 528000000;
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return 528000000;
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else if (val == OCOTP_CFG3_SPEED_696MHZ)
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else if (val == OCOTP_CFG3_SPEED_696MHZ)
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@ -293,7 +293,7 @@ static void clear_mmdc_ch_mask(void)
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reg = readl(&mxc_ccm->ccdr);
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reg = readl(&mxc_ccm->ccdr);
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/* Clear MMDC channel mask */
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/* Clear MMDC channel mask */
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if (is_mx6sx() || is_mx6ul() || is_mx6sl())
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if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sl())
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reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK);
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reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK);
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else
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else
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reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK | MXC_CCM_CCDR_MMDC_CH0_HS_MASK);
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reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK | MXC_CCM_CCDR_MMDC_CH0_HS_MASK);
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@ -459,7 +459,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
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struct fuse_bank4_regs *fuse =
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struct fuse_bank4_regs *fuse =
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(struct fuse_bank4_regs *)bank->fuse_regs;
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(struct fuse_bank4_regs *)bank->fuse_regs;
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if ((is_mx6sx() || is_mx6ul()) && dev_id == 1) {
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if ((is_mx6sx() || is_mx6ul() || is_mx6ull()) && dev_id == 1) {
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u32 value = readl(&fuse->mac_addr2);
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u32 value = readl(&fuse->mac_addr2);
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mac[0] = value >> 24 ;
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mac[0] = value >> 24 ;
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mac[1] = value >> 16 ;
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mac[1] = value >> 16 ;
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@ -523,7 +523,7 @@ void s_init(void)
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u32 mask528;
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u32 mask528;
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u32 reg, periph1, periph2;
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u32 reg, periph1, periph2;
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if (is_mx6sx() || is_mx6ul())
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if (is_mx6sx() || is_mx6ul() || is_mx6ull())
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return;
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return;
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/* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs
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/* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs
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