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- spi: fix busy bit check in stm32_qspi driver
- stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE56Yx6b9SnloYCWtD4rK92eCqk3UFAmKHQBgACgkQ4rK92eCq k3ViMAgAv3wlNisLFybMdfOWN6TUf7WuaBguPX7q6d3UO8wXXWMiPrrHiLUtY3Ep Yw9209foDcFRpsC1ytS9nnZbYeNmbBIgazQKcT5mCWYAzIODFQOom8bAfoKcH8LE I2HQN4emKA4iEMjx9zSKueIJJHxtxg14exlzRf0zVqnBr0Uo2UDbPJhQSydVke5K WOA+CyhusFpqcOphgW4ASreZkAeHeuxn6X6IEJv0wsn5K46YuNR5/MTm4ApOoksM cSILXPbLwCz6RhkOOZsTmul4H/sIn84xxRTFbRfehYX4cQsmbcYXbrNnshi/dQwi nY9DtuFc5fhqpSfok2g8I6cZQzby0Q== =tYgq -----END PGP SIGNATURE----- Merge tag 'u-boot-stm32-20220520' of https://source.denx.de/u-boot/custodians/u-boot-stm - spi: fix busy bit check in stm32_qspi driver - stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board
This commit is contained in:
commit
658d38e193
3 changed files with 118 additions and 20 deletions
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@ -19,7 +19,7 @@
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};
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&vdd {
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regulator-min-microvolt = <2900000>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2900000>;
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};
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@ -594,14 +594,98 @@ static void board_init_fmc2(void)
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setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1, STM32_FMC2_BCRx_FMCEN);
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}
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#ifdef CONFIG_DM_REGULATOR
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#define STPMIC_NVM_BUCKS_VOUT_SHR 0xfc
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V2 0
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V8 1
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_3V0 2
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_3V3 3
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_MASK GENMASK(1, 0)
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#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_OFFSET(n) ((((n) - 1) & 3) * 2)
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static int board_get_regulator_buck3_nvm_uv_av96(int *uv)
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{
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const void *fdt = gd->fdt_blob;
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struct udevice *dev;
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u8 bucks_vout = 0;
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const char *prop;
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int len, ret;
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/* Check whether this is Avenger96 board. */
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prop = fdt_getprop(fdt, 0, "compatible", &len);
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if (!prop || !len)
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return -ENODEV;
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if (!strstr(prop, "avenger96"))
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return -EINVAL;
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/* Read out STPMIC1 NVM and determine default Buck3 voltage. */
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ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_DRIVER_GET(stpmic1_nvm),
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&dev);
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if (ret)
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return ret;
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ret = misc_read(dev, STPMIC_NVM_BUCKS_VOUT_SHR, &bucks_vout, 1);
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if (ret != 1)
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return -EINVAL;
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bucks_vout >>= STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_OFFSET(3);
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bucks_vout &= STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_MASK;
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/*
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* Avenger96 board comes in multiple regulator configurations:
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* - rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
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* boot and contains extra Enpirion EP53A8LQI DCDC converter which
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* supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
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* - rev.200L have Buck3 preconfigured to 1V8 operation and have no
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* Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3.
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*/
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if (bucks_vout == STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_3V3)
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*uv = 2900000;
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else
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*uv = 1800000;
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return 0;
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}
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static void board_init_regulator_av96(void)
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{
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struct udevice *rdev;
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int ret, uv;
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ret = board_get_regulator_buck3_nvm_uv_av96(&uv);
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if (ret) /* Not Avenger96 board. */
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return;
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ret = regulator_get_by_devname("buck3", &rdev);
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if (ret)
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return;
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/* Adjust Buck3 per preconfigured PMIC voltage from NVM. */
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regulator_set_value(rdev, uv);
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}
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static void board_init_regulator(void)
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{
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board_init_regulator_av96();
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regulators_enable_boot_on(_DEBUG);
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}
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#else
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static inline int board_get_regulator_buck3_nvm_uv_av96(int *uv)
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{
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return -EINVAL;
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}
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static inline void board_init_regulator(void) {}
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#endif
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/* board dependent setup after realloc */
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int board_init(void)
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{
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board_key_check();
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#ifdef CONFIG_DM_REGULATOR
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regulators_enable_boot_on(_DEBUG);
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#endif
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board_init_regulator();
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sysconf_init();
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@ -721,6 +805,25 @@ int board_interface_eth_init(struct udevice *dev,
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#if defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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const char *buck3path = "/soc/i2c@5c002000/stpmic@33/regulators/buck3";
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int buck3off, ret, uv;
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ret = board_get_regulator_buck3_nvm_uv_av96(&uv);
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if (ret) /* Not Avenger96 board, do not patch Buck3 in DT. */
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return 0;
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buck3off = fdt_path_offset(blob, buck3path);
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if (buck3off < 0) /* No Buck3 regulator found. */
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return 0;
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ret = fdt_setprop_u32(blob, buck3off, "regulator-min-microvolt", uv);
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if (ret < 0)
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return ret;
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ret = fdt_setprop_u32(blob, buck3off, "regulator-max-microvolt", uv);
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if (ret < 0)
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return ret;
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return 0;
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}
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#endif
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@ -150,20 +150,19 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv,
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u32 sr;
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int ret = 0;
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if (op->data.nbytes) {
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ret = readl_poll_timeout(&priv->regs->sr, sr,
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sr & STM32_QSPI_SR_TCF,
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STM32_QSPI_CMD_TIMEOUT_US);
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if (ret) {
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log_err("cmd timeout (stat:%#x)\n", sr);
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} else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) {
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log_err("transfer error (stat:%#x)\n", sr);
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ret = -EIO;
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}
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/* clear flags */
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writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF, &priv->regs->fcr);
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ret = readl_poll_timeout(&priv->regs->sr, sr,
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sr & STM32_QSPI_SR_TCF,
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STM32_QSPI_CMD_TIMEOUT_US);
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if (ret) {
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log_err("cmd timeout (stat:%#x)\n", sr);
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} else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) {
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log_err("transfer error (stat:%#x)\n", sr);
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ret = -EIO;
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}
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/* clear flags */
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writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF, &priv->regs->fcr);
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if (!ret)
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ret = _stm32_qspi_wait_for_not_busy(priv);
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@ -256,10 +255,6 @@ static int stm32_qspi_exec_op(struct spi_slave *slave,
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op->dummy.buswidth, op->data.buswidth,
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op->addr.val, op->data.nbytes);
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ret = _stm32_qspi_wait_for_not_busy(priv);
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if (ret)
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return ret;
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addr_max = op->addr.val + op->data.nbytes + 1;
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if (op->data.dir == SPI_MEM_DATA_IN && op->data.nbytes) {
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