mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-microblaze
This commit is contained in:
commit
655c549752
5 changed files with 203 additions and 114 deletions
|
@ -32,6 +32,22 @@ _start:
|
|||
mts rmsr, r0 /* disable cache */
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||||
addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
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||||
addi r1, r1, -4 /* Decrement SP to top of memory */
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||||
|
||||
/* Find-out if u-boot is running on BIG/LITTLE endian platform
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||||
* There are some steps which is necessary to keep in mind:
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* 1. Setup offset value to r6
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* 2. Store word offset value to address 0x0
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||||
* 3. Load just byte from address 0x0
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* 4a) LITTLE endian - r10 contains 0x2 because it is the smallest
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* value that's why is on address 0x0
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* 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
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*/
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addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
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swi r6, r0, 0
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lbui r10, r0, 0
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swi r6, r0, 0x40
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swi r10, r0, 0x50
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||||
/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
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addi r6, r0, 0xb0000000 /* hex b000 opcode imm */
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swi r6, r0, 0x0 /* reset address */
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|
@ -75,26 +91,52 @@ _start:
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/* user_vector_exception */
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addik r6, r0, _exception_handler
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sw r6, r1, r0
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lhu r7, r1, r0
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shi r7, r0, 0xa
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shi r6, r0, 0xe
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/*
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* BIG ENDIAN memory map for user exception
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* 0x8: 0xB000XXXX
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* 0xC: 0xB808XXXX
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*
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* then it is necessary to count address for storing the most significant
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* 16bits from _exception_handler address and copy it to
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* 0xa address. Big endian use offset in r10=0 that's why is it just
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* 0xa address. The same is done for the least significant 16 bits
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* for 0xe address.
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*
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* LITTLE ENDIAN memory map for user exception
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* 0x8: 0xXXXX00B0
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* 0xC: 0xXXXX08B8
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*
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* Offset is for little endian setup to 0x2. rsubi instruction decrease
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* address value to ensure that points to proper place which is
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* 0x8 for the most significant 16 bits and
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* 0xC for the least significant 16 bits
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*/
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lhu r7, r1, r10
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rsubi r8, r10, 0xa
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sh r7, r0, r8
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rsubi r8, r10, 0xe
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sh r6, r0, r8
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#endif
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#ifdef CONFIG_SYS_INTC_0
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/* interrupt_handler */
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addik r6, r0, _interrupt_handler
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sw r6, r1, r0
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lhu r7, r1, r0
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shi r7, r0, 0x12
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shi r6, r0, 0x16
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lhu r7, r1, r10
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rsubi r8, r10, 0x12
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sh r7, r0, r8
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rsubi r8, r10, 0x16
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sh r6, r0, r8
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#endif
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/* hardware exception */
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addik r6, r0, _hw_exception_handler
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sw r6, r1, r0
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lhu r7, r1, r0
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shi r7, r0, 0x22
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shi r6, r0, 0x26
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lhu r7, r1, r10
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rsubi r8, r10, 0x22
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sh r7, r0, r8
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rsubi r8, r10, 0x26
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sh r6, r0, r8
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|
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/* enable instruction and data cache */
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mfs r12, rmsr
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|
|
|
@ -50,6 +50,10 @@ static __inline__ __u16 ___arch__swab16 (__u16 half_word)
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|||
|
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#endif /* __GNUC__ */
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#ifdef __MICROBLAZEEL__
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#include <linux/byteorder/little_endian.h>
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#else
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#include <linux/byteorder/big_endian.h>
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#endif
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#endif /* __MICROBLAZE_BYTEORDER_H__ */
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|
|
|
@ -31,6 +31,7 @@
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#include <version.h>
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#include <watchdog.h>
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#include <stdio_dev.h>
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#include <net.h>
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|
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DECLARE_GLOBAL_DATA_PTR;
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|
||||
|
@ -42,6 +43,7 @@ extern int gpio_init (void);
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#ifdef CONFIG_SYS_INTC_0
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extern int interrupts_init (void);
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#endif
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#if defined(CONFIG_CMD_NET)
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extern int eth_init (bd_t * bis);
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#endif
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|
@ -165,8 +167,14 @@ void board_init (void)
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#if defined(CONFIG_CMD_NET)
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/* IP Address */
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bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
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eth_init (bd);
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bd->bi_ip_addr = getenv_IPaddr("ipaddr");
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printf("Net: ");
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eth_initialize(gd->bd);
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uchar enetaddr[6];
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eth_getenv_enetaddr("ethaddr", enetaddr);
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printf("MAC: %pM\n", enetaddr);
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#endif
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/* main_loop */
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|
|
|
@ -27,6 +27,7 @@
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|||
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#include <common.h>
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#include <config.h>
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#include <netdev.h>
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#include <asm/microblaze_intc.h>
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#include <asm/asm.h>
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||||
|
@ -66,3 +67,15 @@ int fsl_init2 (void) {
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return 0;
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}
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#endif
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int board_eth_init(bd_t *bis)
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{
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/*
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* This board either has PCI NICs or uses the CPU's TSECs
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* pci_eth_init() will return 0 if no NICs found, so in that case
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* returning -1 will force cpu_eth_init() to be called.
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*/
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#ifdef CONFIG_XILINX_EMACLITE
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return xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR);
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#endif
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}
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|
|
|
@ -1,5 +1,5 @@
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/*
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* (C) Copyright 2007-2008 Michal Simek
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* (C) Copyright 2007-2010 Michal Simek
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*
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||||
* Michal SIMEK <monstr@monstr.eu>
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||||
*
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||||
|
@ -27,31 +27,33 @@
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|||
|
||||
#include "../board/xilinx/microblaze-generic/xparameters.h"
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#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
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/* MicroBlaze CPU */
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#define CONFIG_MICROBLAZE 1
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#define MICROBLAZE_V5 1
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/* uart */
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#ifdef XILINX_UARTLITE_BASEADDR
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#define CONFIG_XILINX_UARTLITE
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#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
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#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
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#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
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#define CONSOLE_ARG "console=console=ttyUL0,115200\0"
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# define CONFIG_XILINX_UARTLITE
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# define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
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# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
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# define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
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# define CONSOLE_ARG "console=console=ttyUL0,115200\0"
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#elif XILINX_UART16550_BASEADDR
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#define CONFIG_SYS_NS16550 1
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
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#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
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||||
#define CONFIG_BAUDRATE 115200
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||||
# define CONFIG_SYS_NS16550 1
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# define CONFIG_SYS_NS16550_SERIAL
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# define CONFIG_SYS_NS16550_REG_SIZE -4
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# define CONFIG_CONS_INDEX 1
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||||
# define CONFIG_SYS_NS16550_COM1 \
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(XILINX_UART16550_BASEADDR + 0x1000 + 0x3)
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# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
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# define CONFIG_BAUDRATE 115200
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/* The following table includes the supported baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
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#define CONSOLE_ARG "console=console=ttyS0,115200\0"
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/* The following table includes the supported baudrates */
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# define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
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# define CONSOLE_ARG "console=console=ttyS0,115200\0"
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#else
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#error Undefined uart
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# error Undefined uart
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#endif
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||||
/* setting reset address */
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||||
|
@ -59,41 +61,41 @@
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|||
|
||||
/* ethernet */
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#ifdef XILINX_EMACLITE_BASEADDR
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#define CONFIG_XILINX_EMACLITE 1
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#define CONFIG_SYS_ENET
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# define CONFIG_XILINX_EMACLITE 1
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# define CONFIG_SYS_ENET
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#elif XILINX_LLTEMAC_BASEADDR
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#define CONFIG_XILINX_LL_TEMAC 1
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#define CONFIG_SYS_ENET
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# define CONFIG_XILINX_LL_TEMAC 1
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# define CONFIG_SYS_ENET
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#endif
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|
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#undef ET_DEBUG
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||||
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/* gpio */
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#ifdef XILINX_GPIO_BASEADDR
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#define CONFIG_SYS_GPIO_0 1
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#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
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# define CONFIG_SYS_GPIO_0 1
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# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
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#endif
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|
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/* interrupt controller */
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#ifdef XILINX_INTC_BASEADDR
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#define CONFIG_SYS_INTC_0 1
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#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
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#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
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# define CONFIG_SYS_INTC_0 1
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# define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
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# define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
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#endif
|
||||
|
||||
/* timer */
|
||||
#ifdef XILINX_TIMER_BASEADDR
|
||||
#if (XILINX_TIMER_IRQ != -1)
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#define CONFIG_SYS_TIMER_0 1
|
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#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
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#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
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||||
#define FREQUENCE XILINX_CLOCK_FREQ
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#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
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||||
#endif
|
||||
# if (XILINX_TIMER_IRQ != -1)
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# define CONFIG_SYS_TIMER_0 1
|
||||
# define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
|
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# define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
|
||||
# define FREQUENCE XILINX_CLOCK_FREQ
|
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# define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
|
||||
# endif
|
||||
#elif XILINX_CLOCK_FREQ
|
||||
#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
|
||||
# define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
|
||||
#else
|
||||
#error BAD CLOCK FREQ
|
||||
# error BAD CLOCK FREQ
|
||||
#endif
|
||||
/* FSL */
|
||||
/* #define CONFIG_SYS_FSL_2 */
|
||||
|
@ -135,15 +137,20 @@
|
|||
/* global pointer */
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size of global data */
|
||||
/* start of global data */
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_GBL_DATA_OFFSET \
|
||||
(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE \
|
||||
- CONFIG_SYS_GBL_DATA_SIZE)
|
||||
|
||||
/* monitor code */
|
||||
#define SIZE 0x40000
|
||||
#define SIZE 0x40000
|
||||
#define CONFIG_SYS_MONITOR_LEN (SIZE - CONFIG_SYS_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
|
||||
#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
|
||||
#define CONFIG_SYS_MONITOR_BASE \
|
||||
(CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
|
||||
#define CONFIG_SYS_MONITOR_END \
|
||||
(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
|
||||
#define CONFIG_SYS_MALLOC_LEN SIZE
|
||||
#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
|
||||
#define CONFIG_SYS_MALLOC_BASE \
|
||||
(CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
|
||||
|
||||
/* stack */
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE
|
||||
|
@ -152,55 +159,62 @@
|
|||
#define FLASH
|
||||
|
||||
#ifdef FLASH
|
||||
#define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
|
||||
#define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
|
||||
#define CONFIG_SYS_FLASH_CFI 1
|
||||
#define CONFIG_FLASH_CFI_DRIVER 1
|
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
|
||||
#define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
|
||||
# define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START
|
||||
# define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE
|
||||
# define CONFIG_SYS_FLASH_CFI 1
|
||||
# define CONFIG_FLASH_CFI_DRIVER 1
|
||||
/* ?empty sector */
|
||||
# define CONFIG_SYS_FLASH_EMPTY_INFO 1
|
||||
/* max number of memory banks */
|
||||
# define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
/* max number of sectors on one chip */
|
||||
# define CONFIG_SYS_MAX_FLASH_SECT 512
|
||||
/* hardware flash protection */
|
||||
# define CONFIG_SYS_FLASH_PROTECTION
|
||||
|
||||
#ifdef RAMENV
|
||||
#define CONFIG_ENV_IS_NOWHERE 1
|
||||
#define CONFIG_ENV_SIZE 0x1000
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
|
||||
# ifdef RAMENV
|
||||
# define CONFIG_ENV_IS_NOWHERE 1
|
||||
# define CONFIG_ENV_SIZE 0x1000
|
||||
# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
|
||||
|
||||
#else /* !RAMENV */
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
|
||||
#define CONFIG_ENV_SIZE 0x20000
|
||||
#endif /* !RAMBOOT */
|
||||
# else /* !RAMENV */
|
||||
# define CONFIG_ENV_IS_IN_FLASH 1
|
||||
/* 128K(one sector) for env */
|
||||
# define CONFIG_ENV_SECT_SIZE 0x20000
|
||||
# define CONFIG_ENV_ADDR \
|
||||
(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
|
||||
# define CONFIG_ENV_SIZE 0x20000
|
||||
# endif /* !RAMBOOT */
|
||||
#else /* !FLASH */
|
||||
/* ENV in RAM */
|
||||
#define CONFIG_SYS_NO_FLASH 1
|
||||
#define CONFIG_ENV_IS_NOWHERE 1
|
||||
#define CONFIG_ENV_SIZE 0x1000
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
|
||||
#define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */
|
||||
/* ENV in RAM */
|
||||
# define CONFIG_SYS_NO_FLASH 1
|
||||
# define CONFIG_ENV_IS_NOWHERE 1
|
||||
# define CONFIG_ENV_SIZE 0x1000
|
||||
# define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
|
||||
/* hardware flash protection */
|
||||
# define CONFIG_SYS_FLASH_PROTECTION
|
||||
#endif /* !FLASH */
|
||||
|
||||
/* system ace */
|
||||
#ifdef XILINX_SYSACE_BASEADDR
|
||||
#define CONFIG_SYSTEMACE
|
||||
/* #define DEBUG_SYSTEMACE */
|
||||
#define SYSTEMACE_CONFIG_FPGA
|
||||
#define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
|
||||
#define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
|
||||
#define CONFIG_DOS_PARTITION
|
||||
# define CONFIG_SYSTEMACE
|
||||
/* #define DEBUG_SYSTEMACE */
|
||||
# define SYSTEMACE_CONFIG_FPGA
|
||||
# define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
|
||||
# define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
|
||||
# define CONFIG_DOS_PARTITION
|
||||
#endif
|
||||
|
||||
#if defined(XILINX_USE_ICACHE)
|
||||
#define CONFIG_ICACHE
|
||||
# define CONFIG_ICACHE
|
||||
#else
|
||||
#undef CONFIG_ICACHE
|
||||
# undef CONFIG_ICACHE
|
||||
#endif
|
||||
|
||||
#if defined(XILINX_USE_DCACHE)
|
||||
#define CONFIG_DCACHE
|
||||
# define CONFIG_DCACHE
|
||||
#else
|
||||
#undef CONFIG_DCACHE
|
||||
# undef CONFIG_DCACHE
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
@ -222,36 +236,39 @@
|
|||
#define CONFIG_CMD_ECHO
|
||||
|
||||
#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
|
||||
#define CONFIG_CMD_CACHE
|
||||
# define CONFIG_CMD_CACHE
|
||||
#else
|
||||
#undef CONFIG_CMD_CACHE
|
||||
# undef CONFIG_CMD_CACHE
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_SYS_ENET
|
||||
#undef CONFIG_CMD_NET
|
||||
# undef CONFIG_CMD_NET
|
||||
# undef CONFIG_NET_MULTI
|
||||
#else
|
||||
#define CONFIG_CMD_PING
|
||||
# define CONFIG_CMD_PING
|
||||
# define CONFIG_CMD_DHCP
|
||||
# define CONFIG_NET_MULTI
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SYSTEMACE)
|
||||
#define CONFIG_CMD_EXT2
|
||||
#define CONFIG_CMD_FAT
|
||||
# define CONFIG_CMD_EXT2
|
||||
# define CONFIG_CMD_FAT
|
||||
#endif
|
||||
|
||||
#if defined(FLASH)
|
||||
#define CONFIG_CMD_ECHO
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_IMLS
|
||||
#define CONFIG_CMD_JFFS2
|
||||
# define CONFIG_CMD_ECHO
|
||||
# define CONFIG_CMD_FLASH
|
||||
# define CONFIG_CMD_IMLS
|
||||
# define CONFIG_CMD_JFFS2
|
||||
|
||||
#if !defined(RAMENV)
|
||||
#define CONFIG_CMD_SAVEENV
|
||||
#define CONFIG_CMD_SAVES
|
||||
#endif
|
||||
# if !defined(RAMENV)
|
||||
# define CONFIG_CMD_SAVEENV
|
||||
# define CONFIG_CMD_SAVES
|
||||
# endif
|
||||
#else
|
||||
#undef CONFIG_CMD_IMLS
|
||||
#undef CONFIG_CMD_FLASH
|
||||
#undef CONFIG_CMD_JFFS2
|
||||
# undef CONFIG_CMD_IMLS
|
||||
# undef CONFIG_CMD_FLASH
|
||||
# undef CONFIG_CMD_JFFS2
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CMD_JFFS2)
|
||||
|
@ -259,21 +276,26 @@
|
|||
#define CONFIG_CMD_MTDPARTS /* mtdparts command line support */
|
||||
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
|
||||
#define CONFIG_FLASH_CFI_MTD
|
||||
#define MTDIDS_DEFAULT "nor0=ml401-0"
|
||||
#define MTDIDS_DEFAULT "nor0=flash-0"
|
||||
|
||||
/* default mtd partition table */
|
||||
#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\
|
||||
#define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\
|
||||
"256k(env),3m(kernel),1m(romfs),"\
|
||||
"1m(cramfs),-(jffs2)"
|
||||
#endif
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
|
||||
#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
|
||||
#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
|
||||
/* size of console buffer */
|
||||
#define CONFIG_SYS_CBSIZE 512
|
||||
/* print buffer size */
|
||||
#define CONFIG_SYS_PBSIZE \
|
||||
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
/* max number of command args */
|
||||
#define CONFIG_SYS_MAXARGS 15
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */
|
||||
/* default load address */
|
||||
#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START
|
||||
|
||||
#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
|
||||
#define CONFIG_BOOTARGS "root=romfs"
|
||||
|
@ -290,9 +312,9 @@
|
|||
|
||||
#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
|
||||
"nor0=ml401-0\0"\
|
||||
"mtdparts=mtdparts=ml401-0:"\
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \
|
||||
"nor0=flash-0\0"\
|
||||
"mtdparts=mtdparts=flash-0:"\
|
||||
"256k(u-boot),256k(env),3m(kernel),"\
|
||||
"1m(romfs),1m(cramfs),-(jffs2)\0"
|
||||
|
||||
|
@ -301,7 +323,7 @@
|
|||
/* Use the HUSH parser */
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#ifdef CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
# define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
|
||||
#endif
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
Loading…
Reference in a new issue