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Merge branch 'master' of git://git.denx.de/u-boot-mips

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This commit is contained in:
Tom Rini 2016-05-25 20:22:48 -04:00
commit 6523dbf7cc
35 changed files with 230 additions and 1208 deletions
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2
Kconfig
View file

@ -268,7 +268,7 @@ config SYS_EXTRA_OPTIONS
config SYS_TEXT_BASE
depends on SPARC || ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS
depends on !EFI_APP
hex "Text Base"
help

4
arch/mips/Kconfig
View file

@ -23,7 +23,11 @@ config TARGET_QEMU_MIPS
config TARGET_MALTA
bool "Support malta"
select DM
select DM_SERIAL
select DYNAMIC_IO_PORT_BASE
select OF_CONTROL
select OF_ISA_BUS
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_LITTLE_ENDIAN
select SUPPORTS_CPU_MIPS32_R1

6
arch/mips/Makefile
View file

@ -4,6 +4,12 @@
head-y := arch/mips/cpu/start.o
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq ($(CONFIG_SPL_START_S_PATH),)
head-y := $(CONFIG_SPL_START_S_PATH:"%"=%)/start.o
endif
endif
libs-y += arch/mips/cpu/
libs-y += arch/mips/lib/

1
arch/mips/dts/Makefile
View file

@ -4,6 +4,7 @@
dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb

32
arch/mips/dts/mti,malta.dts Normal file
View file

@ -0,0 +1,32 @@
/dts-v1/;
/memreserve/ 0x00000000 0x00001000; /* Exception vectors */
/memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mti,malta";
chosen {
stdout-path = &uart0;
};
isa@0 {
compatible = "isa";
#address-cells = <2>;
#size-cells = <1>;
ranges = <1 0 0 0x1000>;
uart0: serial@3f8 {
compatible = "ns16550a";
reg = <1 0x3f8 0x40>;
reg-shift = <0>;
clock-frequency = <1843200>;
u-boot,dm-pre-reloc;
};
};
};

8
arch/mips/include/asm/global_data.h
View file

@ -15,14 +15,6 @@ struct arch_global_data {
#ifdef CONFIG_DYNAMIC_IO_PORT_BASE
unsigned long io_port_base;
#endif
#ifdef CONFIG_JZSOC
/* There are other clocks in the jz4740 */
unsigned long per_clk; /* Peripheral bus clock */
unsigned long dev_clk; /* Device clock */
unsigned long sys_clk;
unsigned long tbl;
unsigned long lastinc;
#endif
#ifdef CONFIG_ARCH_ATH79
unsigned long id;
unsigned long soc;

1150
arch/mips/include/asm/jz4740.h
View file

File diff suppressed because it is too large Load diff

2
arch/mips/mach-ath79/ar933x/ddr.c
View file

@ -268,6 +268,8 @@ void ddr_tap_tuning(void)
dir = 1;
tap = readl(regs + AR71XX_DDR_REG_TAP_CTRL0);
val = tap;
upper = tap;
lower = tap;
while (!done) {
err = 0;

1
arch/mips/mach-ath79/include/mach/ar71xx_regs.h
View file

@ -660,6 +660,7 @@
#define AR933X_RESET_GE1_MDIO BIT(23)
#define AR933X_RESET_GE0_MDIO BIT(22)
#define AR933X_RESET_ETH_SWITCH_ANALOG BIT(14)
#define AR933X_RESET_GE1_MAC BIT(13)
#define AR933X_RESET_WMAC BIT(11)
#define AR933X_RESET_GE0_MAC BIT(9)

3
arch/mips/mach-ath79/reset.c
View file

@ -81,7 +81,8 @@ static int eth_init_ar933x(void)
MAP_NOCACHE);
const u32 mask = AR933X_RESET_GE0_MAC | AR933X_RESET_GE0_MDIO |
AR933X_RESET_GE1_MAC | AR933X_RESET_GE1_MDIO |
AR933X_RESET_ETH_SWITCH;
AR933X_RESET_ETH_SWITCH |
AR933X_RESET_ETH_SWITCH_ANALOG;
/* Clear MDIO slave EN bit. */
clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));

3
board/dbau1x00/Kconfig
View file

@ -9,6 +9,9 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "dbau1x00"
config SYS_TEXT_BASE
default 0xbfc00000
menu "dbau1x00 board options"
choice

3
board/imgtec/malta/Kconfig
View file

@ -9,4 +9,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "malta"
config SYS_TEXT_BASE
default 0xbe000000
endif

13
board/imgtec/malta/malta.c
View file

@ -12,7 +12,6 @@
#include <pci_gt64120.h>
#include <pci_msc01.h>
#include <rtc.h>
#include <serial.h>
#include <asm/addrspace.h>
#include <asm/io.h>
@ -161,18 +160,6 @@ int misc_init_r(void)
return 0;
}
struct serial_device *default_serial_console(void)
{
switch (malta_sys_con()) {
case SYSCON_GT64120:
return &eserial1_device;
default:
case SYSCON_MSC01:
return &eserial2_device;
}
}
void pci_init_board(void)
{
pci_dev_t bdf;

3
board/microchip/pic32mzda/Kconfig
View file

@ -10,4 +10,7 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "pic32mzdask"
config SYS_TEXT_BASE
default 0x9d004000
endif

3
board/micronas/vct/Kconfig
View file

@ -9,6 +9,9 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "vct"
config SYS_TEXT_BASE
default 0x87000000
menu "vct board options"
choice

3
board/pb1x00/Kconfig
View file

@ -9,4 +9,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "pb1x00"
config SYS_TEXT_BASE
default 0x83800000
endif

3
board/qca/ap121/Kconfig
View file

@ -9,4 +9,7 @@ config SYS_BOARD
config SYS_CONFIG_NAME
default "ap121"
config SYS_TEXT_BASE
default 0x9f000000
endif

3
board/qca/ap143/Kconfig
View file

@ -9,4 +9,7 @@ config SYS_BOARD
config SYS_CONFIG_NAME
default "ap143"
config SYS_TEXT_BASE
default 0x9f000000
endif

4
board/qemu-mips/Kconfig
View file

@ -7,4 +7,8 @@ config SYS_CONFIG_NAME
default "qemu-mips" if 32BIT
default "qemu-mips64" if 64BIT
config SYS_TEXT_BASE
default 0xbfc00000 if 32BIT
default 0xffffffffbfc00000 if 64BIT
endif

3
board/tplink/wdr4300/Kconfig
View file

@ -12,4 +12,7 @@ config SYS_BOARD
config SYS_CONFIG_NAME
default "tplink_wdr4300"
config SYS_TEXT_BASE
default 0xa1000000
endif

120
common/fdt_support.c
View file

@ -964,10 +964,40 @@ static void of_dump_addr(const char *s, const fdt32_t *addr, int na)
static void of_dump_addr(const char *s, const fdt32_t *addr, int na) { }
#endif
/* Callbacks for bus specific translators */
/**
* struct of_bus - Callbacks for bus specific translators
* @name: A string used to identify this bus in debug output.
* @addresses: The name of the DT property from which addresses are
* to be read, typically "reg".
* @match: Return non-zero if the node whose parent is at
* parentoffset in the FDT blob corresponds to a bus
* of this type, otherwise return zero. If NULL a match
* is assumed.
* @count_cells:Count how many cells (be32 values) a node whose parent
* is at parentoffset in the FDT blob will require to
* represent its address (written to *addrc) & size
* (written to *sizec).
* @map: Map the address addr from the address space of this
* bus to that of its parent, making use of the ranges
* read from DT to an array at range. na and ns are the
* number of cells (be32 values) used to hold and address
* or size, respectively, for this bus. pna is the number
* of cells used to hold an address for the parent bus.
* Returns the address in the address space of the parent
* bus.
* @translate: Update the value of the address cells at addr within an
* FDT by adding offset to it. na specifies the number of
* cells used to hold the address being translated. Returns
* zero on success, non-zero on error.
*
* Each bus type will include a struct of_bus in the of_busses array,
* providing implementations of some or all of the functions used to
* match the bus & handle address translation for its children.
*/
struct of_bus {
const char *name;
const char *addresses;
int (*match)(void *blob, int parentoffset);
void (*count_cells)(void *blob, int parentoffset,
int *addrc, int *sizec);
u64 (*map)(fdt32_t *addr, const fdt32_t *range,
@ -1022,8 +1052,70 @@ static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na)
return 0;
}
#ifdef CONFIG_OF_ISA_BUS
/* ISA bus translator */
static int of_bus_isa_match(void *blob, int parentoffset)
{
const char *name;
name = fdt_get_name(blob, parentoffset, NULL);
if (!name)
return 0;
return !strcmp(name, "isa");
}
static void of_bus_isa_count_cells(void *blob, int parentoffset,
int *addrc, int *sizec)
{
if (addrc)
*addrc = 2;
if (sizec)
*sizec = 1;
}
static u64 of_bus_isa_map(fdt32_t *addr, const fdt32_t *range,
int na, int ns, int pna)
{
u64 cp, s, da;
/* Check address type match */
if ((addr[0] ^ range[0]) & cpu_to_be32(1))
return OF_BAD_ADDR;
cp = of_read_number(range + 1, na - 1);
s = of_read_number(range + na + pna, ns);
da = of_read_number(addr + 1, na - 1);
debug("OF: ISA map, cp=%" PRIu64 ", s=%" PRIu64
", da=%" PRIu64 "\n", cp, s, da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
return da - cp;
}
static int of_bus_isa_translate(fdt32_t *addr, u64 offset, int na)
{
return of_bus_default_translate(addr + 1, offset, na - 1);
}
#endif /* CONFIG_OF_ISA_BUS */
/* Array of bus specific translators */
static struct of_bus of_busses[] = {
#ifdef CONFIG_OF_ISA_BUS
/* ISA */
{
.name = "isa",
.addresses = "reg",
.match = of_bus_isa_match,
.count_cells = of_bus_isa_count_cells,
.map = of_bus_isa_map,
.translate = of_bus_isa_translate,
},
#endif /* CONFIG_OF_ISA_BUS */
/* Default */
{
.name = "default",
@ -1034,6 +1126,28 @@ static struct of_bus of_busses[] = {
},
};
static struct of_bus *of_match_bus(void *blob, int parentoffset)
{
struct of_bus *bus;
if (ARRAY_SIZE(of_busses) == 1)
return of_busses;
for (bus = of_busses; bus; bus++) {
if (!bus->match || bus->match(blob, parentoffset))
return bus;
}
/*
* We should always have matched the default bus at least, since
* it has a NULL match field. If we didn't then it somehow isn't
* in the of_busses array or something equally catastrophic has
* gone wrong.
*/
assert(0);
return NULL;
}
static int of_translate_one(void * blob, int parent, struct of_bus *bus,
struct of_bus *pbus, fdt32_t *addr,
int na, int ns, int pna, const char *rprop)
@ -1113,7 +1227,7 @@ static u64 __of_translate_address(void *blob, int node_offset, const fdt32_t *in
parent = fdt_parent_offset(blob, node_offset);
if (parent < 0)
goto bail;
bus = &of_busses[0];
bus = of_match_bus(blob, parent);
/* Cound address cells & copy address locally */
bus->count_cells(blob, parent, &na, &ns);
@ -1142,7 +1256,7 @@ static u64 __of_translate_address(void *blob, int node_offset, const fdt32_t *in
}
/* Get new parent bus and counts */
pbus = &of_busses[0];
pbus = of_match_bus(blob, parent);
pbus->count_cells(blob, parent, &pna, &pns);
if (!OF_CHECK_COUNTS(pna, pns)) {
printf("%s: Bad cell count for %s\n", __FUNCTION__,

2
configs/malta_defconfig
View file

@ -1,5 +1,6 @@
CONFIG_MIPS=y
CONFIG_TARGET_MALTA=y
CONFIG_DEFAULT_DEVICE_TREE="mti,malta"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="malta # "
# CONFIG_CMD_LOADB is not set
@ -9,5 +10,6 @@ CONFIG_SYS_PROMPT="malta # "
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
CONFIG_OF_EMBED=y
CONFIG_SYS_NS16550=y
CONFIG_USE_PRIVATE_LIBGCC=y

2
configs/maltael_defconfig
View file

@ -1,6 +1,7 @@
CONFIG_MIPS=y
CONFIG_TARGET_MALTA=y
CONFIG_SYS_LITTLE_ENDIAN=y
CONFIG_DEFAULT_DEVICE_TREE="mti,malta"
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="maltael # "
# CONFIG_CMD_LOADB is not set
@ -10,5 +11,6 @@ CONFIG_SYS_PROMPT="maltael # "
CONFIG_CMD_DHCP=y
# CONFIG_CMD_NFS is not set
CONFIG_CMD_PING=y
CONFIG_OF_EMBED=y
CONFIG_SYS_NS16550=y
CONFIG_USE_PRIVATE_LIBGCC=y

23
drivers/core/Kconfig
View file

@ -178,4 +178,27 @@ config SPL_OF_TRANSLATE
used for the address translation. This function is faster and
smaller in size than fdt_translate_address().
config OF_ISA_BUS
bool
depends on OF_TRANSLATE
help
Is this option is enabled then support for the ISA bus will
be included for addresses read from DT. This is something that
should be known to be required or not based upon the board
being targetted, and whether or not it makes use of an ISA bus.
The bus is matched based upon its node name equalling "isa". The
busses #address-cells should equal 2, with the first cell being
used to hold flags & flag 0x1 indicating that the address range
should be accessed using I/O port in/out accessors. The second
cell holds the offset into ISA bus address space. The #size-cells
property should equal 1, and of course holds the size of the
address range used by a device.
If this option is not enabled then support for the ISA bus is
not included and any such busses used in DT will be treated as
typical simple-bus compatible busses. This will lead to
mistranslation of device addresses, so ensure that this is
enabled if your board does include an ISA bus.
endmenu

10
drivers/serial/ns16550.c
View file

@ -100,7 +100,8 @@ static void ns16550_writeb(NS16550_t port, int offset, int value)
unsigned char *addr;
offset *= 1 << plat->reg_shift;
addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
addr = (unsigned char *)plat->base + offset;
/*
* As far as we know it doesn't make sense to support selection of
* these options at run-time, so use the existing CONFIG options.
@ -114,7 +115,7 @@ static int ns16550_readb(NS16550_t port, int offset)
unsigned char *addr;
offset *= 1 << plat->reg_shift;
addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
addr = (unsigned char *)plat->base + offset;
return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
}
@ -400,7 +401,12 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
plat->base = addr;
#else
plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
#endif
plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-offset", 0);
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,

2
include/configs/ap121.h
View file

@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_TEXT_BASE 0x9f000000
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_EARLY_INIT_F

2
include/configs/ap143.h
View file

@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_TEXT_BASE 0x9f000000
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_EARLY_INIT_F

6
include/configs/dbau1x00.h
View file

@ -139,12 +139,6 @@
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
/* The following #defines are needed to get flash environment right */
/* ROM version */
#define CONFIG_SYS_TEXT_BASE 0xbfc00000
/* RAM version */
/* #define CONFIG_SYS_TEXT_BASE 0x80100000 */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)

9
include/configs/malta.h
View file

@ -37,7 +37,6 @@
/*
* Memory map
*/
#define CONFIG_SYS_TEXT_BASE 0xbe000000 /* Rom version */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
@ -65,13 +64,7 @@
* Serial driver
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (115200 * 16)
#define CONFIG_SYS_NS16550_COM1 0xb80003f8
#define CONFIG_SYS_NS16550_COM2 0xbb0003f8
#define CONFIG_CONS_INDEX 1
#define CONFIG_SYS_NS16550_PORT_MAPPED
/*
* Flash configuration

6
include/configs/pb1x00.h
View file

@ -80,12 +80,6 @@
#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
/* The following #defines are needed to get flash environment right */
/* ROM version */
/* #define CONFIG_SYS_TEXT_BASE 0xbfc00000 */
/* SDRAM version */
#define CONFIG_SYS_TEXT_BASE 0x83800000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)

1
include/configs/pic32mzdask.h
View file

@ -10,7 +10,6 @@
#define __PIC32MZDASK_CONFIG_H
/* System Configuration */
#define CONFIG_SYS_TEXT_BASE 0x9d004000 /* .text */
#define CONFIG_DISPLAY_BOARDINFO
/*--------------------------------------------

1
include/configs/qemu-mips.h
View file

@ -107,7 +107,6 @@
* FLASH and environment organization
*/
/* The following #defines are needed to get flash environment right */
#define CONFIG_SYS_TEXT_BASE 0xbfc00000 /* Rom version */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)

1
include/configs/qemu-mips64.h
View file

@ -107,7 +107,6 @@
* FLASH and environment organization
*/
/* The following #defines are needed to get flash environment right */
#define CONFIG_SYS_TEXT_BASE 0xffffffffbfc00000 /* Rom version */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (192 << 10)

2
include/configs/tplink_wdr4300.h
View file

@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_SYS_TEXT_BASE 0xa1000000
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_EARLY_INIT_F

1
include/configs/vct.h
View file

@ -32,7 +32,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
#define CONFIG_SYS_TEXT_BASE 0x87000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
#define CONFIG_SYS_MALLOC_LEN (1 << 20)