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powerpc:Add support of SPL non-relocation

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Current SPL code base has BSS section placed after reset_vector. This means
they have to relocate to use the global variables. This put an implicit
requirement of having SPL size = Memory/2.

To avoid relocation:
	- Move bss_section within SPL range
	- Modify relocate_code()

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Prabhakar Kushwaha 2014-04-08 19:12:31 +05:30 committed by York Sun
parent 49efe85b35
commit 651fcf6019
3 changed files with 17 additions and 0 deletions
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3
README
View file

@ -3332,6 +3332,9 @@ FIT uImage format:
continuing (the hardware starts execution after just continuing (the hardware starts execution after just
loading the first page rather than the full 4K). loading the first page rather than the full 4K).
CONFIG_SPL_SKIP_RELOCATE
Avoid SPL relocation
CONFIG_SPL_NAND_BASE CONFIG_SPL_NAND_BASE
Include nand_base.c in the SPL. Requires Include nand_base.c in the SPL. Requires
CONFIG_SPL_NAND_DRIVERS. CONFIG_SPL_NAND_DRIVERS.

2
arch/powerpc/cpu/mpc85xx/start.S
View file

@ -1652,6 +1652,7 @@ relocate_code:
mr r10,r5 /* Save copy of Destination Address */ mr r10,r5 /* Save copy of Destination Address */
GET_GOT GET_GOT
#ifndef CONFIG_SPL_SKIP_RELOCATE
mr r3,r5 /* Destination Address */ mr r3,r5 /* Destination Address */
lis r4,CONFIG_SYS_MONITOR_BASE@h /* Source Address */ lis r4,CONFIG_SYS_MONITOR_BASE@h /* Source Address */
ori r4,r4,CONFIG_SYS_MONITOR_BASE@l ori r4,r4,CONFIG_SYS_MONITOR_BASE@l
@ -1742,6 +1743,7 @@ relocate_code:
mtlr r0 mtlr r0
blr /* NEVER RETURNS! */ blr /* NEVER RETURNS! */
#endif
.globl in_ram .globl in_ram
in_ram: in_ram:

12
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
View file

@ -57,6 +57,16 @@ SECTIONS
. = ALIGN(8); . = ALIGN(8);
__init_begin = .; __init_begin = .;
__init_end = .; __init_end = .;
#ifdef CONFIG_SPL_SKIP_RELOCATE
. = ALIGN(4);
__bss_start = .;
.bss : {
*(.sbss*)
*(.bss*)
}
. = ALIGN(4);
__bss_end = .;
#endif
/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
@ -86,6 +96,7 @@ SECTIONS
} = 0xffff } = 0xffff
#endif #endif
#ifndef CONFIG_SPL_SKIP_RELOCATE
/* /*
* Make sure that the bss segment isn't linked at 0x0, otherwise its * Make sure that the bss segment isn't linked at 0x0, otherwise its
* address won't be updated during relocation fixups. * address won't be updated during relocation fixups.
@ -100,4 +111,5 @@ SECTIONS
} }
. = ALIGN(4); . = ALIGN(4);
__bss_end = .; __bss_end = .;
#endif
} }