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https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
dm: net: Tidy up designware driver ready for driver model
Adjust the error handling to use errno.h instead of returning -1. Change leaf functions to pass in the arguments they require rather than struct eth_device. Apart from simplifying the code it makes is easier to reuse these functions for driver model, since mostly they actually only use struct dw_eth_priv (which we can keep). Create a stub for each Ethernet operation function. This will allow use to share code with the driver model versions. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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c74c8e6651
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64dcd25f55
1 changed files with 53 additions and 34 deletions
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@ -6,10 +6,11 @@
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*/
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/*
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* Designware ethernet IP driver for u-boot
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* Designware ethernet IP driver for U-Boot
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*/
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#include <common.h>
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#include <errno.h>
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#include <miiphy.h>
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#include <malloc.h>
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#include <linux/compiler.h>
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@ -40,7 +41,7 @@ static int dw_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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udelay(10);
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};
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return -1;
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return -ETIMEDOUT;
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}
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static int dw_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
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@ -49,7 +50,7 @@ static int dw_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
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struct eth_mac_regs *mac_p = bus->priv;
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ulong start;
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u16 miiaddr;
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int ret = -1, timeout = CONFIG_MDIO_TIMEOUT;
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int ret = -ETIMEDOUT, timeout = CONFIG_MDIO_TIMEOUT;
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writel(val, &mac_p->miidata);
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miiaddr = ((addr << MIIADDRSHIFT) & MII_ADDRMSK) |
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@ -69,27 +70,26 @@ static int dw_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
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return ret;
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}
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static int dw_mdio_init(char *name, struct eth_mac_regs *mac_regs_p)
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static int dw_mdio_init(const char *name, struct eth_mac_regs *mac_regs_p)
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{
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struct mii_dev *bus = mdio_alloc();
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if (!bus) {
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printf("Failed to allocate MDIO bus\n");
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return -1;
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return -ENOMEM;
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}
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bus->read = dw_mdio_read;
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bus->write = dw_mdio_write;
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sprintf(bus->name, name);
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snprintf(bus->name, sizeof(bus->name), name);
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bus->priv = (void *)mac_regs_p;
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return mdio_register(bus);
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}
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static void tx_descs_init(struct eth_device *dev)
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static void tx_descs_init(struct dw_eth_dev *priv)
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{
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struct dw_eth_dev *priv = dev->priv;
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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struct dmamacdescr *desc_table_p = &priv->tx_mac_descrtable[0];
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char *txbuffs = &priv->txbuffs[0];
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@ -128,9 +128,8 @@ static void tx_descs_init(struct eth_device *dev)
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priv->tx_currdescnum = 0;
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}
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static void rx_descs_init(struct eth_device *dev)
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static void rx_descs_init(struct dw_eth_dev *priv)
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{
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struct dw_eth_dev *priv = dev->priv;
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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struct dmamacdescr *desc_table_p = &priv->rx_mac_descrtable[0];
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char *rxbuffs = &priv->rxbuffs[0];
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@ -170,12 +169,10 @@ static void rx_descs_init(struct eth_device *dev)
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priv->rx_currdescnum = 0;
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}
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static int dw_write_hwaddr(struct eth_device *dev)
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static int _dw_write_hwaddr(struct dw_eth_dev *priv, u8 *mac_id)
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{
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struct dw_eth_dev *priv = dev->priv;
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struct eth_mac_regs *mac_p = priv->mac_regs_p;
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u32 macid_lo, macid_hi;
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u8 *mac_id = &dev->enetaddr[0];
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macid_lo = mac_id[0] + (mac_id[1] << 8) + (mac_id[2] << 16) +
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(mac_id[3] << 24);
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@ -213,9 +210,8 @@ static void dw_adjust_link(struct eth_mac_regs *mac_p,
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(phydev->port == PORT_FIBRE) ? ", fiber mode" : "");
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}
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static void dw_eth_halt(struct eth_device *dev)
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static void _dw_eth_halt(struct dw_eth_dev *priv)
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{
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struct dw_eth_dev *priv = dev->priv;
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struct eth_mac_regs *mac_p = priv->mac_regs_p;
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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@ -225,12 +221,12 @@ static void dw_eth_halt(struct eth_device *dev)
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phy_shutdown(priv->phydev);
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}
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static int dw_eth_init(struct eth_device *dev, bd_t *bis)
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static int _dw_eth_init(struct dw_eth_dev *priv, u8 *enetaddr)
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{
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struct dw_eth_dev *priv = dev->priv;
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struct eth_mac_regs *mac_p = priv->mac_regs_p;
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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unsigned int start;
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int ret;
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writel(readl(&dma_p->busmode) | DMAMAC_SRST, &dma_p->busmode);
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@ -238,7 +234,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
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while (readl(&dma_p->busmode) & DMAMAC_SRST) {
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if (get_timer(start) >= CONFIG_MACRESET_TIMEOUT) {
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printf("DMA reset timeout\n");
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return -1;
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return -ETIMEDOUT;
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}
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mdelay(100);
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@ -246,10 +242,10 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
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/* Soft reset above clears HW address registers.
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* So we have to set it here once again */
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dw_write_hwaddr(dev);
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_dw_write_hwaddr(priv, enetaddr);
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rx_descs_init(dev);
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tx_descs_init(dev);
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rx_descs_init(priv);
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tx_descs_init(priv);
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writel(FIXEDBURST | PRIORXTX_41 | DMA_PBL, &dma_p->busmode);
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@ -268,25 +264,25 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
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#endif
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/* Start up the PHY */
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if (phy_startup(priv->phydev)) {
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ret = phy_startup(priv->phydev);
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if (ret) {
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printf("Could not initialize PHY %s\n",
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priv->phydev->dev->name);
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return -1;
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return ret;
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}
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dw_adjust_link(mac_p, priv->phydev);
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if (!priv->phydev->link)
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return -1;
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return -EIO;
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writel(readl(&mac_p->conf) | RXENABLE | TXENABLE, &mac_p->conf);
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return 0;
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}
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static int dw_eth_send(struct eth_device *dev, void *packet, int length)
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static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
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{
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struct dw_eth_dev *priv = dev->priv;
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struct eth_dma_regs *dma_p = priv->dma_regs_p;
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u32 desc_num = priv->tx_currdescnum;
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struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
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@ -309,7 +305,7 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
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/* Check if the descriptor is owned by CPU */
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if (desc_p->txrx_status & DESC_TXSTS_OWNBYDMA) {
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printf("CPU not owner of tx frame\n");
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return -1;
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return -EPERM;
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}
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memcpy(desc_p->dmamac_addr, packet, length);
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@ -347,9 +343,8 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
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return 0;
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}
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static int dw_eth_recv(struct eth_device *dev)
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static int _dw_eth_recv(struct dw_eth_dev *priv)
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{
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struct dw_eth_dev *priv = dev->priv;
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u32 status, desc_num = priv->rx_currdescnum;
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struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
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int length = 0;
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@ -395,9 +390,8 @@ static int dw_eth_recv(struct eth_device *dev)
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return length;
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}
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static int dw_phy_init(struct eth_device *dev)
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static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
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{
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struct dw_eth_dev *priv = dev->priv;
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struct phy_device *phydev;
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int mask = 0xffffffff;
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@ -407,7 +401,7 @@ static int dw_phy_init(struct eth_device *dev)
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phydev = phy_find_by_mask(priv->bus, mask, priv->interface);
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if (!phydev)
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return -1;
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return -ENODEV;
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phy_connect_dev(phydev, dev);
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@ -417,7 +411,32 @@ static int dw_phy_init(struct eth_device *dev)
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priv->phydev = phydev;
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phy_config(phydev);
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return 1;
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return 0;
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}
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static int dw_eth_init(struct eth_device *dev, bd_t *bis)
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{
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return _dw_eth_init(dev->priv, dev->enetaddr);
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}
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static int dw_eth_send(struct eth_device *dev, void *packet, int length)
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{
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return _dw_eth_send(dev->priv, packet, length);
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}
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static int dw_eth_recv(struct eth_device *dev)
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{
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return _dw_eth_recv(dev->priv);
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}
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static void dw_eth_halt(struct eth_device *dev)
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{
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return _dw_eth_halt(dev->priv);
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}
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static int dw_write_hwaddr(struct eth_device *dev)
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{
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return _dw_write_hwaddr(dev->priv, dev->enetaddr);
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}
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int designware_initialize(ulong base_addr, u32 interface)
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@ -465,5 +484,5 @@ int designware_initialize(ulong base_addr, u32 interface)
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dw_mdio_init(dev->name, priv->mac_regs_p);
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priv->bus = miiphy_get_dev_by_name(dev->name);
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return dw_phy_init(dev);
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return dw_phy_init(priv, dev);
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}
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