mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
Convert CONFIG_SYS_BOOTCOUNT_LE et al to Kconfig
This converts the following to Kconfig: CONFIG_SYS_BOOTCOUNT_LE CONFIG_SYS_BOOTCOUNT_BE Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
d9c4d66aef
commit
64a2a7b04b
32 changed files with 31 additions and 44 deletions
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@ -54,6 +54,7 @@ CONFIG_NET_RETRY_COUNT=10
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CONFIG_BOOTP_SEND_HOSTNAME=y
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# CONFIG_SPL_BLK is not set
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DFU_MMC=y
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CONFIG_DFU_RAM=y
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CONFIG_USB_FUNCTION_FASTBOOT=y
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@ -63,6 +63,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_NET_RETRY_COUNT=10
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CONFIG_BOOTP_SEND_HOSTNAME=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_CLK=y
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CONFIG_CLK_CDCE9XX=y
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CONFIG_CLK_TI_CTRL=y
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@ -53,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_NET_RETRY_COUNT=10
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CONFIG_BOOTP_SEND_HOSTNAME=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_CLK=y
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CONFIG_CLK_CDCE9XX=y
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CONFIG_DFU_TFTP=y
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@ -51,6 +51,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_NET_RETRY_COUNT=10
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CONFIG_BOOTP_SEND_HOSTNAME=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_CLK=y
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CONFIG_CLK_CDCE9XX=y
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CONFIG_DFU_MMC=y
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@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_NET_RETRY_COUNT=10
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CONFIG_BOOTP_SEND_HOSTNAME=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_CLK=y
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CONFIG_CLK_CDCE9XX=y
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CONFIG_DFU_MMC=y
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@ -68,6 +68,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_NET_RETRY_COUNT=10
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CONFIG_BOOTP_SEND_HOSTNAME=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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@ -54,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RETRY_COUNT=10
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CONFIG_BOOTP_SEND_HOSTNAME=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_MISC=y
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@ -69,6 +69,7 @@ CONFIG_BOUNCE_BUFFER=y
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CONFIG_DWC_AHSATA=y
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CONFIG_LBA48=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MXC=y
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@ -57,6 +57,7 @@ CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="fm1-mac5"
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CONFIG_DM=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_FSL_CAAM=y
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CONFIG_DDR_CLK_FREQ=66666666
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CONFIG_CHIP_SELECTS_PER_CTRL=2
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@ -200,6 +200,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_DM_BOOTCOUNT=y
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CONFIG_BOOTCOUNT_MEM=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_BR0_PRELIM_BOOL=y
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CONFIG_SYS_BR0_PRELIM=0xF0001001
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CONFIG_SYS_OR0_PRELIM=0xF0000E55
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@ -169,6 +169,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_DM_BOOTCOUNT=y
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CONFIG_BOOTCOUNT_MEM=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_BR0_PRELIM_BOOL=y
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CONFIG_SYS_BR0_PRELIM=0xF0001001
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CONFIG_SYS_OR0_PRELIM=0xF0000E55
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@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_DM_BOOTCOUNT=y
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CONFIG_BOOTCOUNT_MEM=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_BR0_PRELIM_BOOL=y
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CONFIG_SYS_BR0_PRELIM=0xF0001001
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CONFIG_SYS_OR0_PRELIM=0xF0000E55
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@ -161,6 +161,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_DM_BOOTCOUNT=y
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CONFIG_BOOTCOUNT_MEM=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_BR0_PRELIM_BOOL=y
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CONFIG_SYS_BR0_PRELIM=0xF0001001
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CONFIG_SYS_OR0_PRELIM=0xF0000E55
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@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
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CONFIG_VERSION_VARIABLE=y
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CONFIG_DM=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
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CONFIG_VERSION_VARIABLE=y
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CONFIG_DM=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
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CONFIG_VERSION_VARIABLE=y
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CONFIG_DM=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
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CONFIG_VERSION_VARIABLE=y
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CONFIG_DM=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_ARP_TIMEOUT=500
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DWAPB_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_DW=y
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@ -56,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_VERSION_VARIABLE=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DWAPB_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_DW=y
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@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y
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CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_DM_BOOTCOUNT=y
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CONFIG_BOOTCOUNT_MEM=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_SYS_BR0_PRELIM_BOOL=y
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CONFIG_SYS_BR0_PRELIM=0xF0001001
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CONFIG_SYS_OR0_PRELIM=0xF0000E55
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@ -237,4 +237,15 @@ config SYS_BOOTCOUNT_MAGIC
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help
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Set the magic value used for the boot counter.
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choice
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prompt "Endianness of bootcount accessors"
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default SYS_BOOTCOUNT_LE
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config SYS_BOOTCOUNT_LE
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bool "Little endian accessors"
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config SYS_BOOTCOUNT_BE
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bool "Big endian accessors"
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endchoice
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endif
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@ -72,14 +72,6 @@ ulong bootcount_load(void);
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#if defined(CONFIG_SPL_BOOTCOUNT_LIMIT) || defined(CONFIG_TPL_BOOTCOUNT_LIMIT) || defined(CONFIG_BOOTCOUNT_LIMIT)
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#if !defined(CONFIG_SYS_BOOTCOUNT_LE) && !defined(CONFIG_SYS_BOOTCOUNT_BE)
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# if __BYTE_ORDER == __LITTLE_ENDIAN
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# define CONFIG_SYS_BOOTCOUNT_LE
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# else
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# define CONFIG_SYS_BOOTCOUNT_BE
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# endif
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#endif
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#ifdef CONFIG_SYS_BOOTCOUNT_LE
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static inline void raw_bootcount_store(volatile u32 *addr, u32 data)
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{
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@ -170,14 +170,6 @@
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/* PMIC support */
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#define CONFIG_POWER_TPS65910
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/* SPL */
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#ifndef CONFIG_NOR_BOOT
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/* Bootcount using the RTC block */
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* USB gadget RNDIS */
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#endif
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#ifdef CONFIG_MTD_RAW_NAND
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/* NAND: device related configs */
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/* NAND: driver related configs */
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@ -93,9 +93,6 @@
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#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
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#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
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/* Bootcount using the RTC block */
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#define CONFIG_SYS_BOOTCOUNT_LE
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#ifdef CONFIG_MTD_RAW_NAND
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
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@ -50,9 +50,6 @@
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/* SPL */
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/* Bootcount using the RTC block */
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* Network. */
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#endif /* ! __CONFIG_AM335X_SL50_H */
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@ -105,8 +105,6 @@
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#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
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/* SPL */
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/* Bootcount using the RTC block */
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* NAND: device related configs */
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/* NAND: driver related configs */
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@ -26,9 +26,6 @@
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/* Miscellaneous configurable options */
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/* Bootcounter */
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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@ -14,8 +14,6 @@
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#define CONFIG_PL011_CLOCK 150000000
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#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
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/*
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* Miscellaneous configurable options
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*/
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@ -187,8 +187,6 @@
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#define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */
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#define CONFIG_SYS_BOOTCOUNT_BE
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/*
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* Environment
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*/
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@ -16,9 +16,4 @@
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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/*
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* Bootcounter
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*/
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#define CONFIG_SYS_BOOTCOUNT_BE
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#endif /* __CONFIG_SOCFPGA_IS1_H__ */
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@ -18,11 +18,6 @@
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/* Enable SPI NOR flash reset, needed for SPI booting */
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#define CONFIG_SPI_N25Q256A_RESET
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/*
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* Bootcounter
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*/
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* Environment setting for SPI flash */
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/* The rest of the configuration is shared */
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@ -24,9 +24,6 @@
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/* LED */
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/* Bootcounter */
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#define CONFIG_SYS_BOOTCOUNT_BE
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/* I2C */
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#endif /* __CONFIG_TQMA6_WRU4_H */
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