Convert CONFIG_SYS_BOOTCOUNT_LE et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_BOOTCOUNT_LE
   CONFIG_SYS_BOOTCOUNT_BE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-06-25 11:02:49 -04:00
parent d9c4d66aef
commit 64a2a7b04b
32 changed files with 31 additions and 44 deletions

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@ -54,6 +54,7 @@ CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
# CONFIG_SPL_BLK is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_USB_FUNCTION_FASTBOOT=y

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@ -63,6 +63,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_CLK=y
CONFIG_CLK_CDCE9XX=y
CONFIG_CLK_TI_CTRL=y

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@ -53,6 +53,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_CLK=y
CONFIG_CLK_CDCE9XX=y
CONFIG_DFU_TFTP=y

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@ -51,6 +51,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_CLK=y
CONFIG_CLK_CDCE9XX=y
CONFIG_DFU_MMC=y

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@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_CLK=y
CONFIG_CLK_CDCE9XX=y
CONFIG_DFU_MMC=y

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@ -68,6 +68,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50

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@ -54,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MISC=y

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@ -69,6 +69,7 @@ CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
CONFIG_LBA48=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y

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@ -57,6 +57,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="fm1-mac5"
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2

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@ -200,6 +200,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xF0001001
CONFIG_SYS_OR0_PRELIM=0xF0000E55

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@ -169,6 +169,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xF0001001
CONFIG_SYS_OR0_PRELIM=0xF0000E55

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@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xF0001001
CONFIG_SYS_OR0_PRELIM=0xF0000E55

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@ -161,6 +161,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xF0001001
CONFIG_SYS_OR0_PRELIM=0xF0000E55

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@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
CONFIG_VERSION_VARIABLE=y
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y

View file

@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
CONFIG_VERSION_VARIABLE=y
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y

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@ -70,6 +70,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
CONFIG_VERSION_VARIABLE=y
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y

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@ -68,6 +68,7 @@ CONFIG_ETHPRIME="ethernet@2d90000"
CONFIG_VERSION_VARIABLE=y
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y

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@ -52,6 +52,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_ARP_TIMEOUT=500
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y

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@ -56,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_DW=y

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@ -160,6 +160,7 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_DM_BOOTCOUNT=y
CONFIG_BOOTCOUNT_MEM=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xF0001001
CONFIG_SYS_OR0_PRELIM=0xF0000E55

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@ -237,4 +237,15 @@ config SYS_BOOTCOUNT_MAGIC
help
Set the magic value used for the boot counter.
choice
prompt "Endianness of bootcount accessors"
default SYS_BOOTCOUNT_LE
config SYS_BOOTCOUNT_LE
bool "Little endian accessors"
config SYS_BOOTCOUNT_BE
bool "Big endian accessors"
endchoice
endif

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@ -72,14 +72,6 @@ ulong bootcount_load(void);
#if defined(CONFIG_SPL_BOOTCOUNT_LIMIT) || defined(CONFIG_TPL_BOOTCOUNT_LIMIT) || defined(CONFIG_BOOTCOUNT_LIMIT)
#if !defined(CONFIG_SYS_BOOTCOUNT_LE) && !defined(CONFIG_SYS_BOOTCOUNT_BE)
# if __BYTE_ORDER == __LITTLE_ENDIAN
# define CONFIG_SYS_BOOTCOUNT_LE
# else
# define CONFIG_SYS_BOOTCOUNT_BE
# endif
#endif
#ifdef CONFIG_SYS_BOOTCOUNT_LE
static inline void raw_bootcount_store(volatile u32 *addr, u32 data)
{

View file

@ -170,14 +170,6 @@
/* PMIC support */
#define CONFIG_POWER_TPS65910
/* SPL */
#ifndef CONFIG_NOR_BOOT
/* Bootcount using the RTC block */
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
#endif
#ifdef CONFIG_MTD_RAW_NAND
/* NAND: device related configs */
/* NAND: driver related configs */

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@ -93,9 +93,6 @@
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* Bootcount using the RTC block */
#define CONFIG_SYS_BOOTCOUNT_LE
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \

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@ -50,9 +50,6 @@
/* SPL */
/* Bootcount using the RTC block */
#define CONFIG_SYS_BOOTCOUNT_BE
/* Network. */
#endif /* ! __CONFIG_AM335X_SL50_H */

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@ -105,8 +105,6 @@
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* SPL */
/* Bootcount using the RTC block */
#define CONFIG_SYS_BOOTCOUNT_BE
/* NAND: device related configs */
/* NAND: driver related configs */

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@ -26,9 +26,6 @@
/* Miscellaneous configurable options */
/* Bootcounter */
#define CONFIG_SYS_BOOTCOUNT_BE
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 3

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@ -14,8 +14,6 @@
#define CONFIG_PL011_CLOCK 150000000
#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
/*
* Miscellaneous configurable options
*/

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@ -187,8 +187,6 @@
#define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */
#define CONFIG_SYS_BOOTCOUNT_BE
/*
* Environment
*/

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@ -16,9 +16,4 @@
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
/*
* Bootcounter
*/
#define CONFIG_SYS_BOOTCOUNT_BE
#endif /* __CONFIG_SOCFPGA_IS1_H__ */

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@ -18,11 +18,6 @@
/* Enable SPI NOR flash reset, needed for SPI booting */
#define CONFIG_SPI_N25Q256A_RESET
/*
* Bootcounter
*/
#define CONFIG_SYS_BOOTCOUNT_BE
/* Environment setting for SPI flash */
/* The rest of the configuration is shared */

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@ -24,9 +24,6 @@
/* LED */
/* Bootcounter */
#define CONFIG_SYS_BOOTCOUNT_BE
/* I2C */
#endif /* __CONFIG_TQMA6_WRU4_H */