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arm: ls102xa: Add snoop disable for slave port 0, 1 and 2

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Disable the snoop for slave interface 0, 1 and 2
to avoid the interleaving on the CCI400 BUS.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Jason Jin 2014-10-17 15:26:32 +08:00 committed by York Sun
parent 8776cb205e
commit 644bc7ec5c
3 changed files with 18 additions and 0 deletions
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1
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
View file

@ -448,6 +448,7 @@ struct ccsr_ddr {
#define CCI400_CTRLORD_TERM_BARRIER 0x00000008
#define CCI400_CTRLORD_EN_BARRIER 0
#define CCI400_SHAORD_NON_SHAREABLE 0x00000002
/* CCI-400 registers */
struct ccsr_cci400 {

7
board/freescale/ls1021aqds/ls1021aqds.c
View file

@ -233,6 +233,13 @@ int board_init(void)
/* Set CCI-400 control override register to
* enable barrier transaction */
out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
/*
* Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register
* All transactions are treated as non-shareable
*/
out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);

10
board/freescale/ls1021atwr/ls1021atwr.c
View file

@ -277,6 +277,16 @@ int board_early_init_f(void)
int board_init(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
/*
* Set CCI-400 Slave interface S0, S1, S2 Shareable Override Register
* All transactions are treated as non-shareable
*/
out_le32(&cci->slave[0].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
#ifndef CONFIG_SYS_FSL_NO_SERDES
fsl_serdes_init();
config_serdes_mux();