diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index 645c497370..9edb47502c 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -39,6 +39,9 @@ static void exynos5_uart_config(int peripheral)
start = 4;
count = 2;
break;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return;
}
for (i = start; i < start + count; i++) {
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
@@ -74,6 +77,9 @@ static void exynos5420_uart_config(int peripheral)
start = 4;
count = 2;
break;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return;
}
for (i = start; i < start + count; i++) {
@@ -110,6 +116,9 @@ static int exynos5_mmc_config(int peripheral, int flags)
bank = &gpio1->c4;
bank_ext = NULL;
break;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return -1;
}
if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) {
debug("SDMMC device %d does not support 8bit mode",
@@ -683,6 +692,9 @@ static void exynos4_uart_config(int peripheral)
start = 4;
count = 2;
break;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return;
}
for (i = start; i < start + count; i++) {
s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
@@ -741,6 +753,21 @@ int exynos_pinmux_config(int peripheral, int flags)
}
#ifdef CONFIG_OF_CONTROL
+static int exynos4_pinmux_decode_periph_id(const void *blob, int node)
+{
+ int err;
+ u32 cell[3];
+
+ err = fdtdec_get_int_array(blob, node, "interrupts", cell,
+ ARRAY_SIZE(cell));
+ if (err) {
+ debug(" invalid peripheral id\n");
+ return PERIPH_ID_NONE;
+ }
+
+ return cell[1];
+}
+
static int exynos5_pinmux_decode_periph_id(const void *blob, int node)
{
int err;
@@ -758,6 +785,8 @@ int pinmux_decode_periph_id(const void *blob, int node)
{
if (cpu_is_exynos5())
return exynos5_pinmux_decode_periph_id(blob, node);
+ else if (cpu_is_exynos4())
+ return exynos4_pinmux_decode_periph_id(blob, node);
else
return PERIPH_ID_NONE;
}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e2fcca5670..631a9bede1 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,3 +1,8 @@
+dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
+ exynos4210-universal_c210.dtb \
+ exynos4210-trats.dtb \
+ exynos4412-trats2.dtb
+
dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
exynos5250-smdk5250.dtb \
diff --git a/arch/arm/dts/exynos4.dtsi b/arch/arm/dts/exynos4.dtsi
new file mode 100644
index 0000000000..71dc7ebf4a
--- /dev/null
+++ b/arch/arm/dts/exynos4.dtsi
@@ -0,0 +1,138 @@
+/*
+ * Samsung's Exynos4 SoC common device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ serial@13800000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13800000 0x3c>;
+ id = <0>;
+ };
+
+ serial@13810000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13810000 0x3c>;
+ id = <1>;
+ };
+
+ serial@13820000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13820000 0x3c>;
+ id = <2>;
+ };
+
+ serial@13830000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13830000 0x3c>;
+ id = <3>;
+ };
+
+ serial@13840000 {
+ compatible = "samsung,exynos4210-uart";
+ reg = <0x13840000 0x3c>;
+ id = <4>;
+ };
+
+ i2c@13860000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <0 0 0>;
+ };
+
+ i2c@13870000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <1 1 0>;
+ };
+
+ i2c@13880000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <2 2 0>;
+ };
+
+ i2c@13890000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <3 3 0>;
+ };
+
+ i2c@138a0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <4 4 0>;
+ };
+
+ i2c@138b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <5 5 0>;
+ };
+
+ i2c@138c0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <6 6 0>;
+ };
+
+ i2c@138d0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,s3c2440-i2c";
+ interrupts = <7 7 0>;
+ };
+
+ sdhci@12510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12510000 0x1000>;
+ interrupts = <0 75 0>;
+ };
+
+ sdhci@12520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12520000 0x1000>;
+ interrupts = <0 76 0>;
+ };
+
+ sdhci@12530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12530000 0x1000>;
+ interrupts = <0 77 0>;
+ };
+
+ sdhci@12540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "samsung,exynos-mmc";
+ reg = <0x12540000 0x1000>;
+ interrupts = <0 78 0>;
+ };
+
+ gpio: gpio {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
diff --git a/arch/arm/dts/exynos4210-origen.dts b/arch/arm/dts/exynos4210-origen.dts
new file mode 100644
index 0000000000..5c9d2aed68
--- /dev/null
+++ b/arch/arm/dts/exynos4210-origen.dts
@@ -0,0 +1,45 @@
+/*
+ * Samsung's Exynos4210 based Origen board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "skeleton.dtsi"
+/include/ "exynos4.dtsi"
+
+/ {
+ model = "Insignal Origen evaluation board based on Exynos4210";
+ compatible = "insignal,origen", "samsung,exynos4210";
+
+ chosen {
+ bootargs ="";
+ };
+
+ aliases {
+ serial0 = "/serial@13800000";
+ console = "/serial@13820000";
+ mmc2 = "sdhci@12530000";
+ };
+
+ sdhci@12510000 {
+ status = "disabled";
+ };
+
+ sdhci@12520000 {
+ status = "disabled";
+ };
+
+ sdhci@12530000 {
+ samsung,bus-width = <4>;
+ samsung,timing = <1 2 3>;
+ cd-gpios = <&gpio 0x2008002 0>;
+ };
+
+ sdhci@12540000 {
+ status = "disabled";
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/dts/exynos4210-trats.dts b/arch/arm/dts/exynos4210-trats.dts
new file mode 100644
index 0000000000..992e0234c9
--- /dev/null
+++ b/arch/arm/dts/exynos4210-trats.dts
@@ -0,0 +1,120 @@
+/*
+ * Samsung's Exynos4210 based Trats board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "exynos4.dtsi"
+
+/ {
+ model = "Samsung Trats based on Exynos4210";
+ compatible = "samsung,trats", "samsung,exynos4210";
+
+ config {
+ samsung,dsim-device-name = "s6e8ax0";
+ };
+
+ aliases {
+ i2c0 = "/i2c@13860000";
+ i2c1 = "/i2c@13870000";
+ i2c2 = "/i2c@13880000";
+ i2c3 = "/i2c@13890000";
+ i2c4 = "/i2c@138a0000";
+ i2c5 = "/i2c@138b0000";
+ i2c6 = "/i2c@138c0000";
+ i2c7 = "/i2c@138d0000";
+ serial0 = "/serial@13800000";
+ console = "/serial@13820000";
+ mmc0 = "sdhci@12510000";
+ mmc2 = "sdhci@12530000";
+ };
+
+ fimd@11c00000 {
+ compatible = "samsung,exynos-fimd";
+ reg = <0x11c00000 0xa4>;
+
+ samsung,vl-freq = <60>;
+ samsung,vl-col = <720>;
+ samsung,vl-row = <1280>;
+ samsung,vl-width = <720>;
+ samsung,vl-height = <1280>;
+
+ samsung,vl-clkp = <0>;
+ samsung,vl-oep = <0>;
+ samsung,vl-hsp = <1>;
+ samsung,vl-vsp = <1>;
+ samsung,vl-dp = <1>;
+ samsung,vl-bpix = <4>;
+
+ samsung,vl-hspw = <5>;
+ samsung,vl-hbpd = <10>;
+ samsung,vl-hfpd = <10>;
+ samsung,vl-vspw = <2>;
+ samsung,vl-vbpd = <1>;
+ samsung,vl-vfpd = <13>;
+ samsung,vl-cmd-allow-len = <0xf>;
+
+ samsung,winid = <3>;
+ samsung,power-on-delay = <30>;
+ samsung,interface-mode = <1>;
+ samsung,mipi-enabled = <1>;
+ samsung,dp-enabled;
+ samsung,dual-lcd-enabled;
+
+ samsung,logo-on = <1>;
+ samsung,resolution = <0>;
+ samsung,rgb-mode = <0>;
+ };
+
+ mipidsi@11c80000 {
+ compatible = "samsung,exynos-mipi-dsi";
+ reg = <0x11c80000 0x5c>;
+
+ samsung,dsim-config-e-interface = <1>;
+ samsung,dsim-config-e-virtual-ch = <0>;
+ samsung,dsim-config-e-pixel-format = <7>;
+ samsung,dsim-config-e-burst-mode = <1>;
+ samsung,dsim-config-e-no-data-lane = <3>;
+ samsung,dsim-config-e-byte-clk = <0>;
+ samsung,dsim-config-hfp = <1>;
+
+ samsung,dsim-config-p = <3>;
+ samsung,dsim-config-m = <120>;
+ samsung,dsim-config-s = <1>;
+
+ samsung,dsim-config-pll-stable-time = <500>;
+ samsung,dsim-config-esc-clk = <20000000>;
+ samsung,dsim-config-stop-holding-cnt = <0x7ff>;
+ samsung,dsim-config-bta-timeout = <0xff>;
+ samsung,dsim-config-rx-timeout = <0xffff>;
+
+ samsung,dsim-device-id = <0xffffffff>;
+ samsung,dsim-device-bus-id = <0>;
+
+ samsung,dsim-device-reverse-panel = <1>;
+ };
+
+ sdhci@12510000 {
+ samsung,bus-width = <8>;
+ samsung,timing = <1 3 3>;
+ pwr-gpios = <&gpio 0x2008002 0>;
+ };
+
+ sdhci@12520000 {
+ status = "disabled";
+ };
+
+ sdhci@12530000 {
+ samsung,bus-width = <4>;
+ samsung,timing = <1 2 3>;
+ cd-gpios = <&gpio 0x20c6004 0>;
+ };
+
+ sdhci@12540000 {
+ status = "disabled";
+ };
+};
\ No newline at end of file
diff --git a/arch/arm/dts/exynos4210-universal_c210.dts b/arch/arm/dts/exynos4210-universal_c210.dts
new file mode 100644
index 0000000000..1cdd981d6d
--- /dev/null
+++ b/arch/arm/dts/exynos4210-universal_c210.dts
@@ -0,0 +1,83 @@
+/*
+ * Samsung's Exynos4210 based Universal C210 board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "exynos4.dtsi"
+
+/ {
+ model = "Samsung Universal C210 based on Exynos4210 rev0";
+ compatible = "samsung,universal_c210", "samsung,exynos4210";
+
+ aliases {
+ serial0 = "/serial@13800000";
+ console = "/serial@13820000";
+ mmc0 = "sdhci@12510000";
+ mmc2 = "sdhci@12530000";
+ };
+
+ sdhci@12510000 {
+ samsung,bus-width = <8>;
+ samsung,timing = <1 3 3>;
+ pwr-gpios = <&gpio 0x2008002 0>;
+ };
+
+ sdhci@12520000 {
+ status = "disabled";
+ };
+
+ sdhci@12530000 {
+ samsung,bus-width = <4>;
+ samsung,timing = <1 2 3>;
+ cd-gpios = <&gpio 0x20c6004 0>;
+ };
+
+ sdhci@12540000 {
+ status = "disabled";
+ };
+
+ fimd@11c00000 {
+ compatible = "samsung,exynos-fimd";
+ reg = <0x11c00000 0xa4>;
+
+ samsung,vl-freq = <60>;
+ samsung,vl-col = <480>;
+ samsung,vl-row = <800>;
+ samsung,vl-width = <480>;
+ samsung,vl-height = <800>;
+
+ samsung,vl-clkp = <0>;
+ samsung,vl-oep = <0>;
+ samsung,vl-hsp = <1>;
+ samsung,vl-vsp = <1>;
+ samsung,vl-dp = <1>;
+ samsung,vl-bpix = <4>;
+
+ samsung,vl-hspw = <2>;
+ samsung,vl-hbpd = <16>;
+ samsung,vl-hfpd = <16>;
+ samsung,vl-vspw = <2>;
+ samsung,vl-vbpd = <8>;
+ samsung,vl-vfpd = <8>;
+ samsung,vl-cmd-allow-len = <0xf>;
+
+ samsung,pclk_name = <1>;
+ samsung,sclk_div = <1>;
+
+ samsung,winid = <0>;
+ samsung,power-on-delay = <10000>;
+ samsung,interface-mode = <1>;
+ samsung,mipi-enabled = <0>;
+ samsung,dp-enabled;
+ samsung,dual-lcd-enabled;
+
+ samsung,logo-on = <1>;
+ samsung,resolution = <0>;
+ samsung,rgb-mode = <0>;
+ };
+};
diff --git a/arch/arm/dts/exynos4412-trats2.dts b/arch/arm/dts/exynos4412-trats2.dts
new file mode 100644
index 0000000000..7d32067fdd
--- /dev/null
+++ b/arch/arm/dts/exynos4412-trats2.dts
@@ -0,0 +1,434 @@
+/*
+ * Samsung's Exynos4412 based Trats2 board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "exynos4.dtsi"
+
+/ {
+ model = "Samsung Trats2 based on Exynos4412";
+ compatible = "samsung,trats2", "samsung,exynos4412";
+
+ config {
+ samsung,dsim-device-name = "s6e8ax0";
+ };
+
+ aliases {
+ i2c0 = "/i2c@13860000";
+ i2c1 = "/i2c@13870000";
+ i2c2 = "/i2c@13880000";
+ i2c3 = "/i2c@13890000";
+ i2c4 = "/i2c@138a0000";
+ i2c5 = "/i2c@138b0000";
+ i2c6 = "/i2c@138c0000";
+ i2c7 = "/i2c@138d0000";
+ serial0 = "/serial@13800000";
+ console = "/serial@13820000";
+ mmc0 = "sdhci@12510000";
+ mmc2 = "sdhci@12530000";
+ };
+
+ i2c@138d0000 {
+ samsung,i2c-sda-delay = <100>;
+ samsung,i2c-slave-addr = <0x10>;
+ samsung,i2c-max-bus-freq = <100000>;
+ status = "okay";
+
+ max77686_pmic@09 {
+ compatible = "maxim,max77686_pmic";
+ interrupts = <7 0>;
+ reg = <0x09 0 0>;
+ #clock-cells = <1>;
+
+ voltage-regulators {
+ ldo1_reg: ldo1 {
+ regulator-compatible = "LDO1";
+ regulator-name = "VALIVE_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-mem-on;
+ };
+
+ ldo2_reg: ldo2 {
+ regulator-compatible = "LDO2";
+ regulator-name = "VM1M2_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ regulator-mem-on;
+ };
+
+ ldo3_reg: ldo3 {
+ regulator-compatible = "LDO3";
+ regulator-name = "VCC_1.8V_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-mem-on;
+ };
+
+ ldo4_reg: ldo4 {
+ regulator-compatible = "LDO4";
+ regulator-name = "VCC_2.8V_AP";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-mem-on;
+ };
+
+ ldo5_reg: ldo5 {
+ regulator-compatible = "LDO5";
+ regulator-name = "VCC_1.8V_IO";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-mem-on;
+ };
+
+ ldo6_reg: ldo6 {
+ regulator-compatible = "LDO6";
+ regulator-name = "VMPLL_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-mem-on;
+ };
+
+ ldo7_reg: ldo7 {
+ regulator-compatible = "LDO7";
+ regulator-name = "VPLL_1.0V_AP";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-always-on;
+ regulator-mem-on;
+ };
+
+ ldo8_reg: ldo8 {
+ regulator-compatible = "LDO8";
+ regulator-name = "VMIPI_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-mem-off;
+ };
+
+ ldo9_reg: ldo9 {
+ regulator-compatible = "LDO9";
+ regulator-name = "CAM_ISP_MIPI_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-mem-idle;
+ };
+
+ ldo10_reg: ldo10 {
+ regulator-compatible = "LDO10";
+ regulator-name = "VMIPI_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-mem-off;
+ };
+
+ ldo11_reg: ldo11 {
+ regulator-compatible = "LDO11";
+ regulator-name = "VABB1_1.95V";
+ regulator-min-microvolt = <1950000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-mem-off;
+ };
+
+ ldo12_reg: ldo12 {
+ regulator-compatible = "LDO12";
+ regulator-name = "VUOTG_3.0V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-mem-off;
+ };
+
+ ldo13_reg: ldo13 {
+ regulator-compatible = "LDO13";
+ regulator-name = "NFC_AVDD_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-mem-idle;
+ };
+
+ ldo14_reg: ldo14 {
+ regulator-compatible = "LDO14";
+ regulator-name = "VABB2_1.95V";
+ regulator-min-microvolt = <1950000>;
+ regulator-max-microvolt = <1950000>;
+ regulator-always-on;
+ regulator-mem-off;
+ };
+
+ ldo15_reg: ldo15 {
+ regulator-compatible = "LDO15";
+ regulator-name = "VHSIC_1.0V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-mem-off;
+ };
+
+ ldo16_reg: ldo16 {
+ regulator-compatible = "LDO16";
+ regulator-name = "VHSIC_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-mem-off;
+ };
+
+ ldo17_reg: ldo17 {
+ regulator-compatible = "LDO17";
+ regulator-name = "CAM_SENSOR_CORE_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-mem-idle;
+ };
+
+ ldo18_reg: ldo18 {
+ regulator-compatible = "LDO18";
+ regulator-name = "CAM_ISP_SEN_IO_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-mem-idle;
+ };
+
+ ldo19_reg: ldo19 {
+ regulator-compatible = "LDO19";
+ regulator-name = "VT_CAM_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-mem-idle;
+ };
+
+ ldo20_reg: ldo20 {
+ regulator-compatible = "LDO20";
+ regulator-name = "VDDQ_PRE_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-mem-idle;
+ };
+
+ ldo21_reg: ldo21 {
+ regulator-compatible = "LDO21";
+ regulator-name = "VTF_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-mem-idle;
+ };
+
+ ldo22_reg: ldo22 {
+ regulator-compatible = "LDO22";
+ regulator-name = "VMEM_VDD_2.8V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ regulator-mem-off;
+ };
+
+ ldo23_reg: ldo23 {
+ regulator-compatible = "LDO23";
+ regulator-name = "TSP_AVDD_3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-mem-idle;
+ };
+
+ ldo24_reg: ldo24 {
+ regulator-compatible = "LDO24";
+ regulator-name = "TSP_VDD_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-mem-idle;
+ };
+
+ ldo25_reg: ldo25 {
+ regulator-compatible = "LDO25";
+ regulator-name = "LCD_VCC_3.3V";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-mem-idle;
+ };
+
+ ldo26_reg: ldo26 {
+ regulator-compatible = "LDO26";
+ regulator-name = "MOTOR_VCC_3.0V";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-mem-idle;
+ };
+
+ buck1_reg: buck1 {
+ regulator-compatible = "BUCK1";
+ regulator-name = "vdd_mif";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-mem-off;
+ };
+
+ buck2_reg: buck2 {
+ regulator-compatible = "BUCK2";
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-mem-off;
+ };
+
+ buck3_reg: buck3 {
+ regulator-compatible = "BUCK3";
+ regulator-name = "vdd_int";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-mem-off;
+ };
+
+ buck4_reg: buck4 {
+ regulator-compatible = "BUCK4";
+ regulator-name = "vdd_g3d";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-mem-off;
+ };
+
+ buck5_reg: buck5 {
+ regulator-compatible = "BUCK5";
+ regulator-name = "VMEM_1.2V_AP";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ buck6_reg: buck6 {
+ regulator-compatible = "BUCK6";
+ regulator-name = "VCC_SUB_1.35V";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ };
+
+ buck7_reg: buck7 {
+ regulator-compatible = "BUCK7";
+ regulator-name = "VCC_SUB_2.0V";
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
+ };
+
+ buck8_reg: buck8 {
+ regulator-compatible = "BUCK8";
+ regulator-name = "VMEM_VDDF_3.0V";
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ regulator-always-on;
+ regulator-mem-off;
+ };
+
+ buck9_reg: buck9 {
+ regulator-compatible = "BUCK9";
+ regulator-name = "CAM_ISP_CORE_1.2V";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-mem-off;
+ };
+ };
+ };
+ };
+
+ fimd@11c00000 {
+ compatible = "samsung,exynos-fimd";
+ reg = <0x11c00000 0xa4>;
+
+ samsung,vl-freq = <60>;
+ samsung,vl-col = <720>;
+ samsung,vl-row = <1280>;
+ samsung,vl-width = <720>;
+ samsung,vl-height = <1280>;
+
+ samsung,vl-clkp = <0>;
+ samsung,vl-oep = <0>;
+ samsung,vl-hsp = <1>;
+ samsung,vl-vsp = <1>;
+ samsung,vl-dp = <1>;
+ samsung,vl-bpix = <4>;
+
+ samsung,vl-hspw = <5>;
+ samsung,vl-hbpd = <10>;
+ samsung,vl-hfpd = <10>;
+ samsung,vl-vspw = <2>;
+ samsung,vl-vbpd = <1>;
+ samsung,vl-vfpd = <13>;
+ samsung,vl-cmd-allow-len = <0xf>;
+
+ samsung,winid = <0>;
+ samsung,power-on-delay = <30>;
+ samsung,interface-mode = <1>;
+ samsung,mipi-enabled = <1>;
+ samsung,dp-enabled;
+ samsung,dual-lcd-enabled;
+
+ samsung,logo-on = <1>;
+ samsung,resolution = <0>;
+ samsung,rgb-mode = <0>;
+ };
+
+ mipidsi@11c80000 {
+ compatible = "samsung,exynos-mipi-dsi";
+ reg = <0x11c80000 0x5c>;
+
+ samsung,dsim-config-e-interface = <1>;
+ samsung,dsim-config-e-virtual-ch = <0>;
+ samsung,dsim-config-e-pixel-format = <7>;
+ samsung,dsim-config-e-burst-mode = <1>;
+ samsung,dsim-config-e-no-data-lane = <3>;
+ samsung,dsim-config-e-byte-clk = <0>;
+ samsung,dsim-config-hfp = <1>;
+
+ samsung,dsim-config-p = <3>;
+ samsung,dsim-config-m = <120>;
+ samsung,dsim-config-s = <1>;
+
+ samsung,dsim-config-pll-stable-time = <500>;
+ samsung,dsim-config-esc-clk = <20000000>;
+ samsung,dsim-config-stop-holding-cnt = <0x7ff>;
+ samsung,dsim-config-bta-timeout = <0xff>;
+ samsung,dsim-config-rx-timeout = <0xffff>;
+
+ samsung,dsim-device-id = <0xffffffff>;
+ samsung,dsim-device-bus-id = <0>;
+
+ samsung,dsim-device-reverse-panel = <1>;
+ };
+
+ sdhci@12510000 {
+ samsung,bus-width = <8>;
+ samsung,timing = <1 3 3>;
+ pwr-gpios = <&gpio 0x2004002 0>;
+ };
+
+ sdhci@12520000 {
+ status = "disabled";
+ };
+
+ sdhci@12530000 {
+ samsung,bus-width = <4>;
+ samsung,timing = <1 2 3>;
+ cd-gpios = <&gpio 0x20C6004 0>;
+ };
+
+ sdhci@12540000 {
+ status = "disabled";
+ };
+};
diff --git a/arch/arm/include/asm/arch-exynos/board.h b/arch/arm/include/asm/arch-exynos/board.h
index 243fb12b76..1b1cd0dd9e 100644
--- a/arch/arm/include/asm/arch-exynos/board.h
+++ b/arch/arm/include/asm/arch-exynos/board.h
@@ -14,4 +14,16 @@
*/
int exynos_init(void);
+/*
+ * Exynos board specific changes for
+ * board_early_init_f
+ */
+int exynos_early_init_f(void);
+
+/*
+ * Exynos board specific changes for
+ * board_power_init
+ */
+int exynos_power_init(void);
+
#endif /* EXYNOS_BOARD_H */
diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index 40aca71678..50e5c258a9 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -12,6 +12,7 @@
#include <linux/list.h>
#include <linux/fb.h>
+#include <lcd.h>
#define PANEL_NAME_SIZE (32)
@@ -368,8 +369,12 @@ int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
*lcd_dev);
void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);
+void exynos_init_dsim_platform_data(vidinfo_t *vid);
/* panel driver init based on mipi dsi interface */
void s6e8ax0_init(void);
+#ifdef CONFIG_OF_CONTROL
+extern int mipi_power(void);
+#endif
#endif /* _DSIM_H */
diff --git a/arch/arm/include/asm/arch-exynos/mmc.h b/arch/arm/include/asm/arch-exynos/mmc.h
index 98d6530b15..0fb6461c08 100644
--- a/arch/arm/include/asm/arch-exynos/mmc.h
+++ b/arch/arm/include/asm/arch-exynos/mmc.h
@@ -53,6 +53,8 @@
#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16)
#define SDHCI_CTRL4_DRIVE_SHIFT (16)
+#define SDHCI_MAX_HOSTS 4
+
int s5p_sdhci_init(u32 regbase, int index, int bus_width);
static inline int s5p_mmc_init(int index, int bus_width)
@@ -62,4 +64,9 @@ static inline int s5p_mmc_init(int index, int bus_width)
return s5p_sdhci_init(base, index, bus_width);
}
+
+#ifdef CONFIG_OF_CONTROL
+int exynos_mmc_init(const void *blob);
+#endif
+
#endif
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index cd873bc56d..e95e9c4619 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -22,7 +22,8 @@
#include <asm/arch/power.h>
#include <power/pmic.h>
#include <asm/arch/sromc.h>
-#include <power/max77686_pmic.h>
+#include <lcd.h>
+#include <samsung/misc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -33,6 +34,20 @@ struct local_info {
static struct local_info local;
+int __exynos_early_init_f(void)
+{
+ return 0;
+}
+int exynos_early_init_f(void)
+ __attribute__((weak, alias("__exynos_early_init_f")));
+
+int __exynos_power_init(void)
+{
+ return 0;
+}
+int exynos_power_init(void)
+ __attribute__((weak, alias("__exynos_power_init")));
+
#if defined CONFIG_EXYNOS_TMU
/* Boot Time Thermal Analysis for SoC temperature threshold breach */
static void boot_temp_check(void)
@@ -140,7 +155,7 @@ int board_early_init_f(void)
board_i2c_init(gd->fdt_blob);
#endif
- return err;
+ return exynos_early_init_f();
}
#endif
@@ -161,134 +176,16 @@ static int board_init_cros_ec_devices(const void *blob)
#endif
#if defined(CONFIG_POWER)
-#ifdef CONFIG_POWER_MAX77686
-static int pmic_reg_update(struct pmic *p, int reg, uint regval)
-{
- u32 val;
- int ret = 0;
-
- ret = pmic_reg_read(p, reg, &val);
- if (ret) {
- debug("%s: PMIC %d register read failed\n", __func__, reg);
- return -1;
- }
- val |= regval;
- ret = pmic_reg_write(p, reg, val);
- if (ret) {
- debug("%s: PMIC %d register write failed\n", __func__, reg);
- return -1;
- }
- return 0;
-}
-
-static int max77686_init(void)
-{
- struct pmic *p;
-
- if (pmic_init(I2C_PMIC))
- return -1;
-
- p = pmic_get("MAX77686_PMIC");
- if (!p)
- return -ENODEV;
-
- if (pmic_probe(p))
- return -1;
-
- if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
- return -1;
-
- if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
- MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
- return -1;
-
- /* VDD_MIF */
- if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
- MAX77686_BUCK1OUT_1V)) {
- debug("%s: PMIC %d register write failed\n", __func__,
- MAX77686_REG_PMIC_BUCK1OUT);
- return -1;
- }
-
- if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
- MAX77686_BUCK1CTRL_EN))
- return -1;
-
- /* VDD_ARM */
- if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
- MAX77686_BUCK2DVS1_1_3V)) {
- debug("%s: PMIC %d register write failed\n", __func__,
- MAX77686_REG_PMIC_BUCK2DVS1);
- return -1;
- }
-
- if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
- MAX77686_BUCK2CTRL_ON))
- return -1;
-
- /* VDD_INT */
- if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
- MAX77686_BUCK3DVS1_1_0125V)) {
- debug("%s: PMIC %d register write failed\n", __func__,
- MAX77686_REG_PMIC_BUCK3DVS1);
- return -1;
- }
-
- if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
- MAX77686_BUCK3CTRL_ON))
- return -1;
-
- /* VDD_G3D */
- if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
- MAX77686_BUCK4DVS1_1_2V)) {
- debug("%s: PMIC %d register write failed\n", __func__,
- MAX77686_REG_PMIC_BUCK4DVS1);
- return -1;
- }
-
- if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
- MAX77686_BUCK3CTRL_ON))
- return -1;
-
- /* VDD_LDO2 */
- if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
- MAX77686_LD02CTRL1_1_5V | EN_LDO))
- return -1;
-
- /* VDD_LDO3 */
- if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
- MAX77686_LD03CTRL1_1_8V | EN_LDO))
- return -1;
-
- /* VDD_LDO5 */
- if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
- MAX77686_LD05CTRL1_1_8V | EN_LDO))
- return -1;
-
- /* VDD_LDO10 */
- if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
- MAX77686_LD10CTRL1_1_8V | EN_LDO))
- return -1;
-
- return 0;
-}
-#endif
-
int power_init_board(void)
{
- int ret = 0;
-
set_ps_hold_ctrl();
-#ifdef CONFIG_POWER_MAX77686
- ret = max77686_init();
-#endif
-
- return ret;
+ return exynos_power_init();
}
#endif
#ifdef CONFIG_OF_CONTROL
+#ifdef CONFIG_SMC911X
static int decode_sromc(const void *blob, struct fdt_sromc *config)
{
int err;
@@ -312,6 +209,7 @@ static int decode_sromc(const void *blob, struct fdt_sromc *config)
}
return 0;
}
+#endif
int board_eth_init(bd_t *bis)
{
@@ -369,15 +267,35 @@ int board_mmc_init(bd_t *bis)
{
int ret;
+#ifdef CONFIG_SDHCI
+ /* mmc initializattion for available channels */
+ ret = exynos_mmc_init(gd->fdt_blob);
+ if (ret)
+ debug("mmc init failed\n");
+#endif
+#ifdef CONFIG_DWMMC
/* dwmmc initializattion for available channels */
ret = exynos_dwmmc_init(gd->fdt_blob);
if (ret)
debug("dwmmc init failed\n");
+#endif
return ret;
}
#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ const char *board_name;
+
+ board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
+ printf("Board: %s\n", board_name ? board_name : "unknown");
+
+ return 0;
+}
#endif
+#endif /* CONFIG_OF_CONTROL */
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
@@ -409,3 +327,21 @@ int arch_early_init_r(void)
return 0;
}
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ set_board_info();
+#endif
+#ifdef CONFIG_LCD_MENU
+ keys_init();
+ check_boot_mode();
+#endif
+#ifdef CONFIG_CMD_BMP
+ if (panel_info.logo_on)
+ draw_logo();
+#endif
+ return 0;
+}
+#endif
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index 15f77cacbd..d502f02d3d 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -11,129 +11,35 @@
#include <asm/arch/mmc.h>
#include <asm/arch/periph.h>
#include <asm/arch/pinmux.h>
+#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
-struct exynos4_gpio_part1 *gpio1;
-struct exynos4_gpio_part2 *gpio2;
-int board_init(void)
+u32 get_board_rev(void)
{
- gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
- gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
-
- gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
}
-static int board_uart_init(void)
+int exynos_init(void)
{
- int err;
-
- err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
- if (err) {
- debug("UART0 not configured\n");
- return err;
- }
-
- err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
- if (err) {
- debug("UART1 not configured\n");
- return err;
- }
-
- err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
- if (err) {
- debug("UART2 not configured\n");
- return err;
- }
-
- err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
- if (err) {
- debug("UART3 not configured\n");
- return err;
- }
-
return 0;
}
+int board_usb_init(int index, enum usb_init_type init)
+{
+ return 0;
+}
+
+#ifdef CONFIG_USB_CABLE_CHECK
+int usb_cable_connected(void)
+{
+ return 0;
+}
+#endif
+
#ifdef CONFIG_BOARD_EARLY_INIT_F
-int board_early_init_f(void)
+int exynos_early_init_f(void)
{
- int err;
- err = board_uart_init();
- if (err) {
- debug("UART init failed\n");
- return err;
- }
- return err;
-}
-#endif
-
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
- + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
- + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
- + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
-
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
- PHYS_SDRAM_1_SIZE);
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
- PHYS_SDRAM_2_SIZE);
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
- PHYS_SDRAM_3_SIZE);
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
- PHYS_SDRAM_4_SIZE);
-}
-
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
- printf("\nBoard: ORIGEN\n");
return 0;
}
#endif
-
-#ifdef CONFIG_GENERIC_MMC
-int board_mmc_init(bd_t *bis)
-{
- int i, err;
-
- /*
- * MMC2 SD card GPIO:
- *
- * GPK2[0] SD_2_CLK(2)
- * GPK2[1] SD_2_CMD(2)
- * GPK2[2] SD_2_CDn
- * GPK2[3:6] SD_2_DATA[0:3](2)
- */
- for (i = 0; i < 7; i++) {
- /* GPK2[0:6] special function 2 */
- s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2));
-
- /* GPK2[0:6] drv 4x */
- s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
-
- /* GPK2[0:1] pull disable */
- if (i == 0 || i == 1) {
- s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
- continue;
- }
-
- /* GPK2[2:6] pull up */
- s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP);
- }
-
- err = s5p_mmc_init(2, 4);
- return err;
-}
-#endif
diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c
index 5fb8664936..b22fba502d 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -45,21 +45,6 @@ int exynos_init(void)
return 0;
}
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
- const char *board_name;
-
- board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- if (board_name == NULL)
- printf("\nUnknown Board\n");
- else
- printf("\nBoard: %s\n", board_name);
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_LCD
void exynos_cfg_lcd_gpio(void)
{
diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
index a69f73d5e8..28a6d9e718 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -147,6 +147,131 @@ void board_i2c_init(const void *blob)
}
}
+#if defined(CONFIG_POWER)
+#ifdef CONFIG_POWER_MAX77686
+static int pmic_reg_update(struct pmic *p, int reg, uint regval)
+{
+ u32 val;
+ int ret = 0;
+
+ ret = pmic_reg_read(p, reg, &val);
+ if (ret) {
+ debug("%s: PMIC %d register read failed\n", __func__, reg);
+ return -1;
+ }
+ val |= regval;
+ ret = pmic_reg_write(p, reg, val);
+ if (ret) {
+ debug("%s: PMIC %d register write failed\n", __func__, reg);
+ return -1;
+ }
+ return 0;
+}
+
+static int max77686_init(void)
+{
+ struct pmic *p;
+
+ if (pmic_init(I2C_PMIC))
+ return -1;
+
+ p = pmic_get("MAX77686_PMIC");
+ if (!p)
+ return -ENODEV;
+
+ if (pmic_probe(p))
+ return -1;
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
+ return -1;
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
+ MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
+ return -1;
+
+ /* VDD_MIF */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
+ MAX77686_BUCK1OUT_1V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK1OUT);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
+ MAX77686_BUCK1CTRL_EN))
+ return -1;
+
+ /* VDD_ARM */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
+ MAX77686_BUCK2DVS1_1_3V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK2DVS1);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
+ MAX77686_BUCK2CTRL_ON))
+ return -1;
+
+ /* VDD_INT */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
+ MAX77686_BUCK3DVS1_1_0125V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK3DVS1);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
+ MAX77686_BUCK3CTRL_ON))
+ return -1;
+
+ /* VDD_G3D */
+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
+ MAX77686_BUCK4DVS1_1_2V)) {
+ debug("%s: PMIC %d register write failed\n", __func__,
+ MAX77686_REG_PMIC_BUCK4DVS1);
+ return -1;
+ }
+
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
+ MAX77686_BUCK3CTRL_ON))
+ return -1;
+
+ /* VDD_LDO2 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
+ MAX77686_LD02CTRL1_1_5V | EN_LDO))
+ return -1;
+
+ /* VDD_LDO3 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
+ MAX77686_LD03CTRL1_1_8V | EN_LDO))
+ return -1;
+
+ /* VDD_LDO5 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
+ MAX77686_LD05CTRL1_1_8V | EN_LDO))
+ return -1;
+
+ /* VDD_LDO10 */
+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
+ MAX77686_LD10CTRL1_1_8V | EN_LDO))
+ return -1;
+
+ return 0;
+}
+#endif /* CONFIG_POWER_MAX77686 */
+
+int exynos_power_init(void)
+{
+ int ret = 0;
+
+#ifdef CONFIG_POWER_MAX77686
+ ret = max77686_init();
+#endif
+ return ret;
+}
+#endif /* CONFIG_POWER */
+
#ifdef CONFIG_LCD
void exynos_cfg_lcd_gpio(void)
{
diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c
index 3ad2ad0e56..e4606ecd2a 100644
--- a/board/samsung/smdk5420/smdk5420.c
+++ b/board/samsung/smdk5420/smdk5420.c
@@ -142,18 +142,3 @@ int board_get_revision(void)
{
return 0;
}
-
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
- const char *board_name;
-
- board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- if (board_name == NULL)
- printf("\nUnknown Board\n");
- else
- printf("\nBoard: %s\n", board_name);
-
- return 0;
-}
-#endif
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index b72550538a..7c79e7b73a 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -12,23 +12,20 @@
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/gpio.h>
-#include <asm/arch/mmc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/clock.h>
-#include <asm/arch/clk.h>
#include <asm/arch/mipi_dsim.h>
#include <asm/arch/watchdog.h>
#include <asm/arch/power.h>
#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <power/max8997_pmic.h>
-#include <libtizen.h>
#include <power/max8997_muic.h>
#include <power/battery.h>
#include <power/max17042_fg.h>
+#include <libtizen.h>
#include <usb.h>
#include <usb_mass_storage.h>
-#include <samsung/misc.h>
#include "setup.h"
@@ -46,10 +43,8 @@ u32 get_board_rev(void)
static void check_hw_revision(void);
struct s3c_plat_otg_data s5pc210_otg_data;
-int board_init(void)
+int exynos_init(void)
{
- gd->bd->bi_boot_params = CONFIG_SYS_SPL_ARGS_ADDR;
-
check_hw_revision();
printf("HW Revision:\t0x%x\n", board_rev);
@@ -281,7 +276,7 @@ static int pmic_init_max8997(void)
return 0;
}
-int power_init_board(void)
+int exynos_power_init(void)
{
int chrg, ret;
struct power_battery *pb;
@@ -350,28 +345,6 @@ int power_init_board(void)
return 0;
}
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
-
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-}
-
static unsigned int get_hw_revision(void)
{
struct exynos4_gpio_part1 *gpio =
@@ -404,55 +377,6 @@ static void check_hw_revision(void)
board_rev |= hwrev;
}
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
- puts("Board:\tTRATS\n");
- return 0;
-}
-#endif
-
-#ifdef CONFIG_GENERIC_MMC
-int board_mmc_init(bd_t *bis)
-{
- struct exynos4_gpio_part2 *gpio =
- (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int err;
-
- /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
- s5p_gpio_direction_output(&gpio->k0, 2, 1);
- s5p_gpio_set_pull(&gpio->k0, 2, GPIO_PULL_NONE);
-
- /*
- * MMC device init
- * mmc0 : eMMC (8-bit buswidth)
- * mmc2 : SD card (4-bit buswidth)
- */
- err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
- if (err)
- debug("SDMMC0 not configured\n");
- else
- err = s5p_mmc_init(0, 8);
-
- /* T-flash detect */
- s5p_gpio_cfg_pin(&gpio->x3, 4, 0xf);
- s5p_gpio_set_pull(&gpio->x3, 4, GPIO_PULL_UP);
-
- /*
- * Check the T-flash detect pin
- * GPX3[4] T-flash detect pin
- */
- if (!s5p_gpio_get_value(&gpio->x3, 4)) {
- err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
- if (err)
- debug("SDMMC2 not configured\n");
- else
- err = s5p_mmc_init(2, 4);
- }
-
- return err;
-}
-#endif
#ifdef CONFIG_USB_GADGET
static int s5pc210_phy_control(int on)
@@ -599,38 +523,22 @@ static void board_power_init(void)
writel(0, (unsigned int)&pwr->arm_core1_configuration);
}
-static void board_uart_init(void)
+static void exynos_uart_init(void)
{
- struct exynos4_gpio_part1 *gpio1 =
- (struct exynos4_gpio_part1 *)samsung_get_base_gpio_part1();
struct exynos4_gpio_part2 *gpio2 =
(struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
- int i;
-
- /*
- * UART2 GPIOs
- * GPA1CON[0] = UART_2_RXD(2)
- * GPA1CON[1] = UART_2_TXD(2)
- * GPA1CON[2] = I2C_3_SDA (3)
- * GPA1CON[3] = I2C_3_SCL (3)
- */
-
- for (i = 0; i < 4; i++) {
- s5p_gpio_set_pull(&gpio1->a1, i, GPIO_PULL_NONE);
- s5p_gpio_cfg_pin(&gpio1->a1, i, GPIO_FUNC((i > 1) ? 0x3 : 0x2));
- }
/* UART_SEL GPY4[7] (part2) at EXYNOS4 */
s5p_gpio_set_pull(&gpio2->y4, 7, GPIO_PULL_UP);
s5p_gpio_direction_output(&gpio2->y4, 7, 1);
}
-int board_early_init_f(void)
+int exynos_early_init_f(void)
{
wdt_stop();
pmic_reset();
board_clock_init();
- board_uart_init();
+ exynos_uart_init();
board_power_init();
return 0;
@@ -648,7 +556,7 @@ void exynos_reset_lcd(void)
s5p_gpio_direction_output(&gpio2->y4, 5, 1);
}
-static int lcd_power(void)
+int lcd_power(void)
{
int ret = 0;
struct pmic *p = pmic_get("MAX8997_PMIC");
@@ -671,46 +579,7 @@ static int lcd_power(void)
return 0;
}
-static struct mipi_dsim_config dsim_config = {
- .e_interface = DSIM_VIDEO,
- .e_virtual_ch = DSIM_VIRTUAL_CH_0,
- .e_pixel_format = DSIM_24BPP_888,
- .e_burst_mode = DSIM_BURST_SYNC_EVENT,
- .e_no_data_lane = DSIM_DATA_LANE_4,
- .e_byte_clk = DSIM_PLL_OUT_DIV8,
- .hfp = 1,
-
- .p = 3,
- .m = 120,
- .s = 1,
-
- /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
- .pll_stable_time = 500,
-
- /* escape clk : 10MHz */
- .esc_clk = 20 * 1000000,
-
- /* stop state holding counter after bta change count 0 ~ 0xfff */
- .stop_holding_cnt = 0x7ff,
- /* bta timeout 0 ~ 0xff */
- .bta_timeout = 0xff,
- /* lp rx timeout 0 ~ 0xffff */
- .rx_timeout = 0xffff,
-};
-
-static struct exynos_platform_mipi_dsim s6e8ax0_platform_data = {
- .lcd_panel_info = NULL,
- .dsim_config = &dsim_config,
-};
-
-static struct mipi_dsim_lcd_device mipi_lcd_device = {
- .name = "s6e8ax0",
- .id = -1,
- .bus_id = 0,
- .platform_data = (void *)&s6e8ax0_platform_data,
-};
-
-static int mipi_power(void)
+int mipi_power(void)
{
int ret = 0;
struct pmic *p = pmic_get("MAX8997_PMIC");
@@ -733,75 +602,13 @@ static int mipi_power(void)
return 0;
}
-vidinfo_t panel_info = {
- .vl_freq = 60,
- .vl_col = 720,
- .vl_row = 1280,
- .vl_width = 720,
- .vl_height = 1280,
- .vl_clkp = CONFIG_SYS_HIGH,
- .vl_hsp = CONFIG_SYS_LOW,
- .vl_vsp = CONFIG_SYS_LOW,
- .vl_dp = CONFIG_SYS_LOW,
- .vl_bpix = 4, /* Bits per pixel, 2^4 = 16 */
-
- /* s6e8ax0 Panel infomation */
- .vl_hspw = 5,
- .vl_hbpd = 10,
- .vl_hfpd = 10,
-
- .vl_vspw = 2,
- .vl_vbpd = 1,
- .vl_vfpd = 13,
- .vl_cmd_allow_len = 0xf,
-
- .win_id = 3,
- .dual_lcd_enabled = 0,
-
- .init_delay = 0,
- .power_on_delay = 0,
- .reset_delay = 0,
- .interface_mode = FIMD_RGB_INTERFACE,
- .mipi_enabled = 1,
-};
-
-void init_panel_info(vidinfo_t *vid)
+void exynos_lcd_misc_init(vidinfo_t *vid)
{
- vid->logo_on = 1,
- vid->resolution = HD_RESOLUTION,
- vid->rgb_mode = MODE_RGB_P,
-
#ifdef CONFIG_TIZEN
get_tizen_logo_info(vid);
#endif
- mipi_lcd_device.reverse_panel = 1;
-
- strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
- s6e8ax0_platform_data.lcd_power = lcd_power;
- s6e8ax0_platform_data.mipi_power = mipi_power;
- s6e8ax0_platform_data.phy_enable = set_mipi_phy_ctrl;
- s6e8ax0_platform_data.lcd_panel_info = (void *)vid;
- exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device);
+#ifdef CONFIG_S6E8AX0
s6e8ax0_init();
- exynos_set_dsim_platform_data(&s6e8ax0_platform_data);
-
setenv("lcdinfo", "lcd=s6e8ax0");
+#endif
}
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- set_board_info();
-#endif
-#ifdef CONFIG_LCD_MENU
- keys_init();
- check_boot_mode();
-#endif
-#ifdef CONFIG_CMD_BMP
- if (panel_info.logo_on)
- draw_logo();
-#endif
- return 0;
-}
-#endif
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index c17c24d60a..2a6c9f9170 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -8,15 +8,9 @@
#include <common.h>
#include <lcd.h>
-#include <asm/io.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/mmc.h>
-#include <asm/arch/power.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/mipi_dsim.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/power.h>
+#include <asm/arch/mipi_dsim.h>
#include <power/pmic.h>
#include <power/max77686_pmic.h>
#include <power/battery.h>
@@ -28,7 +22,6 @@
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb_mass_storage.h>
-#include <samsung/misc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -69,16 +62,6 @@ static void check_hw_revision(void)
board_rev = modelrev << 8;
}
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
- puts("Board:\tTRATS2\n");
- printf("HW Revision:\t0x%04x\n", board_rev);
-
- return 0;
-}
-#endif
-
u32 get_board_rev(void)
{
return board_rev;
@@ -156,33 +139,24 @@ int get_soft_i2c_sda_pin(void)
}
#endif
-int board_early_init_f(void)
+int exynos_early_init_f(void)
{
- check_hw_revision();
board_external_gpio_init();
- gd->flags |= GD_FLG_DISABLE_CONSOLE;
-
return 0;
}
static int pmic_init_max77686(void);
-int board_init(void)
+int exynos_init(void)
{
- struct exynos4_power *pwr =
- (struct exynos4_power *)samsung_get_base_power();
-
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- /* workaround: clear INFORM4..5 */
- writel(0, (unsigned int)&pwr->inform4);
- writel(0, (unsigned int)&pwr->inform5);
+ check_hw_revision();
+ printf("HW Revision:\t0x%04x\n", board_rev);
return 0;
}
-int power_init_board(void)
+int exynos_power_init(void)
{
int chrg;
struct power_battery *pb;
@@ -248,90 +222,6 @@ int power_init_board(void)
return 0;
}
-int dram_init(void)
-{
- u32 size_mb;
-
- size_mb = (get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)) >> 20;
-
- gd->ram_size = size_mb << 20;
-
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
- gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
- gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
- gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
- gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
-}
-
-int board_mmc_init(bd_t *bis)
-{
- int err0, err2 = 0;
-
- gpio2 = (struct exynos4x12_gpio_part2 *)samsung_get_base_gpio_part2();
-
- /* eMMC_EN: SD_0_CDn: GPK0[2] Output High */
- s5p_gpio_direction_output(&gpio2->k0, 2, 1);
- s5p_gpio_set_pull(&gpio2->k0, 2, GPIO_PULL_NONE);
-
- /*
- * eMMC GPIO:
- * SDR 8-bit@48MHz at MMC0
- * GPK0[0] SD_0_CLK(2)
- * GPK0[1] SD_0_CMD(2)
- * GPK0[2] SD_0_CDn -> Not used
- * GPK0[3:6] SD_0_DATA[0:3](2)
- * GPK1[3:6] SD_0_DATA[0:3](3)
- *
- * DDR 4-bit@26MHz at MMC4
- * GPK0[0] SD_4_CLK(3)
- * GPK0[1] SD_4_CMD(3)
- * GPK0[2] SD_4_CDn -> Not used
- * GPK0[3:6] SD_4_DATA[0:3](3)
- * GPK1[3:6] SD_4_DATA[4:7](4)
- */
-
- err0 = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
-
- /*
- * MMC device init
- * mmc0 : eMMC (8-bit buswidth)
- * mmc2 : SD card (4-bit buswidth)
- */
- if (err0)
- debug("SDMMC0 not configured\n");
- else
- err0 = s5p_mmc_init(0, 8);
-
- /* T-flash detect */
- s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
- s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
-
- /*
- * Check the T-flash detect pin
- * GPX3[4] T-flash detect pin
- */
- if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
- err2 = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
- if (err2)
- debug("SDMMC2 not configured\n");
- else
- err2 = s5p_mmc_init(2, 4);
- }
-
- return err0 & err2;
-}
-
#ifdef CONFIG_USB_GADGET
static int s5pc210_phy_control(int on)
{
@@ -479,46 +369,7 @@ static int pmic_init_max77686(void)
*/
#ifdef CONFIG_LCD
-static struct mipi_dsim_config dsim_config = {
- .e_interface = DSIM_VIDEO,
- .e_virtual_ch = DSIM_VIRTUAL_CH_0,
- .e_pixel_format = DSIM_24BPP_888,
- .e_burst_mode = DSIM_BURST_SYNC_EVENT,
- .e_no_data_lane = DSIM_DATA_LANE_4,
- .e_byte_clk = DSIM_PLL_OUT_DIV8,
- .hfp = 1,
-
- .p = 3,
- .m = 120,
- .s = 1,
-
- /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
- .pll_stable_time = 500,
-
- /* escape clk : 10MHz */
- .esc_clk = 20 * 1000000,
-
- /* stop state holding counter after bta change count 0 ~ 0xfff */
- .stop_holding_cnt = 0x7ff,
- /* bta timeout 0 ~ 0xff */
- .bta_timeout = 0xff,
- /* lp rx timeout 0 ~ 0xffff */
- .rx_timeout = 0xffff,
-};
-
-static struct exynos_platform_mipi_dsim dsim_platform_data = {
- .lcd_panel_info = NULL,
- .dsim_config = &dsim_config,
-};
-
-static struct mipi_dsim_lcd_device mipi_lcd_device = {
- .name = "s6e8ax0",
- .id = -1,
- .bus_id = 0,
- .platform_data = (void *)&dsim_platform_data,
-};
-
-static int mipi_power(void)
+int mipi_power(void)
{
struct pmic *p = pmic_get("MAX77686_PMIC");
@@ -556,77 +407,13 @@ void exynos_reset_lcd(void)
s5p_gpio_set_value(&gpio1->f2, 1, 1);
}
-vidinfo_t panel_info = {
- .vl_freq = 60,
- .vl_col = 720,
- .vl_row = 1280,
- .vl_width = 720,
- .vl_height = 1280,
- .vl_clkp = CONFIG_SYS_HIGH,
- .vl_hsp = CONFIG_SYS_LOW,
- .vl_vsp = CONFIG_SYS_LOW,
- .vl_dp = CONFIG_SYS_LOW,
- .vl_bpix = 4, /* Bits per pixel, 2^4 = 16 */
-
- /* s6e8ax0 Panel infomation */
- .vl_hspw = 5,
- .vl_hbpd = 10,
- .vl_hfpd = 10,
-
- .vl_vspw = 2,
- .vl_vbpd = 1,
- .vl_vfpd = 13,
- .vl_cmd_allow_len = 0xf,
- .mipi_enabled = 1,
-
- .dual_lcd_enabled = 0,
-
- .init_delay = 0,
- .power_on_delay = 25,
- .reset_delay = 0,
- .interface_mode = FIMD_RGB_INTERFACE,
-};
-
-void init_panel_info(vidinfo_t *vid)
+void exynos_lcd_misc_init(vidinfo_t *vid)
{
- vid->logo_on = 1;
- vid->resolution = HD_RESOLUTION;
- vid->rgb_mode = MODE_RGB_P;
-
- vid->power_on_delay = 30;
-
- mipi_lcd_device.reverse_panel = 1;
-
#ifdef CONFIG_TIZEN
get_tizen_logo_info(vid);
#endif
-
- strcpy(dsim_platform_data.lcd_panel_name, mipi_lcd_device.name);
- dsim_platform_data.mipi_power = mipi_power;
- dsim_platform_data.phy_enable = set_mipi_phy_ctrl;
- dsim_platform_data.lcd_panel_info = (void *)vid;
- exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device);
-
+#ifdef CONFIG_S6E8AX0
s6e8ax0_init();
-
- exynos_set_dsim_platform_data(&dsim_platform_data);
+#endif
}
#endif /* LCD */
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- set_board_info();
-#endif
-#ifdef CONFIG_LCD_MENU
- keys_init();
- check_boot_mode();
-#endif
-#ifdef CONFIG_CMD_BMP
- if (panel_info.logo_on)
- draw_logo();
-#endif
- return 0;
-}
-#endif
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index 96da7e0861..f9d71b617d 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -13,16 +13,17 @@
#include <asm/gpio.h>
#include <asm/arch/adc.h>
#include <asm/arch/gpio.h>
-#include <asm/arch/mmc.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/watchdog.h>
-#include <libtizen.h>
#include <ld9040.h>
#include <power/pmic.h>
+#include <usb.h>
#include <usb/s3c_udc.h>
#include <asm/arch/cpu.h>
#include <power/max8998_pmic.h>
+#include <libtizen.h>
#include <samsung/misc.h>
+#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -42,7 +43,7 @@ static int get_hwrev(void)
static void init_pmic_lcd(void);
-int power_init_board(void)
+int exynos_power_init(void)
{
int ret;
@@ -59,22 +60,6 @@ int power_init_board(void)
return 0;
}
-int dram_init(void)
-{
- gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
- get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
-
- return 0;
-}
-
-void dram_init_banksize(void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
- gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
-}
-
static unsigned short get_adc_value(int channel)
{
struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
@@ -159,71 +144,6 @@ static void check_hw_revision(void)
board_rev |= hwrev;
}
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
- puts("Board:\tUniversal C210\n");
- return 0;
-}
-#endif
-
-#ifdef CONFIG_GENERIC_MMC
-int board_mmc_init(bd_t *bis)
-{
- int err;
-
- switch (get_hwrev()) {
- case 0:
- /*
- * Set the low to enable LDO_EN
- * But when you use the test board for eMMC booting
- * you should set it HIGH since it removes the inverter
- */
- /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
- s5p_gpio_direction_output(&gpio1->e3, 6, 0);
- break;
- default:
- /*
- * Default reset state is High and there's no inverter
- * But set it as HIGH to ensure
- */
- /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
- s5p_gpio_direction_output(&gpio1->e1, 3, 1);
- break;
- }
-
- /*
- * MMC device init
- * mmc0 : eMMC (8-bit buswidth)
- * mmc2 : SD card (4-bit buswidth)
- */
- err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
- if (err)
- debug("SDMMC0 not configured\n");
- else
- err = s5p_mmc_init(0, 8);
-
- /* T-flash detect */
- s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
- s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
-
- /*
- * Check the T-flash detect pin
- * GPX3[4] T-flash detect pin
- */
- if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
- err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
- if (err)
- debug("SDMMC2 not configured\n");
- else
- err = s5p_mmc_init(2, 4);
- }
-
- return err;
-
-}
-#endif
-
#ifdef CONFIG_USB_GADGET
static int s5pc210_phy_control(int on)
{
@@ -271,7 +191,20 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
};
#endif
-int board_early_init_f(void)
+int board_usb_init(int index, enum usb_init_type init)
+{
+ debug("USB_udc_probe\n");
+ return s3c_udc_probe(&s5pc210_otg_data);
+}
+
+#ifdef CONFIG_USB_CABLE_CHECK
+int usb_cable_connected(void)
+{
+ return 0;
+}
+#endif
+
+int exynos_early_init_f(void)
{
wdt_stop();
@@ -412,6 +345,11 @@ void exynos_cfg_lcd_gpio(void)
spi_init();
}
+int mipi_power(void)
+{
+ return 0;
+}
+
void exynos_reset_lcd(void)
{
s5p_gpio_set_value(&gpio2->y4, 5, 1);
@@ -436,39 +374,6 @@ void exynos_lcd_power_on(void)
pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
}
-vidinfo_t panel_info = {
- .vl_freq = 60,
- .vl_col = 480,
- .vl_row = 800,
- .vl_width = 480,
- .vl_height = 800,
- .vl_clkp = CONFIG_SYS_HIGH,
- .vl_hsp = CONFIG_SYS_HIGH,
- .vl_vsp = CONFIG_SYS_HIGH,
- .vl_dp = CONFIG_SYS_HIGH,
-
- .vl_bpix = 4, /* Bits per pixel */
-
- /* LD9040 LCD Panel */
- .vl_hspw = 2,
- .vl_hbpd = 16,
- .vl_hfpd = 16,
-
- .vl_vspw = 2,
- .vl_vbpd = 8,
- .vl_vfpd = 8,
- .vl_cmd_allow_len = 0xf,
-
- .win_id = 0,
- .dual_lcd_enabled = 0,
-
- .init_delay = 0,
- .power_on_delay = 10000,
- .reset_delay = 10000,
- .interface_mode = FIMD_RGB_INTERFACE,
- .mipi_enabled = 0,
-};
-
void exynos_cfg_ldo(void)
{
ld9040_cfg_ldo();
@@ -479,30 +384,32 @@ void exynos_enable_ldo(unsigned int onoff)
ld9040_enable_ldo(onoff);
}
-void init_panel_info(vidinfo_t *vid)
-{
- vid->logo_on = 1;
- vid->resolution = HD_RESOLUTION;
- vid->rgb_mode = MODE_RGB_P;
-
-#ifdef CONFIG_TIZEN
- get_tizen_logo_info(vid);
-#endif
-
- /* for LD9040. */
- vid->pclk_name = 1; /* MPLL */
- vid->sclk_div = 1;
-
- setenv("lcdinfo", "lcd=ld9040");
-}
-
-int board_init(void)
+int exynos_init(void)
{
gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ switch (get_hwrev()) {
+ case 0:
+ /*
+ * Set the low to enable LDO_EN
+ * But when you use the test board for eMMC booting
+ * you should set it HIGH since it removes the inverter
+ */
+ /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
+ s5p_gpio_direction_output(&gpio1->e3, 6, 0);
+ break;
+ default:
+ /*
+ * Default reset state is High and there's no inverter
+ * But set it as HIGH to ensure
+ */
+ /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
+ s5p_gpio_direction_output(&gpio1->e1, 3, 1);
+ break;
+ }
#ifdef CONFIG_SOFT_SPI
soft_spi_init();
@@ -513,20 +420,15 @@ int board_init(void)
return 0;
}
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
+void exynos_lcd_misc_init(vidinfo_t *vid)
{
-#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- set_board_info();
+#ifdef CONFIG_TIZEN
+ get_tizen_logo_info(vid);
#endif
-#ifdef CONFIG_LCD_MENU
- keys_init();
- check_boot_mode();
-#endif
-#ifdef CONFIG_CMD_BMP
- if (panel_info.logo_on)
- draw_logo();
-#endif
- return 0;
+
+ /* for LD9040. */
+ vid->pclk_name = 1; /* MPLL */
+ vid->sclk_div = 1;
+
+ setenv("lcdinfo", "lcd=ld9040");
}
-#endif
diff --git a/doc/device-tree-bindings/video/exynos_mipi_dsi.txt b/doc/device-tree-bindings/video/exynos_mipi_dsi.txt
new file mode 100644
index 0000000000..4938ea01ec
--- /dev/null
+++ b/doc/device-tree-bindings/video/exynos_mipi_dsi.txt
@@ -0,0 +1,82 @@
+Exynos MIPI-DSIM Controller
+=========================
+
+Required properties:
+SOC specific:
+ compatible: should be "samsung,exynos-mipi-dsi"
+ reg: Base address of MIPI-DSIM IP.
+
+Board specific:
+ samsung,dsim-config-e-interface: interface to be used (RGB interface
+ for main display or CPU interface for main or sub display).
+ samsung,dsim-config-e-virtual-ch: virtual channel number that main
+ or sub display uses.
+ samsung,dsim-config-e-pixel-format: pixel stream format for main
+ or sub display.
+ samsung,dsim-config-e-burst-mode: selects Burst mode in Video mode.
+ in Non-burst mode, RGB data area is filled with RGB data and
+ NULL packets, according to input bandwidth of RGB interface.
+ samsung,dsim-config-e-no-data-lane: data lane count used by Master.
+ samsung,dsim-config-e-byte-clk: select byte clock source.
+ It must be DSIM_PLL_OUT_DIV8.
+ DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
+ samsung,dsim-config-hfp: HFP disable mode.
+ If set, DSI master ignores HFP area in VIDEO mode.
+ In command mode, this variable is ignored.
+ samsung,dsim-config-p: P value for PMS setting.
+ samsung,dsim-config-m: M value for PMS setting.
+ samsung,dsim-config-s: S value for PMS setting.
+ samsung,dsim-config-pll-stable-time: the PLL Timer for stability
+ of the ganerated clock.
+ samsung,dsim-config-esc-clk: escape clock frequency for getting
+ the escape clock prescaler value.
+ samsung,dsim-config-stop-holding-cnt: the interval value between
+ transmitting read packet (or write "set_tear_on" command)
+ and BTA request. After transmitting read packet or write
+ "set_tear_on" command, BTA requests to D-PHY automatically.
+ This counter value specifies the interval between them.
+ samsung,dsim-config-bta-timeout: the timer for BTA. This register
+ specifies time out from BTA request to change the direction
+ with respect to Tx escape clock.
+ samsung,dsim-config-rx-timeout: the timer for LP Rx mode timeout.
+ this register specifies time out on how long RxValid deasserts,
+ after RxLpdt asserts with respect to Tx escape clock.
+ - RxValid specifies Rx data valid indicator.
+ - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode
+ - RxValid and RxLpdt specifies signal from D-PHY.
+ samsung,dsim-device-name: name of the device.
+ samsung,dsim-device-id: unique device id.
+ samsung,dsim-device-bus_id: bus id for identifing connected bus
+ and this bus id should be same as id of mipi_dsim_device.
+
+Optional properties:
+ samsung,dsim-device-reverse-panel: reverse panel.
+
+Example:
+ mipidsi@11c80000 {
+ compatible = "samsung,exynos-mipi-dsi";
+ reg = <0x11c80000 0x5c>;
+
+ samsung,dsim-config-e-interface = <1>;
+ samsung,dsim-config-e-virtual-ch = <0>;
+ samsung,dsim-config-e-pixel-format = <7>;
+ samsung,dsim-config-e-burst-mode = <1>;
+ samsung,dsim-config-e-no-data-lane = <3>;
+ samsung,dsim-config-e-byte-clk = <0>;
+ samsung,dsim-config-hfp = <1>;
+
+ samsung,dsim-config-p = <3>;
+ samsung,dsim-config-m = <120>;
+ samsung,dsim-config-s = <1>;
+
+ samsung,dsim-config-pll-stable-time = <500>;
+ samsung,dsim-config-esc-clk = <20000000>;
+ samsung,dsim-config-stop-holding-cnt = <0x7ff>;
+ samsung,dsim-config-bta-timeout = <0xff>;
+ samsung,dsim-config-rx-timeout = <0xffff>;
+
+ samsung,dsim-device-id = <0xffffffff>;
+ samsung,dsim-device-bus-id = <0>;
+
+ samsung,dsim-device-reverse-panel = <1>;
+ };
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 07011e99a8..56e69fd231 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -19,6 +19,7 @@
static bool dfu_reset_request;
static LIST_HEAD(dfu_list);
static int dfu_alt_num;
+static int alt_num_cnt;
bool dfu_reset(void)
{
@@ -377,6 +378,8 @@ void dfu_free_entities(void)
if (t)
free(t);
INIT_LIST_HEAD(&dfu_list);
+
+ alt_num_cnt = 0;
}
int dfu_config_entities(char *env, char *interface, int num)
@@ -394,11 +397,12 @@ int dfu_config_entities(char *env, char *interface, int num)
for (i = 0; i < dfu_alt_num; i++) {
s = strsep(&env, ";");
- ret = dfu_fill_entity(&dfu[i], s, i, interface, num);
+ ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface, num);
if (ret)
return -1;
list_add_tail(&dfu[i].list, &dfu_list);
+ alt_num_cnt++;
}
return 0;
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 40ff8739bf..ccae4ccae1 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -8,8 +8,15 @@
#include <common.h>
#include <malloc.h>
#include <sdhci.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <asm/gpio.h>
#include <asm/arch/mmc.h>
#include <asm/arch/clk.h>
+#include <errno.h>
+#ifdef CONFIG_OF_CONTROL
+#include <asm/arch/pinmux.h>
+#endif
static char *S5P_NAME = "SAMSUNG SDHCI";
static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
@@ -86,3 +93,125 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
return add_sdhci(host, 52000000, 400000);
}
+
+#ifdef CONFIG_OF_CONTROL
+struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
+
+static int do_sdhci_init(struct sdhci_host *host)
+{
+ int dev_id, flag;
+ int err = 0;
+
+ flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE;
+ dev_id = host->index + PERIPH_ID_SDMMC0;
+
+ if (fdt_gpio_isvalid(&host->pwr_gpio)) {
+ gpio_direction_output(host->pwr_gpio.gpio, 1);
+ err = exynos_pinmux_config(dev_id, flag);
+ if (err) {
+ debug("MMC not configured\n");
+ return err;
+ }
+ }
+
+ if (fdt_gpio_isvalid(&host->cd_gpio)) {
+ gpio_direction_output(host->cd_gpio.gpio, 0xf);
+ if (gpio_get_value(host->cd_gpio.gpio))
+ return -ENODEV;
+
+ err = exynos_pinmux_config(dev_id, flag);
+ if (err) {
+ printf("external SD not configured\n");
+ return err;
+ }
+ }
+
+ host->name = S5P_NAME;
+
+ host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
+ SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
+ SDHCI_QUIRK_WAIT_SEND_CMD;
+ host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+ host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
+
+ host->set_control_reg = &s5p_sdhci_set_control_reg;
+ host->set_clock = set_mmc_clk;
+
+ host->host_caps = MMC_MODE_HC;
+
+ return add_sdhci(host, 52000000, 400000);
+}
+
+static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host)
+{
+ int bus_width, dev_id;
+ unsigned int base;
+
+ /* Get device id */
+ dev_id = pinmux_decode_periph_id(blob, node);
+ if (dev_id < PERIPH_ID_SDMMC0 && dev_id > PERIPH_ID_SDMMC3) {
+ debug("MMC: Can't get device id\n");
+ return -1;
+ }
+ host->index = dev_id - PERIPH_ID_SDMMC0;
+
+ /* Get bus width */
+ bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0);
+ if (bus_width <= 0) {
+ debug("MMC: Can't get bus-width\n");
+ return -1;
+ }
+ host->bus_width = bus_width;
+
+ /* Get the base address from the device node */
+ base = fdtdec_get_addr(blob, node, "reg");
+ if (!base) {
+ debug("MMC: Can't get base address\n");
+ return -1;
+ }
+ host->ioaddr = (void *)base;
+
+ fdtdec_decode_gpio(blob, node, "pwr-gpios", &host->pwr_gpio);
+ fdtdec_decode_gpio(blob, node, "cd-gpios", &host->cd_gpio);
+
+ return 0;
+}
+
+static int process_nodes(const void *blob, int node_list[], int count)
+{
+ struct sdhci_host *host;
+ int i, node;
+
+ debug("%s: count = %d\n", __func__, count);
+
+ /* build sdhci_host[] for each controller */
+ for (i = 0; i < count; i++) {
+ node = node_list[i];
+ if (node <= 0)
+ continue;
+
+ host = &sdhci_host[i];
+
+ if (sdhci_get_config(blob, node, host)) {
+ printf("%s: failed to decode dev %d\n", __func__, i);
+ return -1;
+ }
+ do_sdhci_init(host);
+ }
+ return 0;
+}
+
+int exynos_mmc_init(const void *blob)
+{
+ int count;
+ int node_list[SDHCI_MAX_HOSTS];
+
+ count = fdtdec_find_aliases_for_id(blob, "mmc",
+ COMPAT_SAMSUNG_EXYNOS_MMC, node_list,
+ SDHCI_MAX_HOSTS);
+
+ process_nodes(blob, node_list, count);
+
+ return 1;
+}
+#endif
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 00a0a11ed4..e1e0d802f6 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -104,6 +104,13 @@ void __exynos_backlight_reset(void)
void exynos_backlight_reset(void)
__attribute__((weak, alias("__exynos_backlight_reset")));
+int __exynos_lcd_misc_init(vidinfo_t *vid)
+{
+ return 0;
+}
+int exynos_lcd_misc_init(vidinfo_t *vid)
+ __attribute__((weak, alias("__exynos_lcd_misc_init")));
+
static void lcd_panel_on(vidinfo_t *vid)
{
udelay(vid->init_delay);
@@ -281,10 +288,15 @@ void lcd_ctrl_init(void *lcdbase)
#ifdef CONFIG_OF_CONTROL
if (exynos_fimd_parse_dt(gd->fdt_blob))
debug("Can't get proper panel info\n");
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
+ exynos_init_dsim_platform_data(&panel_info);
+#endif
+ exynos_lcd_misc_init(&panel_info);
#else
/* initialize parameters which is specific to panel. */
init_panel_info(&panel_info);
#endif
+
panel_width = panel_info.vl_width;
panel_height = panel_info.vl_height;
diff --git a/drivers/video/exynos_mipi_dsi.c b/drivers/video/exynos_mipi_dsi.c
index 8bb8feaa9c..7dd4652931 100644
--- a/drivers/video/exynos_mipi_dsi.c
+++ b/drivers/video/exynos_mipi_dsi.c
@@ -9,6 +9,8 @@
#include <common.h>
#include <malloc.h>
+#include <fdtdec.h>
+#include <libfdt.h>
#include <linux/err.h>
#include <asm/arch/dsim.h>
#include <asm/arch/mipi_dsim.h>
@@ -22,7 +24,14 @@
#define master_to_driver(a) (a->dsim_lcd_drv)
#define master_to_device(a) (a->dsim_lcd_dev)
+DECLARE_GLOBAL_DATA_PTR;
+
static struct exynos_platform_mipi_dsim *dsim_pd;
+#ifdef CONFIG_OF_CONTROL
+static struct mipi_dsim_config dsim_config_dt;
+static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
+static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
+#endif
struct mipi_dsim_ddi {
int bus_id;
@@ -238,3 +247,90 @@ void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd)
dsim_pd = pd;
}
+
+#ifdef CONFIG_OF_CONTROL
+int exynos_dsim_config_parse_dt(const void *blob)
+{
+ int node;
+
+ node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_MIPI_DSI);
+ if (node <= 0) {
+ printf("exynos_mipi_dsi: Can't get device node for mipi dsi\n");
+ return -ENODEV;
+ }
+
+ dsim_config_dt.e_interface = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-e-interface", 0);
+
+ dsim_config_dt.e_virtual_ch = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-e-virtual-ch", 0);
+
+ dsim_config_dt.e_pixel_format = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-e-pixel-format", 0);
+
+ dsim_config_dt.e_burst_mode = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-e-burst-mode", 0);
+
+ dsim_config_dt.e_no_data_lane = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-e-no-data-lane", 0);
+
+ dsim_config_dt.e_byte_clk = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-e-byte-clk", 0);
+
+ dsim_config_dt.hfp = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-hfp", 0);
+
+ dsim_config_dt.p = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-p", 0);
+ dsim_config_dt.m = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-m", 0);
+ dsim_config_dt.s = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-s", 0);
+
+ dsim_config_dt.pll_stable_time = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-pll-stable-time", 0);
+
+ dsim_config_dt.esc_clk = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-esc-clk", 0);
+
+ dsim_config_dt.stop_holding_cnt = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-stop-holding-cnt", 0);
+
+ dsim_config_dt.bta_timeout = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-bta-timeout", 0);
+
+ dsim_config_dt.rx_timeout = fdtdec_get_int(blob, node,
+ "samsung,dsim-config-rx-timeout", 0);
+
+ mipi_lcd_device_dt.name = fdtdec_get_config_string(blob,
+ "samsung,dsim-device-name");
+
+ mipi_lcd_device_dt.id = fdtdec_get_int(blob, node,
+ "samsung,dsim-device-id", 0);
+
+ mipi_lcd_device_dt.bus_id = fdtdec_get_int(blob, node,
+ "samsung,dsim-device-bus_id", 0);
+
+ mipi_lcd_device_dt.reverse_panel = fdtdec_get_int(blob, node,
+ "samsung,dsim-device-reverse-panel", 0);
+
+ return 0;
+}
+
+void exynos_init_dsim_platform_data(vidinfo_t *vid)
+{
+ if (exynos_dsim_config_parse_dt(gd->fdt_blob))
+ debug("Can't get proper dsim config.\n");
+
+ strcpy(dsim_platform_data_dt.lcd_panel_name, mipi_lcd_device_dt.name);
+ dsim_platform_data_dt.dsim_config = &dsim_config_dt;
+ dsim_platform_data_dt.mipi_power = mipi_power;
+ dsim_platform_data_dt.phy_enable = set_mipi_phy_ctrl;
+ dsim_platform_data_dt.lcd_panel_info = (void *)vid;
+
+ mipi_lcd_device_dt.platform_data = (void *)&dsim_platform_data_dt;
+ exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device_dt);
+
+ dsim_pd = &dsim_platform_data_dt;
+}
+#endif
diff --git a/include/configs/exynos4-dt.h b/include/configs/exynos4-dt.h
new file mode 100644
index 0000000000..2040bf7784
--- /dev/null
+++ b/include/configs/exynos4-dt.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG EXYNOS5 board.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* High Level Configuration Options */
+#define CONFIG_SAMSUNG /* in a SAMSUNG core */
+#define CONFIG_S5P /* S5P Family */
+#define CONFIG_EXYNOS4 /* which is in a Exynos4 Family */
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_COMMON
+
+/* Enable fdt support */
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
+/* input clock of PLL: EXYNOS4 boards have 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ 24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+#include <linux/sizes.h>
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_S5P_SDHCI
+#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
+#define CONFIG_MMC_DEFAULT_DEV 0
+
+/* PWM */
+#define CONFIG_PWM
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_XIMG
+#undef CONFIG_CMD_CACHE
+#undef CONFIG_CMD_ONENAND
+#undef CONFIG_CMD_MTDPARTS
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+#define CONFIG_CMD_GPT
+#define CONFIG_CMD_PMIC
+#define CONFIG_CMD_SETEXPR
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
+/* EXT4 */
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+
+/* TIZEN THOR downloader support */
+#define CONFIG_CMD_THOR_DOWNLOAD
+#define CONFIG_THOR_FUNCTION
+
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
+#define DFU_DEFAULT_POLL_TIMEOUT 300
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
+#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
+#define CONFIG_G_DNL_MANUFACTURER "Samsung"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_PART
+#define CONFIG_PARTITION_UUIDS
+
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_S3C_UDC_OTG
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_USB_CABLE_CHECK
+
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_GADGET_MASS_STORAGE
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/origen.h b/include/configs/origen.h
index f46b833b53..82583382f7 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -6,115 +6,71 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_ORIGEN_H
+#define __CONFIG_ORIGEN_H
+
+#include <configs/exynos4-dt.h>
+
+#define CONFIG_SYS_PROMPT "ORIGEN # "
+
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-origen
/* High Level Configuration Options */
-#define CONFIG_SAMSUNG 1 /* SAMSUNG core */
-#define CONFIG_S5P 1 /* S5P Family */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
-#include <asm/arch/cpu.h> /* get chip and board defs */
-
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_BOARD_EARLY_INIT_F
-
#define CONFIG_SYS_DCACHE_OFF 1
+/* ORIGEN has 4 bank of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
+
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
+
#define CONFIG_SYS_TEXT_BASE 0x43E00000
-/* input clock of PLL: ORIGEN has 24MHz input clock */
-#define CONFIG_SYS_CLK_FREQ 24000000
-
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-#define CONFIG_CMDLINE_EDITING
-
#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
+
+/* select serial console configuration */
+#define CONFIG_SERIAL2
+#define CONFIG_BAUDRATE 115200
+
+/* Console configuration */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
+
+#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
+
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
+
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
#define S5P_CHECK_LPA 0xABAD0000
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
-
-/* select serial console configuration */
-#define CONFIG_SERIAL2 1 /* use SERIAL 2 */
-#define CONFIG_BAUDRATE 115200
-#define EXYNOS4_DEFAULT_UART_OFFSET 0x020000
-
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-/* SD/MMC configuration */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_SDHCI
-#define CONFIG_S5P_SDHCI
-
-/* PWM */
-#define CONFIG_PWM 1
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* Command definition*/
-#include <config_cmd_default.h>
-
#undef CONFIG_CMD_PING
#define CONFIG_CMD_ELF
#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_FAT
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ZERO_BOOTDELAY_CHECK
/* MMC SPL */
#define CONFIG_SPL
#define COPY_BL2_FNPTR_ADDR 0x02020030
-
#define CONFIG_SPL_TEXT_BASE 0x02021410
#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT "ORIGEN # "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
-#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-
-/* ORIGEN has 4 bank of DRAM */
-#define CONFIG_NR_DRAM_BANKS 4
-#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
-#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
-#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
-
-/* FLASH and environment organization */
-#define CONFIG_SYS_NO_FLASH 1
-#undef CONFIG_CMD_IMLS
#define CONFIG_IDENT_STRING " for ORIGEN"
#define CONFIG_CLK_1000_400_200
@@ -122,13 +78,12 @@
/* MIU (Memory Interleaving Unit) */
#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
-#define CONFIG_ENV_IS_IN_MMC 1
+#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
#define RESERVE_BLOCK_SIZE (512)
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
-#define CONFIG_DOS_PARTITION 1
#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
@@ -140,7 +95,4 @@
#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
-/* Enable devicetree support */
-#define CONFIG_OF_LIBFDT
-
#endif /* __CONFIG_H */
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 67921e900b..2da887109d 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -7,78 +7,56 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_UNIVERSAL_H
+#define __CONFIG_UNIVERSAL_H
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
-#define CONFIG_S5P 1 /* which is in a S5P Family */
-#define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */
-#define CONFIG_UNIVERSAL 1 /* working with Universal */
-#define CONFIG_TIZEN 1 /* TIZEN lib */
+#include <configs/exynos4-dt.h>
-#include <asm/arch/cpu.h> /* get chip and board defs */
+#define CONFIG_SYS_PROMPT "Universal # " /* Monitor Command Prompt */
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-universal_c210
+
+#define CONFIG_TIZEN /* TIZEN lib */
/* Keep L2 Cache Disabled */
#define CONFIG_SYS_L2CACHE_OFF 1
+/* Universal has 2 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_SYS_SDRAM_BASE 0x40000000
-#define CONFIG_SYS_TEXT_BASE 0x44800000
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
-/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
-#define CONFIG_SYS_CLK_FREQ_C210 24000000
-#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
-
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
+#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
-#define CONFIG_SERIAL2 1 /* use SERIAL 2 */
-#define CONFIG_BAUDRATE 115200
+#define CONFIG_SERIAL2
+#define CONFIG_BAUDRATE 115200
-/* MMC */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_SDHCI
-#define CONFIG_S5P_SDHCI
+/* Console configuration */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-/* PWM */
-#define CONFIG_PWM 1
+#define CONFIG_BOOTARGS "Please use defined boot"
+#define CONFIG_BOOTCOMMAND "run mmcboot"
+#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
-/* It should define before config_cmd_default.h */
-#define CONFIG_SYS_NO_FLASH 1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
+ - GENERATED_GBL_DATA_SIZE)
-/* Command definition */
-#include <config_cmd_default.h>
+#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_ONENAND
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_FAT
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
-#define CONFIG_BOOTDELAY 1
-#define CONFIG_ZERO_BOOTDELAY_CHECK
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
+
+#define CONFIG_SYS_TEXT_BASE 0x44800000
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
@@ -106,24 +84,21 @@
",100M(swap)"\
",-(UMS)\0"
-#define CONFIG_BOOTARGS "Please use defined boot"
-#define CONFIG_BOOTCOMMAND "run mmcboot"
-#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
-
#define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7"
#define CONFIG_BOOTBLOCK "10"
#define CONFIG_UBIBLOCK "9"
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
+#define CONFIG_ENV_SIZE 4096
+#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
+
#define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc "
#define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \
"${mtdparts}"
#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
@@ -187,47 +162,10 @@
"mmcrootpart=3\0" \
"opts=always_resume=1"
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT "Universal # "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-
-/* Universal has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS 2
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
-#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
-
-#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
-
-#define CONFIG_SYS_MONITOR_BASE 0x00000000
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-
#define CONFIG_USE_ONENAND_BOARD_INIT
#define CONFIG_SAMSUNG_ONENAND
#define CONFIG_SYS_ONENAND_BASE 0x0C000000
-#define CONFIG_ENV_IS_IN_MMC 1
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_ENV_SIZE 4096
-#define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */
-
-#define CONFIG_DOS_PARTITION 1
-
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_CACHELINE_SIZE 32
-
#include <asm/arch/gpio.h>
/*
* I2C Settings
@@ -235,6 +173,8 @@
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(1, b, 7)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(1, b, 6)
+#define CONFIG_CMD_I2C
+
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
@@ -307,8 +247,10 @@ int universal_spi_read(void);
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_LD9040
-#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
+#define LCD_XRES 480
+#define LCD_YRES 800
+
#endif /* __CONFIG_H */
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 7cea2592ff..84c71ced46 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -7,25 +7,19 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_TRATS_H
+#define __CONFIG_TRATS_H
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_SAMSUNG /* in a SAMSUNG core */
-#define CONFIG_S5P /* which is in a S5P Family */
-#define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */
-#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
-#define CONFIG_TRATS /* working with TRATS */
-#define CONFIG_TIZEN /* TIZEN lib */
+#include <configs/exynos4-dt.h>
-#include <asm/arch/cpu.h> /* get chip and board defs */
+#define CONFIG_SYS_PROMPT "Trats # " /* Monitor Command Prompt */
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_TRATS
+
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-trats
+
+#define CONFIG_TIZEN /* TIZEN lib */
#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
@@ -33,130 +27,93 @@
#define CONFIG_SYS_PL310_BASE 0x10502000
#endif
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_TEXT_BASE 0x63300000
+#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
-/* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
-#define CONFIG_SYS_CLK_FREQ_C210 24000000
-#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_REVISION_TAG
-#define CONFIG_CMDLINE_EDITING
-#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_BOARD_EARLY_INIT_F
-
-/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
-#define MACH_TYPE_TRATS 3928
-#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
+#define CONFIG_SYS_TEXT_BASE 0x63300000
#include <linux/sizes.h>
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
-#define CONFIG_SERIAL2 /* use SERIAL 2 */
+#define CONFIG_SERIAL2
#define CONFIG_BAUDRATE 115200
-/* MMC */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_S5P_SDHCI
-#define CONFIG_SDHCI
-#define CONFIG_MMC_SDMA
+/* Console configuration */
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-/* PWM */
-#define CONFIG_PWM
+/* MACH_TYPE_TRATS macro will be removed once added to mach-types */
+#define MACH_TYPE_TRATS 3928
+#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
-/* It should define before config_cmd_default.h */
-#define CONFIG_SYS_NO_FLASH
-
-/* Command definition */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_XIMG
-#undef CONFIG_CMD_CACHE
-#undef CONFIG_CMD_ONENAND
-#undef CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_DFU
-#define CONFIG_CMD_GPT
-#define CONFIG_CMD_SETEXPR
-
-/* FAT */
-#define CONFIG_CMD_FAT
-#define CONFIG_FAT_WRITE
-
-/* USB Composite download gadget - g_dnl */
-#define CONFIG_USBDOWNLOAD_GADGET
-
-/* TIZEN THOR downloader support */
-#define CONFIG_CMD_THOR_DOWNLOAD
-#define CONFIG_THOR_FUNCTION
-
-#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
-#define DFU_DEFAULT_POLL_TIMEOUT 300
-#define CONFIG_DFU_FUNCTION
-#define CONFIG_DFU_MMC
-
-/* USB Samsung's IDs */
-#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
-#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
-#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
-#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
-#define CONFIG_G_DNL_MANUFACTURER "Samsung"
-
-#define CONFIG_BOOTDELAY 1
-#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_BOOTARGS "Please use defined boot"
#define CONFIG_BOOTCOMMAND "run mmcboot"
+#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
+ - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
+
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
-#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
#define CONFIG_BOOTBLOCK "10"
#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
+#define CONFIG_ENV_SIZE 4096
+#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
+
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
/* Tizen - partitions definitions */
#define PARTS_CSA "csa-mmc"
-#define PARTS_BOOTLOADER "u-boot"
#define PARTS_BOOT "boot"
+#define PARTS_QBOOT "qboot"
+#define PARTS_CSC "csc"
#define PARTS_ROOT "platform"
#define PARTS_DATA "data"
-#define PARTS_CSC "csc"
#define PARTS_UMS "ums"
#define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
- "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
- "name="PARTS_BOOTLOADER",size=60MiB," \
- "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
- "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
- "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
- "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
+ "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
+ "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
+ "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
+ "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
+ "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
#define CONFIG_DFU_ALT \
"u-boot mmc 80 400;" \
"uImage ext4 0 2;" \
+ "modem.bin ext4 0 2;" \
"exynos4210-trats.dtb ext4 0 2;" \
+ ""PARTS_CSA" part 0 1;" \
""PARTS_BOOT" part 0 2;" \
+ ""PARTS_QBOOT" part 0 3;" \
+ ""PARTS_CSC" part 0 4;" \
""PARTS_ROOT" part 0 5;" \
""PARTS_DATA" part 0 6;" \
""PARTS_UMS" part 0 7;" \
"params.bin mmc 0x38 0x8\0"
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootk=" \
"run loaduimage;" \
@@ -226,59 +183,14 @@
"setenv spl_addr_tmp;\0" \
"fdtaddr=40800000\0" \
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT "TRATS # "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-
-/* TRATS has 4 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS 4
-#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
-#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
-#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
-#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
-#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
-#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
-
-#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
-
-#define CONFIG_SYS_MONITOR_BASE 0x00000000
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_ENV_SIZE 4096
-#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
-
-#define CONFIG_DOS_PARTITION
-#define CONFIG_EFI_PARTITION
-
-/* EXT4 */
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_EXT4_WRITE
/* Falcon mode definitions */
#define CONFIG_CMD_SPL
-#define CONFIG_SYS_SPL_ARGS_ADDR PHYS_SDRAM_1 + 0x100
+#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
-/* GPT */
-#define CONFIG_EFI_PARTITION
-#define CONFIG_PARTITION_UUIDS
+/* I2C */
+#include <asm/arch/gpio.h>
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_CACHELINE_SIZE 32
+#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_S3C24X0
@@ -291,12 +203,11 @@
#define CONFIG_SOFT_I2C_READ_REPEATED_START
#define CONFIG_SYS_I2C_INIT_BOARD
-#include <asm/arch/gpio.h>
-
/* I2C FG */
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0)
+/* POWER */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_MAX8997
@@ -307,11 +218,6 @@
#define CONFIG_POWER_MUIC_MAX8997
#define CONFIG_POWER_BATTERY
#define CONFIG_POWER_BATTERY_TRATS
-#define CONFIG_USB_GADGET
-#define CONFIG_USB_GADGET_S3C_UDC_OTG
-#define CONFIG_USB_GADGET_DUALSPEED
-#define CONFIG_USB_GADGET_VBUS_DRAW 2
-#define CONFIG_USB_CABLE_CHECK
/* Common misc for Samsung */
#define CONFIG_MISC_COMMON
@@ -351,10 +257,7 @@
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
-#define CONFIG_CMD_USB_MASS_STORAGE
-#define CONFIG_USB_GADGET_MASS_STORAGE
-
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
+#define LCD_XRES 720
+#define LCD_YRES 1280
#endif /* __CONFIG_H */
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 6d389df9df..823a8ae66d 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -8,27 +8,17 @@
* SPDX-License-Identifier: GPL-2.0+
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_TRATS2_H
+#define __CONFIG_TRATS2_H
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_SAMSUNG /* in a SAMSUNG core */
-#define CONFIG_S5P /* which is in a S5P Family */
-#define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */
-#define CONFIG_TIZEN /* TIZEN lib */
+#include <configs/exynos4-dt.h>
-#include <asm/arch/cpu.h> /* get chip and board defs */
+#define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
+#undef CONFIG_DEFAULT_DEVICE_TREE
+#define CONFIG_DEFAULT_DEVICE_TREE exynos4412-trats2
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
-#define CONFIG_SYS_CACHELINE_SIZE 32
+#define CONFIG_TIZEN /* TIZEN lib */
#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
@@ -36,129 +26,55 @@
#define CONFIG_SYS_PL310_BASE 0x10502000
#endif
-#define CONFIG_NR_DRAM_BANKS 4
-#define PHYS_SDRAM_1 0x40000000 /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
-#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
-#define PHYS_SDRAM_3 0x60000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_3_SIZE (256 << 20) /* 256 MB in CS 0 */
-#define PHYS_SDRAM_4 0x70000000 /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_4_SIZE (256 << 20) /* 256 MB in CS 0 */
-#define PHYS_SDRAM_END 0x80000000
+/* TRATS2 has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS 4
+#define CONFIG_SYS_SDRAM_BASE 0x40000000
+#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
+#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
-
-#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
#define CONFIG_SYS_TEXT_BASE 0x78100000
-#define CONFIG_SYS_CLK_FREQ 24000000
-
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_REVISION_TAG
-
-/* MACH_TYPE_TRATS2 */
-#define MACH_TYPE_TRATS2 3765
-#define CONFIG_MACH_TYPE MACH_TYPE_TRATS2
-
-#define CONFIG_DISPLAY_CPUINFO
-
#include <linux/sizes.h>
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
#define CONFIG_SERIAL2
-
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-
-#define CONFIG_CMDLINE_EDITING
-
#define CONFIG_BAUDRATE 115200
-/* It should define before config_cmd_default.h */
-#define CONFIG_SYS_NO_FLASH
-
-/***********************************************************
- * Command definition
- ***********************************************************/
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_ECHO
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_NAND
-#undef CONFIG_CMD_MISC
-#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_SOURCE
-#undef CONFIG_CMD_XIMG
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MMC
-#define CONFIG_CMD_DFU
-#define CONFIG_CMD_GPT
-#define CONFIG_CMD_PMIC
-
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-
-#define CONFIG_CMD_FAT
-#define CONFIG_FAT_WRITE
-
-/* EXT4 */
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_EXT4_WRITE
-
-/* USB Composite download gadget - g_dnl */
-#define CONFIG_USBDOWNLOAD_GADGET
-#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
-#define DFU_DEFAULT_POLL_TIMEOUT 300
-#define CONFIG_DFU_FUNCTION
-#define CONFIG_DFU_MMC
-
-/* TIZEN THOR downloader support */
-#define CONFIG_CMD_THOR_DOWNLOAD
-#define CONFIG_THOR_FUNCTION
-
-/* USB Samsung's IDs */
-#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
-#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
-#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
-#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
-#define CONFIG_G_DNL_MANUFACTURER "Samsung"
-
-/* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */
-#undef CONFIG_CMD_NET
-
-/* MMC */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_S5P_SDHCI
-#define CONFIG_SDHCI
-#define CONFIG_MMC_SDMA
-#define CONFIG_MMC_DEFAULT_DEV 0
-
-/* PWM */
-#define CONFIG_PWM
-
-#define CONFIG_BOOTARGS "Please use defined boot"
-#define CONFIG_BOOTCOMMAND "run mmcboot"
-#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
-
-#define CONFIG_ENV_OVERWRITE
+/* Console configuration */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_BOOTARGS "Please use defined boot"
+#define CONFIG_BOOTCOMMAND "run mmcboot"
+#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
+
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
+ - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
+
+#define CONFIG_SYS_MONITOR_BASE 0x00000000
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
+#define CONFIG_ENV_SIZE 4096
+#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
+
+#define CONFIG_ENV_OVERWRITE
+
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Tizen - partitions definitions */
-#define PARTS_CSA "csa"
+#define PARTS_CSA "csa-mmc"
#define PARTS_BOOT "boot"
-#define PARTS_MODEM "modem"
+#define PARTS_QBOOT "qboot"
#define PARTS_CSC "csc"
#define PARTS_ROOT "platform"
#define PARTS_DATA "data"
@@ -167,18 +83,22 @@
#define PARTS_DEFAULT \
"uuid_disk=${uuid_gpt_disk};" \
"name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
- "name="PARTS_BOOT",size=64MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
- "name="PARTS_MODEM",size=100MiB,uuid=${uuid_gpt_"PARTS_MODEM"};" \
+ "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
+ "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
"name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
- "name="PARTS_DATA",size=512MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
+ "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
#define CONFIG_DFU_ALT \
"u-boot mmc 80 800;" \
"uImage ext4 0 2;" \
+ "modem.bin ext4 0 2;" \
"exynos4412-trats2.dtb ext4 0 2;" \
+ ""PARTS_CSA" part 0 1;" \
""PARTS_BOOT" part 0 2;" \
+ ""PARTS_QBOOT" part 0 3;" \
+ ""PARTS_CSC" part 0 4;" \
""PARTS_ROOT" part 0 5;" \
""PARTS_DATA" part 0 6;" \
""PARTS_UMS" part 0 7;" \
@@ -246,49 +166,11 @@
"setenv spl_addr_tmp;\0" \
"fdtaddr=40800000\0" \
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
-
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
- - GENERATED_GBL_DATA_SIZE)
-
-/* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
-#define CONFIG_SYS_MONITOR_BASE 0x00000000
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
-#define CONFIG_ENV_SIZE 4096
-#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
-#define CONFIG_EFI_PARTITION
-#define CONFIG_PARTITION_UUIDS
-
-#define CONFIG_BOARD_EARLY_INIT_F
-
/* I2C */
#include <asm/arch/gpio.h>
+#define CONFIG_CMD_I2C
+
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_S3C24X0
#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
@@ -318,11 +200,6 @@ int get_soft_i2c_sda_pin(void);
#define CONFIG_POWER_MUIC_MAX77693
#define CONFIG_POWER_FG_MAX77693
#define CONFIG_POWER_BATTERY_TRATS2
-#define CONFIG_USB_GADGET
-#define CONFIG_USB_GADGET_S3C_UDC_OTG
-#define CONFIG_USB_GADGET_DUALSPEED
-#define CONFIG_USB_GADGET_VBUS_DRAW 2
-#define CONFIG_USB_CABLE_CHECK
/* Common misc for Samsung */
#define CONFIG_MISC_COMMON
@@ -362,10 +239,7 @@ int get_soft_i2c_sda_pin(void);
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
-#define CONFIG_CMD_USB_MASS_STORAGE
-#define CONFIG_USB_GADGET_MASS_STORAGE
-
-/* Pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT 1
+#define LCD_XRES 720
+#define LCD_YRES 1280
#endif /* __CONFIG_H */
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 19bab79448..63027bd4c0 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -79,8 +79,10 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */
COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */
COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
+ COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */
COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
+ COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */
COMPAT_SAMSUNG_EXYNOS_SERIAL, /* Exynos UART */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
diff --git a/include/sdhci.h b/include/sdhci.h
index 74d06ae18a..32e04f53b5 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -12,6 +12,7 @@
#include <asm/io.h>
#include <mmc.h>
+#include <fdtdec.h>
/*
* Controller registers
@@ -244,6 +245,10 @@ struct sdhci_host {
const struct sdhci_ops *ops;
int index;
+ int bus_width;
+ struct fdt_gpio_state pwr_gpio; /* Power GPIO */
+ struct fdt_gpio_state cd_gpio; /* Card Detect GPIO */
+
void (*set_control_reg)(struct sdhci_host *host);
void (*set_clock)(int dev_index, unsigned int div);
uint voltages;
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 1fecab3fbc..be04598902 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -52,8 +52,10 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
COMPAT(SAMSUNG_EXYNOS_FIMD, "samsung,exynos-fimd"),
+ COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"),
COMPAT(SAMSUNG_EXYNOS5_DWMMC, "samsung,exynos5250-dwmmc"),
+ COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"),
COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686_pmic"),
COMPAT(GENERIC_SPI_FLASH, "spi-flash"),