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Merge git://git.denx.de/u-boot-marvell

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This commit is contained in:
Tom Rini 2018-08-07 11:32:34 -04:00
commit 63d54c9c59
50 changed files with 772 additions and 558 deletions
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1
arch/arm/Kconfig
View file

@ -1480,7 +1480,6 @@ source "board/freescale/ls1012ardb/Kconfig"
source "board/freescale/ls1012afrdm/Kconfig"
source "board/freescale/mx35pdk/Kconfig"
source "board/freescale/s32v234evb/Kconfig"
source "board/gdsys/a38x/Kconfig"
source "board/grinn/chiliboard/Kconfig"
source "board/gumstix/pepper/Kconfig"
source "board/h2200/Kconfig"

9
arch/arm/dts/armada-388-clearfog-u-boot.dtsi Normal file
View file

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
&spi1 {
u-boot,dm-spl;
spi-flash@0 {
u-boot,dm-spl;
};
};

333
arch/arm/dts/armada-388-clearfog.dts
View file

@ -50,6 +50,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-388.dtsi"
#include "armada-38x-solidrun-microsom.dtsi"
/ {
model = "SolidRun Clearfog A1";
@ -70,11 +71,6 @@
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; /* 256 MB */
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
@ -84,42 +80,112 @@
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
internal-regs {
ethernet@30000 {
mac-address = [00 50 43 02 02 02];
phy-mode = "sgmii";
rtc@a3800 {
/*
* If the rtc doesn't work, run "date reset"
* twice in u-boot.
*/
status = "okay";
};
fixed-link {
speed = <1000>;
full-duplex;
sata@a8000 {
/* pinctrl? */
status = "okay";
};
sata@e0000 {
/* pinctrl? */
status = "okay";
};
sdhci@d8000 {
bus-width = <4>;
cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
no-1-8-v;
pinctrl-0 = <&microsom_sdhci_pins
&clearfog_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
vmmc = <&reg_3p3v>;
wp-inverted;
};
serial@12100 {
/* mikrobus uart */
pinctrl-0 = <&mikro_uart_pins>;
pinctrl-names = "default";
status = "okay";
};
spi1: spi@10680 {
/*
* CS0: W25Q32
* CS1:
* CS2: mikrobus
*/
pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
pinctrl-names = "default";
status = "okay";
};
usb0: usb3@f8000 {
/* CON7, USB-A port on back of device */
status = "okay";
};
};
ethernet@34000 {
mac-address = [00 50 43 02 02 03];
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* the mini-PCIe connectors on the board.
*/
pcie@2,0 {
/* Port 1, Lane 0. CONN3, nearest power. */
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
status = "okay";
};
pcie@3,0 {
/* Port 2, Lane 0. CONN2, nearest CPU. */
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&rear_button_pins>;
pinctrl-names = "default";
button_0 {
/* The rear SW3 button */
label = "Rear Button";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
linux,can-disable;
linux,code = <BTN_0>;
};
};
};
&w25q32 {
status = "okay";
};
&eth1 {
managed = "in-band-status";
phy-mode = "sgmii";
status = "okay";
};
};
ethernet@70000 {
mac-address = [00 50 43 02 02 01];
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy_dedicated>;
phy-mode = "rgmii-id";
&eth2 {
phy-mode = "sgmii";
status = "okay";
};
};
i2c@11000 {
/* Is there anything on this? */
clock-frequency = <100000>;
&i2c0 {
clock-frequency = <400000>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
status = "okay";
@ -200,16 +266,13 @@
};
};
/* The MCP3021 is 100kHz clock only */
mikrobus_adc: mcp3021@4c {
compatible = "microchip,mcp3021";
reg = <0x4c>;
};
};
/* Also something at 0x64 */
};
i2c@11100 {
&i2c1 {
/*
* Routed to SFP, mikrobus, and PCIe.
* SFP limits this to 100kHz, and requires
@ -224,33 +287,9 @@
pinctrl-0 = <&clearfog_i2c1_pins>;
pinctrl-names = "default";
status = "okay";
};
};
mdio@72004 {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy_dedicated: ethernet-phy@0 {
/*
* Annoyingly, the marvell phy driver
* configures the LED register, rather
* than preserving reset-loaded setting.
* We undo that rubbish here.
*/
marvell,reg-init = <3 16 0 0x101e>;
reg = <0>;
};
};
pinctrl@18000 {
clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
marvell,pins = "mpp46";
marvell,function = "ref";
};
clearfog_dsa0_pins: clearfog-dsa0-pins {
marvell,pins = "mpp23", "mpp41";
marvell,function = "gpio";
};
&pinctrl {
clearfog_i2c1_pins: i2c1-pins {
/* SFP, PCIe, mSATA, mikrobus */
marvell,pins = "mpp26", "mpp27";
@ -260,12 +299,6 @@
marvell,pins = "mpp20";
marvell,function = "gpio";
};
clearfog_sdhci_pins: clearfog-sdhci-pins {
marvell,pins = "mpp21", "mpp28",
"mpp37", "mpp38",
"mpp39", "mpp40";
marvell,function = "sd0";
};
clearfog_spi1_cs_pins: spi1-cs-pins {
marvell,pins = "mpp55";
marvell,function = "spi1";
@ -287,174 +320,6 @@
marvell,pins = "mpp34";
marvell,function = "gpio";
};
};
rtc@a3800 {
/*
* If the rtc doesn't work, run "date reset"
* twice in u-boot.
*/
status = "okay";
};
sata@a8000 {
/* pinctrl? */
status = "okay";
};
sata@e0000 {
/* pinctrl? */
status = "okay";
};
sdhci@d8000 {
bus-width = <4>;
cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
no-1-8-v;
pinctrl-0 = <&clearfog_sdhci_pins
&clearfog_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
vmmc = <&reg_3p3v>;
wp-inverted;
};
serial@12000 {
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
status = "okay";
u-boot,dm-pre-reloc;
};
serial@12100 {
/* mikrobus uart */
pinctrl-0 = <&mikro_uart_pins>;
pinctrl-names = "default";
status = "okay";
};
spi1: spi@10680 {
/*
* CS0: W25Q32
* CS1:
* CS2: mikrobus
*/
pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
pinctrl-names = "default";
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "w25q32", "jedec,spi-nor", "spi-flash";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <3000000>;
};
};
usb3@f8000 {
status = "okay";
};
};
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* the mini-PCIe connectors on the board.
*/
pcie@2,0 {
/* Port 1, Lane 0. CONN3, nearest power. */
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
status = "okay";
};
pcie@3,0 {
/* Port 2, Lane 0. CONN2, nearest CPU. */
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
};
sfp: sfp {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
sfp,ethernet = <&eth2>;
tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
};
dsa@0 {
compatible = "marvell,dsa";
dsa,ethernet = <&eth1>;
dsa,mii-bus = <&mdio>;
pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
pinctrl-names = "default";
#address-cells = <2>;
#size-cells = <0>;
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4 0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@4 {
reg = <4>;
label = "lan5";
};
port@5 {
reg = <5>;
label = "cpu";
};
port@6 {
/* 88E1512 external phy */
reg = <6>;
label = "lan6";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&rear_button_pins>;
pinctrl-names = "default";
button_0 {
/* The rear SW3 button */
label = "Rear Button";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
linux,can-disable;
linux,code = <BTN_0>;
};
};
};
/*

8
arch/arm/dts/armada-388-helios4.dts
View file

@ -248,7 +248,7 @@
bus-width = <4>;
cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
no-1-8-v;
pinctrl-0 = <&helios_sdhci_pins
pinctrl-0 = <&microsom_sdhci_pins
&helios_sdhci_cd_pins>;
pinctrl-names = "default";
status = "okay";
@ -286,12 +286,6 @@
marvell,pins = "mpp20";
marvell,function = "gpio";
};
helios_sdhci_pins: helios-sdhci-pins {
marvell,pins = "mpp21", "mpp28",
"mpp37", "mpp38",
"mpp39", "mpp40";
marvell,function = "sd0";
};
helios_led_pins: helios-led-pins {
marvell,pins = "mpp24", "mpp25",
"mpp49", "mpp50",

2
arch/arm/dts/armada-38x-solidrun-microsom.dtsi
View file

@ -86,7 +86,7 @@
w25q32: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "w25q32", "jedec,spi-nor";
compatible = "w25q32", "jedec,spi-nor", "spi-flash";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <3000000>;
status = "disabled";

145
arch/arm/dts/kirkwood-atl-sbx81lifxcat.dts Normal file
View file

@ -0,0 +1,145 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "kirkwood.dtsi"
#include "kirkwood-98dx4122.dtsi"
/ {
model = "Allied Telesis SBx81LIFXCAT Board";
compatible = "atl,SBx8LIFXCAT", "marvell,kirkwood-98DX4122",
"marvell,kirkwood";
memory {
device_type = "memory";
reg = <0x00000000 0x08000000>; /* 128 MB */
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
};
aliases {
ethernet0 = &eth0;
i2c0 = &i2c0;
spi0 = &spi0;
};
dsa {
compatible = "marvell,dsa";
#address-cells = <2>;
#size-cells = <0>;
dsa,ethernet = <&eth0>;
dsa,mii-bus = <&mdio>;
status = "okay";
switch@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1 0>;
port@0 {
reg = <0>;
label = "internal0";
};
port@1 {
reg = <1>;
label = "internal1";
};
port@8 {
reg = <8>;
label = "internal8";
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@9 {
reg = <9>;
label = "internal9";
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@10 {
reg = <10>;
label = "cpu";
};
};
};
gpio-leds {
compatible = "gpio-leds";
ledn {
label = "status:ledn";
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
};
ledp {
label = "status:ledp";
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p128", "jedec,spi-nor", "spi-flash";
reg = <0>;
spi-max-frequency = <50000000>;
mode = <0>;
partition@u-boot {
reg = <0x00000000 0x00c00000>;
label = "u-boot";
};
partition@u-boot-env {
reg = <0x00c00000 0x00040000>;
label = "u-boot-env";
};
partition@unused {
reg = <0x00100000 0x00f00000>;
label = "unused";
};
};
};
&i2c0 {
status = "okay";
eeprom@52 {
compatible = "atmel,24c04";
reg = <0x52>;
};
gpio3: gpio@76 {
#gpio-cells = <2>;
compatible = "nxp,pca9539";
reg = <0x76>;
};
};
&uart0 {
status = "okay";
};
&mdio {
status = "okay";
};
&eth0 {
status = "okay";
ethernet0-port@0 {
speed = <1000>;
duplex = <1>;
};
};

4
arch/arm/mach-kirkwood/Kconfig
View file

@ -62,6 +62,9 @@ config TARGET_NSA310S
config TARGET_SBx81LIFKW
bool "Allied Telesis SBx81GS24/SBx81GT40/SBx81XS6/SBx81XS16"
config TARGET_SBx81LIFXCAT
bool "Allied Telesis SBx81GP24/SBx81GT24"
endchoice
config SYS_SOC
@ -85,5 +88,6 @@ source "board/Seagate/goflexhome/Kconfig"
source "board/Seagate/nas220/Kconfig"
source "board/zyxel/nsa310s/Kconfig"
source "board/alliedtelesis/SBx81LIFKW/Kconfig"
source "board/alliedtelesis/SBx81LIFXCAT/Kconfig"
endif

0
board/gdsys/a38x/.gitignore → arch/arm/mach-mvebu/.gitignore vendored
View file

17
arch/arm/mach-mvebu/Kconfig
View file

@ -148,6 +148,7 @@ config SYS_BOARD
default "ds414" if TARGET_DS414
default "maxbcm" if TARGET_MAXBCM
default "theadorable" if TARGET_THEADORABLE
default "a38x" if TARGET_CONTROLCENTERDC
config SYS_CONFIG_NAME
default "clearfog" if TARGET_CLEARFOG
@ -163,6 +164,7 @@ config SYS_CONFIG_NAME
default "theadorable" if TARGET_THEADORABLE
default "turris_omnia" if TARGET_TURRIS_OMNIA
default "turris_mox" if TARGET_TURRIS_MOX
default "controlcenterdc" if TARGET_CONTROLCENTERDC
config SYS_VENDOR
default "Marvell" if TARGET_DB_MV784MP_GP
@ -176,25 +178,26 @@ config SYS_VENDOR
default "Synology" if TARGET_DS414
default "CZ.NIC" if TARGET_TURRIS_OMNIA
default "CZ.NIC" if TARGET_TURRIS_MOX
default "gdsys" if TARGET_CONTROLCENTERDC
config SYS_SOC
default "mvebu"
if TARGET_TURRIS_OMNIA
choice
prompt "Turris Omnia boot method"
prompt "Boot method"
config TURRIS_OMNIA_SPL_BOOT_DEVICE_SPI
config MVEBU_SPL_BOOT_DEVICE_SPI
bool "SPI NOR flash"
config TURRIS_OMNIA_SPL_BOOT_DEVICE_MMC
config MVEBU_SPL_BOOT_DEVICE_MMC
bool "SDIO/MMC card"
select SPL_LIBDISK_SUPPORT
config MVEBU_SPL_BOOT_DEVICE_UART
bool "UART"
endchoice
endif
config MVEBU_EFUSE
bool "Enable eFuse support"
default n

33
arch/arm/mach-mvebu/Makefile
View file

@ -25,6 +25,39 @@ obj-$(CONFIG_ARMADA_375) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o
obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
extra-y += kwbimage.cfg
KWB_REPLACE += BOOT_FROM
ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI),)
KWB_CFG_BOOT_FROM=spi
endif
ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC),)
KWB_CFG_BOOT_FROM=sdio
endif
ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_UART),)
KWB_CFG_BOOT_FROM=uart
endif
ifneq ($(CONFIG_SECURED_MODE_IMAGE),)
KWB_REPLACE += CSK_INDEX
KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX)
KWB_REPLACE += SEC_BOOT_DEV
KWB_CFG_SEC_BOOT_DEV=$(patsubst "%",%, \
$(if $(findstring BOOT_SPI_NOR_FLASH,$(CONFIG_SPL_BOOT_DEVICE)),0x34) \
$(if $(findstring BOOT_SDIO_MMC_CARD,$(CONFIG_SPL_BOOT_DEVICE)),0x31) \
)
KWB_REPLACE += SEC_FUSE_DUMP
KWB_CFG_SEC_FUSE_DUMP = a38x
endif
$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \
include/config/auto.conf
$(Q)sed -ne '$(foreach V,$(KWB_REPLACE),s/^#@$(V)/$(V) $(KWB_CFG_$(V))/;)p' \
<$< >$(dir $<)$(@F)
endif # CONFIG_SPL_BUILD
obj-y += gpio.o
obj-y += mbus.o

4
arch/arm/mach-mvebu/include/mach/config.h
View file

@ -32,12 +32,12 @@
#endif
/*
* By default kwbimage.cfg from board specific folder is used
* By default the generated mvebu kwbimage.cfg is used
* If for some board, different configuration file need to be used,
* CONFIG_SYS_KWD_CONFIG should be defined in board specific header file
*/
#ifndef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
#define CONFIG_SYS_KWD_CONFIG arch/arm/mach-mvebu/kwbimage.cfg
#endif /* CONFIG_SYS_KWD_CONFIG */
/* Add target to build it automatically upon "make" */

0
board/gdsys/a38x/kwbimage.cfg.in → arch/arm/mach-mvebu/kwbimage.cfg.in
View file

12
board/CZ.NIC/turris_omnia/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2014 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl.bin 0000005b 00000068

12
board/Marvell/db-88f6720/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2014 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/Marvell/db-88f6820-amc/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2014 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/Marvell/db-88f6820-gp/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2014 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/Marvell/db-mv784mp-gp/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2014 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/Synology/ds414/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2014 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/alliedtelesis/SBx81LIFXCAT/Kconfig Normal file
View file

@ -0,0 +1,12 @@
if TARGET_SBx81LIFXCAT
config SYS_BOARD
default "SBx81LIFXCAT"
config SYS_VENDOR
default "alliedtelesis"
config SYS_CONFIG_NAME
default "SBx81LIFXCAT"
endif

7
board/alliedtelesis/SBx81LIFXCAT/MAINTAINERS Normal file
View file

@ -0,0 +1,7 @@
SBx81LIFXCAT BOARD
M: Chris Packham <chris.packham@alliedtelesis.co.nz>
S: Maintained
F: board/alliedtelesis/SBx81LIFXCAT/
F: include/configs/SBx81LIFXCAT
F: configs/SBx81LIFXCAT_defconfig
F: arch/arm/dts/kirkwood-atl-sbx81lifxcat.dts

7
board/alliedtelesis/SBx81LIFXCAT/Makefile Normal file
View file

@ -0,0 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2010, 2018
# Allied Telesis <www.alliedtelesis.com>
#
obj-y += sbx81lifxcat.o

49
board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg Normal file
View file

@ -0,0 +1,49 @@
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2018 Allied Telesis
#
# Refer docs/README.kwimage for more details about how-to configure
# and create kirkwood boot image
#
# Boot Media configurations
BOOT_FROM spi # Boot from SPI flash
# SOC registers configuration using bootrom header extension
# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
DATA 0xffd100e0 0x1b1b1b1b
DATA 0xffd20134 0xffffffff
DATA 0xffd20138 0x009fffff
DATA 0xffd20154 0x00000000
DATA 0xffd2014c 0x00000000
DATA 0xffd20148 0x00000001
# Dram initalization for 1 x x16
# DDR II Micron part number MT47H64M16HR-3
# MClk 333MHz, Size 128MB, ECC disable
#
DATA 0xffd01400 0x43000618
DATA 0xffd01404 0x38543000
DATA 0xffd01408 0x23125441
DATA 0xffd0140c 0x00000832
DATA 0xffd01410 0x0000000D
DATA 0xffd01414 0x00000000
DATA 0xffd01418 0x00000000
DATA 0xffd0141c 0x00000652
DATA 0xffd01420 0x00000042
DATA 0xffd01424 0x0000F0FF
DATA 0xffd01428 0x00074410
DATA 0xffd0147C 0x00007441
DATA 0xffd01500 0x00000000 # SDRAM CS[0] Base address at 0x00000000
DATA 0xffd01504 0x07FFFFF1 # SDRAM CS[0] Size 128MiB
DATA 0xffd01508 0x10000000
DATA 0xffd0150c 0x00FFFFF4 # SDRAM CS[1] Size, window disabled
DATA 0xffd01514 0x00FFFFF8 # SDRAM CS[2] Size, window disabled
DATA 0xffd0151c 0x00FFFFFC # SDRAM CS[3] Size, window disabled
DATA 0xffd01494 0x84210000
DATA 0xffd01498 0x00000000
DATA 0xffd0149c 0x0000F80F
DATA 0xffd01480 0x00000001
# End of Header extension
DATA 0x0 0x0

134
board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c Normal file
View file

@ -0,0 +1,134 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010, 2018
* Allied Telesis <www.alliedtelesis.com>
*/
#include <common.h>
#include <miiphy.h>
#include <netdev.h>
#include <led.h>
#include <linux/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include <asm/arch/gpio.h>
#define SBX81LIFXCAT_OE_LOW (~0)
#define SBX81LIFXCAT_OE_HIGH (~BIT(11))
#define SBX81LIFXCAT_OE_VAL_LOW (0)
#define SBX81LIFXCAT_OE_VAL_HIGH (BIT(11))
DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
/*
* default gpio configuration
* There are maximum 64 gpios controlled through 2 sets of registers
* the below configuration configures mainly initial LED status
*/
mvebu_config_gpio(SBX81LIFXCAT_OE_VAL_LOW,
SBX81LIFXCAT_OE_VAL_HIGH,
SBX81LIFXCAT_OE_LOW, SBX81LIFXCAT_OE_HIGH);
/* Multi-Purpose Pins Functionality configuration */
static const u32 kwmpp_config[] = {
MPP0_SPI_SCn,
MPP1_SPI_MOSI,
MPP2_SPI_SCK,
MPP3_SPI_MISO,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_GPO,
MPP8_TW_SDA,
MPP9_TW_SCK,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_GPO,
MPP13_UART1_TXD,
MPP14_UART1_RXD,
MPP15_GPIO,
MPP16_GPIO,
MPP17_GPIO,
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_GE1_0,
MPP21_GE1_1,
MPP22_GE1_2,
MPP23_GE1_3,
MPP24_GE1_4,
MPP25_GE1_5,
MPP26_GE1_6,
MPP27_GE1_7,
MPP28_GE1_8,
MPP29_GE1_9,
MPP30_GE1_10,
MPP31_GE1_11,
MPP32_GE1_12,
MPP33_GE1_13,
MPP34_GPIO,
MPP35_GPIO,
MPP36_GPIO,
MPP37_GPIO,
MPP38_GPIO,
MPP39_GPIO,
MPP40_GPIO,
MPP41_GPIO,
MPP42_GPIO,
MPP43_GPIO,
MPP44_GPIO,
MPP45_GPIO,
MPP46_GPIO,
MPP47_GPIO,
MPP48_GPIO,
MPP49_GPIO,
0
};
kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
}
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
#ifdef CONFIG_RESET_PHY_R
/* automatically defined by kirkwood config.h */
void reset_phy(void)
{
}
#endif
#ifdef CONFIG_MV88E61XX_SWITCH
int mv88e61xx_hw_reset(struct phy_device *phydev)
{
phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
return 0;
}
#endif
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
struct udevice *dev;
int ret;
ret = led_get_by_label("status:ledp", &dev);
if (!ret)
led_set_state(dev, LEDST_ON);
ret = led_get_by_label("status:ledn", &dev);
if (!ret)
led_set_state(dev, LEDST_OFF);
return 0;
}
#endif

36
board/gdsys/a38x/Kconfig
View file

@ -1,36 +0,0 @@
if TARGET_CONTROLCENTERDC
config SYS_BOARD
default "a38x"
config SYS_VENDOR
default "gdsys"
config SYS_SOC
default "mvebu"
config SYS_CONFIG_NAME
default "controlcenterdc"
menu "Controlcenter DC board options"
choice
prompt "Select boot method"
config SPL_BOOT_DEVICE_SPI
bool "SPI"
config SPL_BOOT_DEVICE_MMC
bool "MMC"
select SPL_LIBDISK_SUPPORT
endchoice
#config SPL_BOOT_DEVICE
# int
# default 1 if SPL_BOOT_DEVICE_SPI
# default 2 if SPL_BOOT_DEVICE_MMC
endmenu
endif

31
board/gdsys/a38x/Makefile
View file

@ -7,36 +7,5 @@
obj-$(CONFIG_TARGET_CONTROLCENTERDC) += controlcenterdc.o hre.o spl.o keyprogram.o dt_helpers.o
ifeq ($(CONFIG_SPL_BUILD),)
obj-$(CONFIG_TARGET_CONTROLCENTERDC) += hydra.o ihs_phys.o
extra-$(CONFIG_TARGET_CONTROLCENTERDC) += kwbimage.cfg
KWB_REPLACE += BOOT_FROM
ifneq ($(CONFIG_SPL_BOOT_DEVICE_SPI),)
KWB_CFG_BOOT_FROM=spi
endif
ifneq ($(CONFIG_SPL_BOOT_DEVICE_MMC),)
KWB_CFG_BOOT_FROM=sdio
endif
ifneq ($(CONFIG_SECURED_MODE_IMAGE),)
KWB_REPLACE += CSK_INDEX
KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX)
KWB_REPLACE += SEC_BOOT_DEV
KWB_CFG_SEC_BOOT_DEV=$(patsubst "%",%, \
$(if $(findstring BOOT_SPI_NOR_FLASH,$(CONFIG_SPL_BOOT_DEVICE)),0x34) \
$(if $(findstring BOOT_SDIO_MMC_CARD,$(CONFIG_SPL_BOOT_DEVICE)),0x31) \
)
KWB_REPLACE += SEC_FUSE_DUMP
KWB_CFG_SEC_FUSE_DUMP = a38x
endif
$(src)/kwbimage.cfg: $(src)/kwbimage.cfg.in include/autoconf.mk \
include/config/auto.conf
$(Q)sed -ne '$(foreach V,$(KWB_REPLACE),s/^#@$(V)/$(V) $(KWB_CFG_$(V))/;)p' \
<$< >$(dir $<)$(@F)
endif

13
board/kobol/helios4/kwbimage.cfg
View file

@ -1,13 +0,0 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2015 Stefan Roese <sr@denx.de>
#
# Armada 38x use version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM sdio
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/maxbcm/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2014 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/solidrun/clearfog/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2015 Stefan Roese <sr@denx.de>
#
# Armada 38x use version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM sdio
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

12
board/theadorable/kwbimage.cfg
View file

@ -1,12 +0,0 @@
#
# Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
#
# Armada XP uses version 1 image format
VERSION 1
# Boot Media configurations
BOOT_FROM spi
# Binary Header (bin_hdr) with DDR3 training code
BINARY spl/u-boot-spl-dtb.bin 0000005b 00000068

2
configs/SBx81LIFKW_defconfig
View file

@ -35,5 +35,7 @@ CONFIG_MV88E61XX_SWITCH=y
CONFIG_MV88E61XX_CPU_PORT=10
CONFIG_MV88E61XX_PHY_PORTS=0x003
CONFIG_MV88E61XX_FIXED_PORTS=0x300
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SPI=y
CONFIG_KIRKWOOD_SPI=y

44
configs/SBx81LIFXCAT_defconfig Normal file
View file

@ -0,0 +1,44 @@
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_TARGET_SBx81LIFXCAT=y
CONFIG_IDENT_STRING="\nSBx81LIFXCAT"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_CMD_DHCP=y
CONFIG_BOOTP_NTPSERVER=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
# CONFIG_CMD_LED is not set
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
CONFIG_MV88E61XX_SWITCH=y
CONFIG_MV88E61XX_CPU_PORT=10
CONFIG_MV88E61XX_PHY_PORTS=0x003
CONFIG_MV88E61XX_FIXED_PORTS=0x300
CONFIG_MV88E61XX_RGMII_DELAY=y
CONFIG_SPI=y
CONFIG_KIRKWOOD_SPI=y

2
configs/clearfog_defconfig
View file

@ -6,12 +6,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_CLEARFOG=y
CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y

5
configs/dns325_defconfig
View file

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DNS325=y
CONFIG_IDENT_STRING="\nD-Link DNS-325"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
@ -16,7 +17,6 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_CMD_JFFS2=y
@ -26,10 +26,13 @@ CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
# CONFIG_MMC is not set
CONFIG_NETDEVICES=y
CONFIG_MVGBE=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y

5
configs/dreamplug_defconfig
View file

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DREAMPLUG=y
CONFIG_IDENT_STRING="\nMarvell-DreamPlug"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
@ -15,19 +16,21 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_NETDEVICES=y
CONFIG_MVGBE=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_KIRKWOOD_SPI=y

7
configs/ds109_defconfig
View file

@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DS109=y
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_IDE=y
@ -12,18 +13,22 @@ CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_FAT=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_MVGBE=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_KIRKWOOD_SPI=y

5
configs/goflexhome_defconfig
View file

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_GOFLEXHOME=y
CONFIG_IDENT_STRING="\nSeagate GoFlex Home"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_BOARDINFO is not set
@ -16,7 +17,6 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
@ -27,10 +27,13 @@ CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
# CONFIG_MMC is not set
CONFIG_NETDEVICES=y
CONFIG_MVGBE=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y

5
configs/guruplug_defconfig
View file

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_GURUPLUG=y
CONFIG_IDENT_STRING="\nMarvell-GuruPlug"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
@ -16,7 +17,6 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
@ -27,10 +27,13 @@ CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
# CONFIG_MMC is not set
CONFIG_NETDEVICES=y
CONFIG_MVGBE=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y

1
configs/helios4_defconfig
View file

@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_HELIOS4=y
CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y

5
configs/nas220_defconfig
View file

@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NAS220=y
CONFIG_IDENT_STRING="\nNAS 220"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
@ -16,7 +17,6 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
@ -27,10 +27,13 @@ CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
# CONFIG_MMC is not set
CONFIG_NETDEVICES=y
CONFIG_MVGBE=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y

5
configs/sheevaplug_defconfig
View file

@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_SHEEVAPLUG=y
CONFIG_IDENT_STRING="\nMarvell-Sheevaplug"
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug"
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=3
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_HUSH_PARSER=y
@ -18,7 +19,6 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
@ -29,9 +29,12 @@ CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_MVSATA_IDE=y
CONFIG_NETDEVICES=y
CONFIG_MVGBE=y
CONFIG_DM_RTC=y
CONFIG_RTC_MV=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y

5
include/configs/SBx81LIFKW.h
View file

@ -109,11 +109,6 @@
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#endif /* CONFIG_CMD_NET */
/*
* Time settings
*/
#define CONFIG_RTC_MV
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */
#endif /* _CONFIG_SBX81LIFKW_H */

114
include/configs/SBx81LIFXCAT.h Normal file
View file

@ -0,0 +1,114 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2016 Allied Telesis <www.alliedtelesis.co.nz>
*/
#ifndef _CONFIG_SBX81LIFXCAT_H
#define _CONFIG_SBX81LIFXCAT_H
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg
#define CONFIG_BUILD_TARGET "u-boot.kwb"
/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_GPIO 1
#define CONFIG_MISC_INIT_R /* call misc_init_r */
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
/*
* Serial Port configuration
* The following definitions let you select what serial you want to use
* for your console driver.
*/
#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog"
#define CONFIG_DOS_PARTITION
/*
* Environment variables configurations
*/
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */
#define CONFIG_ENV_SIZE 0x02000
#define CONFIG_ENV_OFFSET 0xc0000 /* env starts here - 768K */
/*
* U-Boot bootcode configuration
*/
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
/* size in bytes reserved for initial data */
#include <asm/arch/config.h>
/* There is no PHY directly connected so don't ask it for link status */
#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/*
* Other required minimal configurations
*/
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_NR_DRAM_BANKS 4
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
/*
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_NETCONSOLE /* include NetConsole support */
#define CONFIG_NET_MULTI /* specify more that one ports available */
#define CONFIG_MII /* expose smi over miiphy interface */
#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */
#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */
#define CONFIG_PHY_BASE_ADR 0x01
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#endif /* CONFIG_CMD_NET */
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */
#endif /* _CONFIG_SBX81LIFXCAT_H */

16
include/configs/clearfog.h
View file

@ -70,16 +70,6 @@
"initrd_high=0x10000000\0"
/* SPL */
/*
* Select the boot device here
*
* Currently supported are:
* SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
* SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
*/
#define SPL_BOOT_SPI_NOR_FLASH 1
#define SPL_BOOT_SDIO_MMC_CARD 2
#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SDIO_MMC_CARD
/* Defines for SPL */
#define CONFIG_SPL_SIZE (140 << 10)
@ -96,13 +86,11 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
/* SPL related SPI defines */
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC)
/* SPL related MMC defines */
#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS

7
include/configs/dns325.h
View file

@ -54,13 +54,6 @@
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif
/*
* RTC driver configuration
*/
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_MV
#endif
/*
* Enable GPI0 support
*/

7
include/configs/goflexhome.h
View file

@ -93,11 +93,4 @@
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#endif /*CONFIG_MVSATA_IDE*/
/*
* * RTC driver configuration
* */
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_MV
#endif /* CONFIG_CMD_DATE */
#endif /* _CONFIG_GOFLEXHOME_H */

7
include/configs/mv-plug-common.h
View file

@ -22,11 +22,4 @@
*/
#include "mv-common.h"
/*
* RTC driver configuration
*/
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_MV
#endif /* CONFIG_CMD_DATE */
#endif /* _CONFIG_MARVELL_PLUG_H */

2
include/configs/mvebu_armada-37xx.h
View file

@ -66,6 +66,8 @@
#define CONFIG_SF_DEFAULT_SPEED 1000000
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
/* Environment in SPI NOR flash */
#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */

7
include/configs/nas220.h
View file

@ -107,13 +107,6 @@
* EFI partition
*/
/*
* Date Time
*/
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_MV
#endif /* CONFIG_CMD_DATE */
#define CONFIG_KIRKWOOD_GPIO
#endif /* _CONFIG_NAS220_H */

4
include/configs/turris_omnia.h
View file

@ -93,13 +93,13 @@
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
#ifdef CONFIG_TURRIS_OMNIA_SPL_BOOT_DEVICE_SPI
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
/* SPL related SPI defines */
# define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#ifdef CONFIG_TURRIS_OMNIA_SPL_BOOT_DEVICE_MMC
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC
/* SPL related MMC defines */
# define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS

6
tools/kwboot.c
View file

@ -182,7 +182,7 @@ kwboot_tty_recv(int fd, void *buf, size_t len, int timeo)
}
n = read(fd, buf, len);
if (n < 0)
if (n <= 0)
goto out;
buf = (char *)buf + n;
@ -466,7 +466,7 @@ kwboot_term_pipe(int in, int out, char *quit, int *s)
char _buf[128], *buf = _buf;
nin = read(in, buf, sizeof(buf));
if (nin < 0)
if (nin <= 0)
return -1;
if (quit) {
@ -821,7 +821,7 @@ main(int argc, char **argv)
perror("debugmsg");
goto out;
}
} else {
} else if (bootmsg) {
rc = kwboot_bootmsg(tty, bootmsg);
if (rc) {
perror("bootmsg");