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x86: qemu: Fix compiler warnings for 64-bit

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This fixes compiler warnings for QEMU in 64-bit.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2017-01-18 03:32:56 -08:00
parent e760feb19f
commit 63767071d9
2 changed files with 4 additions and 4 deletions
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6
arch/x86/cpu/irq.c
View file

@ -26,7 +26,7 @@ bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq)
if (priv->config == PIRQ_VIA_PCI)
dm_pci_read_config8(dev->parent, LINK_N2V(link, base), &pirq);
else
pirq = readb(priv->ibase + LINK_N2V(link, base));
pirq = readb((uintptr_t)priv->ibase + LINK_N2V(link, base));
pirq &= 0xf;
@ -56,7 +56,7 @@ void pirq_assign_irq(struct udevice *dev, int link, u8 irq)
if (priv->config == PIRQ_VIA_PCI)
dm_pci_write_config8(dev->parent, LINK_N2V(link, base), irq);
else
writeb(irq, priv->ibase + LINK_N2V(link, base));
writeb(irq, (uintptr_t)priv->ibase + LINK_N2V(link, base));
}
static struct irq_info *check_dup_entry(struct irq_info *slot_base,
@ -234,7 +234,7 @@ static void irq_enable_sci(struct udevice *dev)
if (priv->config == PIRQ_VIA_PCI)
dm_pci_write_config32(dev->parent, priv->actl_addr, 0);
else
writel(0, priv->ibase + priv->actl_addr);
writel(0, (uintptr_t)priv->ibase + priv->actl_addr);
}
}

2
arch/x86/cpu/qemu/qemu.c
View file

@ -47,7 +47,7 @@ static void qemu_x86_fwcfg_read_entry_pio(uint16_t entry,
static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
{
/* the DMA address register is big endian */
outl(cpu_to_be32((uint32_t)dma), FW_DMA_PORT_HIGH);
outl(cpu_to_be32((uintptr_t)dma), FW_DMA_PORT_HIGH);
while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
__asm__ __volatile__ ("pause");