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mtd: nand: mxs_nand: add support for specific ECC strength
Add support for specified ECC strength/size using device tree properties nand-ecc-strength/nand-ecc-step-size. This aligns behavior with the mainline driver, such that: - If fsl,use-minimal-ecc is requested it will use data from data sheet/ONFI. If this is not available the driver will fail. - If nand-ecc-strength/nand-ecc-step-size are specified those value will be used. - By default maximum possible ECC strength is used Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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parent
f75e83bfae
commit
627544506f
1 changed files with 30 additions and 14 deletions
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@ -161,15 +161,14 @@ static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo,
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}
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static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
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struct mtd_info *mtd)
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struct mtd_info *mtd,
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unsigned int ecc_strength,
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unsigned int ecc_step)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
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if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
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return -ENOTSUPP;
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switch (chip->ecc_step_ds) {
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switch (ecc_step) {
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case SZ_512:
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geo->gf_len = 13;
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break;
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@ -180,8 +179,8 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
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return -EINVAL;
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}
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geo->ecc_chunk_size = chip->ecc_step_ds;
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geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
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geo->ecc_chunk_size = ecc_step;
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geo->ecc_strength = round_up(ecc_strength, 2);
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/* Keep the C >= O */
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if (geo->ecc_chunk_size < mtd->oobsize)
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@ -964,6 +963,28 @@ static int mxs_nand_block_bad(struct mtd_info *mtd, loff_t ofs)
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return 0;
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}
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static int mxs_nand_set_geometry(struct mtd_info *mtd, struct bch_geometry *geo)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct nand_chip *nand = mtd_to_nand(mtd);
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struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
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if (chip->ecc.strength > 0 && chip->ecc.size > 0)
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return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
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chip->ecc.strength, chip->ecc.size);
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if (nand_info->use_minimum_ecc ||
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mxs_nand_calc_ecc_layout(geo, mtd)) {
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if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
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return -EINVAL;
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return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
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chip->ecc_strength_ds, chip->ecc_step_ds);
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}
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return 0;
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}
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/*
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* At this point, the physical NAND Flash chips have been identified and
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* counted, so we know the physical geometry. This enables us to make some
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@ -980,14 +1001,9 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
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struct bch_geometry *geo = &nand_info->bch_geometry;
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struct mxs_bch_regs *bch_regs = nand_info->bch_regs;
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uint32_t tmp;
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int ret = -ENOTSUPP;
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if (nand_info->use_minimum_ecc)
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ret = mxs_nand_calc_ecc_layout_by_info(geo, mtd);
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if (ret == -ENOTSUPP)
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ret = mxs_nand_calc_ecc_layout(geo, mtd);
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int ret;
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ret = mxs_nand_set_geometry(mtd, geo);
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if (ret)
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return ret;
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