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Xilinx Kconfig changes for v2018.03

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- Moving some macros to Kconfig
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlqYIDYACgkQykllyylKDCGX3QCffsdnNpH+uOFZKhxX1bfBz83w
 3Y4An1SyCmi/Tco0MaYVgjoJW2O/P5Bm
 =Zgr8
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx Kconfig changes for v2018.03

- Moving some macros to Kconfig

# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>"
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>"
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
This commit is contained in:
Tom Rini 2018-03-01 12:41:21 -05:00
commit 6256b02db3
28 changed files with 97 additions and 35 deletions
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3
arch/arm/cpu/armv8/zynqmp/Kconfig
View file

@ -96,6 +96,9 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Overwrite bootmode selected via boot mode pins to tell SPL what should Overwrite bootmode selected via boot mode pins to tell SPL what should
be the next boot device. be the next boot device.
config ZYNQ_SDHCI_MAX_FREQ
default 200000000
config SPL_ZYNQMP_ALT_BOOTMODE config SPL_ZYNQMP_ALT_BOOTMODE
hex hex
default 0x0 if JTAG_MODE default 0x0 if JTAG_MODE

3
arch/arm/mach-zynq/Kconfig
View file

@ -63,4 +63,7 @@ config BOOT_INIT_FILE
Add register writes to boot.bin format (max 256 pairs). Add register writes to boot.bin format (max 256 pairs).
Expect a table of register-value pairs, e.g. "0x12345678 0x4321" Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
config ZYNQ_SDHCI_MAX_FREQ
default 52000000
endif endif

1
configs/microblaze-generic_defconfig
View file

@ -46,6 +46,7 @@ CONFIG_BOOTP_BOOTPATH=y
CONFIG_BOOTP_GATEWAY=y CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y CONFIG_BOOTP_HOSTNAME=y
CONFIG_SPL_DM=y CONFIG_SPL_DM=y
CONFIG_XILINX_GPIO=y
CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_NOR_FLASH=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y
CONFIG_PHY_BROADCOM=y CONFIG_PHY_BROADCOM=y

3
configs/syzygy_hub_defconfig
View file

@ -35,6 +35,9 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C1=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_PHY_MARVELL=y CONFIG_PHY_MARVELL=y

3
configs/topic_miami_defconfig
View file

@ -32,6 +32,9 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

3
configs/topic_miamilite_defconfig
View file

@ -32,6 +32,9 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

3
configs/topic_miamiplus_defconfig
View file

@ -30,6 +30,9 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

2
configs/xilinx_zynqmp_ep_defconfig
View file

@ -3,6 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep"
CONFIG_ARCH_ZYNQMP=y CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_ZYNQ_SDHCI_MAX_FREQ=52000000
CONFIG_ZYNQMP_USB=y CONFIG_ZYNQMP_USB=y
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART=y
@ -61,6 +62,7 @@ CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
CONFIG_NAND=y CONFIG_NAND=y
CONFIG_NAND_ARASAN=y CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

4
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
View file

@ -53,7 +53,11 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

4
configs/xilinx_zynqmp_zcu102_revA_defconfig
View file

@ -53,7 +53,11 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

4
configs/xilinx_zynqmp_zcu102_revB_defconfig
View file

@ -53,7 +53,11 @@ CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQMPPL=y CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_CMD_PCA953X=y CONFIG_CMD_PCA953X=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y

2
configs/zynq_zc702_defconfig
View file

@ -41,6 +41,8 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

2
configs/zynq_zc706_defconfig
View file

@ -41,6 +41,8 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

4
configs/zynq_zybo_defconfig
View file

@ -40,6 +40,10 @@ CONFIG_DFU_RAM=y
CONFIG_FPGA_XILINX=y CONFIG_FPGA_XILINX=y
CONFIG_FPGA_ZYNQPL=y CONFIG_FPGA_ZYNQPL=y
CONFIG_DM_GPIO=y CONFIG_DM_GPIO=y
CONFIG_SYS_I2C_ZYNQ=y
CONFIG_ZYNQ_I2C0=y
CONFIG_ZYNQ_I2C1=y
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI_ZYNQ=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y

5
drivers/gpio/Kconfig
View file

@ -183,6 +183,11 @@ config SANDBOX_GPIO_COUNT
of 'anonymous' GPIOs that do not belong to any device or bank. of 'anonymous' GPIOs that do not belong to any device or bank.
Select a suitable value depending on your needs. Select a suitable value depending on your needs.
config XILINX_GPIO
bool "Xilinx GPIO driver"
help
This config enable the Xilinx GPIO driver for Microblaze.
config CMD_TCA642X config CMD_TCA642X
bool "tca642x - Command to access tca642x state" bool "tca642x - Command to access tca642x state"
help help

32
drivers/i2c/Kconfig
View file

@ -268,6 +268,38 @@ config SYS_I2C_BUS_MAX
help help
Define the maximum number of available I2C buses. Define the maximum number of available I2C buses.
config SYS_I2C_ZYNQ
bool "Xilinx I2C driver"
depends on ARCH_ZYNQMP || ARCH_ZYNQ
help
Support for Xilinx I2C controller.
config SYS_I2C_ZYNQ_SLAVE
hex "Set slave addr"
depends on SYS_I2C_ZYNQ
default 0
help
Set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr.
config SYS_I2C_ZYNQ_SPEED
int "Set I2C speed"
depends on SYS_I2C_ZYNQ
default 100000
help
Set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting.
config ZYNQ_I2C0
bool "Xilinx I2C0 controller"
depends on SYS_I2C_ZYNQ
help
Enable Xilinx I2C0 controller.
config ZYNQ_I2C1
bool "Xilinx I2C1 controller"
depends on SYS_I2C_ZYNQ
help
Enable Xilinx I2C1 controller.
config SYS_I2C_IHS config SYS_I2C_IHS
bool "gdsys IHS I2C driver" bool "gdsys IHS I2C driver"
depends on DM_I2C depends on DM_I2C

6
drivers/misc/Kconfig
View file

@ -214,6 +214,12 @@ config SPL_I2C_EEPROM
This option is an SPL-variant of the I2C_EEPROM option. This option is an SPL-variant of the I2C_EEPROM option.
See the help of I2C_EEPROM for details. See the help of I2C_EEPROM for details.
config ZYNQ_GEM_I2C_MAC_OFFSET
hex "Set the I2C MAC offset"
default 0x0
help
Set the MAC offset for i2C.
if I2C_EEPROM if I2C_EEPROM
config SYS_I2C_EEPROM_ADDR config SYS_I2C_EEPROM_ADDR

13
drivers/mmc/Kconfig
View file

@ -481,6 +481,19 @@ config MMC_SDHCI_ZYNQ
help help
Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform
config ZYNQ_SDHCI_MAX_FREQ
int "Set the maximum frequency of the controller"
depends on MMC_SDHCI_ZYNQ
help
Set the maximum frequency of the controller.
config ZYNQ_SDHCI_MIN_FREQ
int "Set the minimum frequency of the controller"
depends on MMC_SDHCI_ZYNQ
default 0
help
Set the minimum frequency of the controller.
config MMC_SUNXI config MMC_SUNXI
bool "Allwinner sunxi SD/MMC Host Controller support" bool "Allwinner sunxi SD/MMC Host Controller support"
depends on ARCH_SUNXI && !UART0_PORT_F depends on ARCH_SUNXI && !UART0_PORT_F

4
drivers/mmc/zynq_sdhci.c
View file

@ -16,10 +16,6 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ
# define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0
#endif
struct arasan_sdhci_plat { struct arasan_sdhci_plat {
struct mmc_config cfg; struct mmc_config cfg;
struct mmc mmc; struct mmc mmc;

1
include/configs/microblaze-generic.h
View file

@ -41,7 +41,6 @@
/* gpio */ /* gpio */
#ifdef XILINX_GPIO_BASEADDR #ifdef XILINX_GPIO_BASEADDR
# define CONFIG_XILINX_GPIO
# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
#endif #endif

2
include/configs/syzygy_hub.h
View file

@ -11,10 +11,8 @@
#ifndef __CONFIG_SYZYGY_HUB_H #ifndef __CONFIG_SYZYGY_HUB_H
#define __CONFIG_SYZYGY_HUB_H #define __CONFIG_SYZYGY_HUB_H
#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x57 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x57
#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
"fit_image=fit.itb\0" \ "fit_image=fit.itb\0" \

2
include/configs/topic_miami.h
View file

@ -10,8 +10,6 @@
#ifndef __CONFIG_TOPIC_MIAMI_H #ifndef __CONFIG_TOPIC_MIAMI_H
#define __CONFIG_TOPIC_MIAMI_H #define __CONFIG_TOPIC_MIAMI_H
#define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_I2C1
/* Speed up boot time by ignoring the environment which we never used */ /* Speed up boot time by ignoring the environment which we never used */

5
include/configs/xilinx_zynqmp.h
View file

@ -56,9 +56,6 @@
#if defined(CONFIG_MMC_SDHCI_ZYNQ) #if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_SUPPORT_EMMC_BOOT # define CONFIG_SUPPORT_EMMC_BOOT
# ifndef CONFIG_ZYNQ_SDHCI_MAX_FREQ
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 200000000
# endif
#endif #endif
#ifdef CONFIG_NAND_ARASAN #ifdef CONFIG_NAND_ARASAN
@ -126,8 +123,6 @@
/* I2C */ /* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ) #if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C # define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
#endif #endif
/* EEPROM */ /* EEPROM */

2
include/configs/xilinx_zynqmp_ep.h
View file

@ -13,8 +13,6 @@
#ifndef __CONFIG_ZYNQMP_EP_H #ifndef __CONFIG_ZYNQMP_EP_H
#define __CONFIG_ZYNQMP_EP_H #define __CONFIG_ZYNQMP_EP_H
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_EEPROM
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR} ZYNQMP_USB1_XHCI_BASEADDR}

4
include/configs/xilinx_zynqmp_zcu102.h
View file

@ -11,8 +11,6 @@
#define __CONFIG_ZYNQMP_ZCU102_H #define __CONFIG_ZYNQMP_ZCU102_H
#define CONFIG_ZYNQ_SDHCI1 #define CONFIG_ZYNQ_SDHCI1
#define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_NUM_I2C_BUSES 18 #define CONFIG_SYS_NUM_I2C_BUSES 18
#define CONFIG_SYS_I2C_BUSES { \ #define CONFIG_SYS_I2C_BUSES { \
@ -36,7 +34,6 @@
{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \ {1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
} }
#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_PCA953X #define CONFIG_PCA953X
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
@ -44,7 +41,6 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_EEPROM_BUS 5 #define CONFIG_ZYNQ_EEPROM_BUS 5
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0x20
#include <configs/xilinx_zynqmp.h> #include <configs/xilinx_zynqmp.h>

11
include/configs/zynq-common.h
View file

@ -73,11 +73,6 @@
#define CONFIG_MTD_DEVICE #define CONFIG_MTD_DEVICE
#endif #endif
/* MMC */
#if defined(CONFIG_MMC_SDHCI_ZYNQ)
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#endif
#ifdef CONFIG_USB_EHCI_ZYNQ #ifdef CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI # define CONFIG_EHCI_IS_TDI
@ -117,15 +112,9 @@
# define DFU_ALT_INFO # define DFU_ALT_INFO
#endif #endif
#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
#define CONFIG_SYS_I2C_ZYNQ
#endif
/* I2C */ /* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ) #if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_SYS_I2C # define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
#endif #endif
/* EEPROM */ /* EEPROM */

1
include/configs/zynq_zc70x.h
View file

@ -10,7 +10,6 @@
#ifndef __CONFIG_ZYNQ_ZC70X_H #ifndef __CONFIG_ZYNQ_ZC70X_H
#define __CONFIG_ZYNQ_ZC70X_H #define __CONFIG_ZYNQ_ZC70X_H
#define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_EEPROM
#include <configs/zynq-common.h> #include <configs/zynq-common.h>

3
include/configs/zynq_zybo.h
View file

@ -11,11 +11,8 @@
#ifndef __CONFIG_ZYNQ_ZYBO_H #ifndef __CONFIG_ZYNQ_ZYBO_H
#define __CONFIG_ZYNQ_ZYBO_H #define __CONFIG_ZYNQ_ZYBO_H
#define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x50 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x50
#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA
#define CONFIG_DISPLAY #define CONFIG_DISPLAY
#define CONFIG_I2C_EDID #define CONFIG_I2C_EDID