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global: Migrate CONFIG_USART_ID to CFG
Perform a simple rename of CONFIG_USART_ID to CFG_USART_ID Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
805482d187
commit
61693acbce
7 changed files with 7 additions and 7 deletions
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@ -73,7 +73,7 @@ static void atmel_serial_activate(atmel_usart3_t *usart)
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static void atmel_serial_setbrg(void)
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static void atmel_serial_setbrg(void)
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{
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{
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atmel_serial_setbrg_internal((atmel_usart3_t *)CFG_USART_BASE,
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atmel_serial_setbrg_internal((atmel_usart3_t *)CFG_USART_BASE,
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CONFIG_USART_ID, gd->baudrate);
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CFG_USART_ID, gd->baudrate);
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}
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}
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static int atmel_serial_init(void)
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static int atmel_serial_init(void)
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@ -29,7 +29,7 @@
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/* serial console */
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/* serial console */
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CFG_USART_ID ATMEL_ID_SYS
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/* SDRAM */
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/* SDRAM */
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#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6
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#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6
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@ -14,7 +14,7 @@
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#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */
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#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID 0 /* ignored in arm */
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#define CFG_USART_ID 0 /* ignored in arm */
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/* SDRAM */
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/* SDRAM */
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#define CFG_SYS_SDRAM_BASE 0x20000000
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#define CFG_SYS_SDRAM_BASE 0x20000000
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@ -15,7 +15,7 @@
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#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */
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#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID 0 /* ignored in arm */
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#define CFG_USART_ID 0 /* ignored in arm */
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/*
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/*
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* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
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* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
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@ -62,7 +62,7 @@
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/* serial console */
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/* serial console */
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CFG_USART_ID ATMEL_ID_SYS
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/* DFU class support */
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/* DFU class support */
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#define DFU_MANIFEST_POLL_TIMEOUT 25000
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#define DFU_MANIFEST_POLL_TIMEOUT 25000
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@ -35,7 +35,7 @@
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/* Misc CPU related */
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/* Misc CPU related */
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CFG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID ATMEL_ID_SYS
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#define CFG_USART_ID ATMEL_ID_SYS
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/*
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/*
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* SDRAM: 1 bank, min 32, max 128 MB
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* SDRAM: 1 bank, min 32, max 128 MB
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@ -18,7 +18,7 @@
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/* serial console */
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/* serial console */
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#define CFG_USART_BASE 0xfc00c000
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#define CFG_USART_BASE 0xfc00c000
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#define CONFIG_USART_ID 30
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#define CFG_USART_ID 30
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/* Timer */
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/* Timer */
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#define CFG_SYS_TIMER_COUNTER 0xfc06863c
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#define CFG_SYS_TIMER_COUNTER 0xfc06863c
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