From 611fe095776b3a6d4e98058cab16955d35f7021b Mon Sep 17 00:00:00 2001 From: "Chia-Wei, Wang" Date: Mon, 3 Aug 2020 17:36:06 +0800 Subject: [PATCH] aspeed: ast2500: Add lowlevel_init assembly The original lowlevel_init function of AST2500 is written in C. However, the C runtime environment is not ready until _main execution. This patch adds the assembly version of the lowlevel_init function. Additional initialization to DRAM configuration and LPC reset source are also added. Signed-off-by: Chia-Wei, Wang --- arch/arm/mach-aspeed/ast2500-board.c | 25 ------------ arch/arm/mach-aspeed/ast2500/Makefile | 1 + arch/arm/mach-aspeed/ast2500/lowlevel_init.S | 41 ++++++++++++++++++++ 3 files changed, 42 insertions(+), 25 deletions(-) create mode 100644 arch/arm/mach-aspeed/ast2500/lowlevel_init.S diff --git a/arch/arm/mach-aspeed/ast2500-board.c b/arch/arm/mach-aspeed/ast2500-board.c index f74dcbbb62..3482ee91ef 100644 --- a/arch/arm/mach-aspeed/ast2500-board.c +++ b/arch/arm/mach-aspeed/ast2500-board.c @@ -28,31 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; -void lowlevel_init(void) -{ - /* - * These two watchdogs need to be stopped as soon as possible, - * otherwise the board might hang. By default they are set to - * a very short timeout and even simple debug write to serial - * console early in the init process might cause them to fire. - */ - struct ast_wdt *flash_addr_wdt = - (struct ast_wdt *)(WDT_BASE + - sizeof(struct ast_wdt) * - AST_FLASH_ADDR_DETECT_WDT); - - clrbits_le32(&flash_addr_wdt->ctrl, WDT_CTRL_EN); - -#ifndef CONFIG_FIRMWARE_2ND_BOOT - struct ast_wdt *sec_boot_wdt = - (struct ast_wdt *)(WDT_BASE + - sizeof(struct ast_wdt) * - AST_2ND_BOOT_WDT); - - clrbits_le32(&sec_boot_wdt->ctrl, WDT_CTRL_EN); -#endif -} - int board_init(void) { gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; diff --git a/arch/arm/mach-aspeed/ast2500/Makefile b/arch/arm/mach-aspeed/ast2500/Makefile index a35b239ef3..2e9e15d831 100644 --- a/arch/arm/mach-aspeed/ast2500/Makefile +++ b/arch/arm/mach-aspeed/ast2500/Makefile @@ -1 +1,2 @@ +obj-y += lowlevel_init.o obj-y += clk_ast2500.o sdram_ast2500.o diff --git a/arch/arm/mach-aspeed/ast2500/lowlevel_init.S b/arch/arm/mach-aspeed/ast2500/lowlevel_init.S new file mode 100644 index 0000000000..9ec3dd46b7 --- /dev/null +++ b/arch/arm/mach-aspeed/ast2500/lowlevel_init.S @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) ASPEED Technology Inc. + */ +#include + +/* registers for low level init */ +#define SCU_PROT_KEY 0x1e6e2000 +#define SCU_VGA_HANDSHAKE 0x1e6e2040 +#define SCU_HW_STRAP 0x1e6e2070 +#define SCU_HW_STRAP_CLR 0x1e6e207c +#define WDT3_CTRL 0x1e78504c + +.global lowlevel_init +lowlevel_init: + + /* unlock SCU */ + ldr r0, =SCU_PROT_KEY + ldr r1, =SCU_UNLOCK_VALUE + str r1, [r0] + + /* set BMC FW as DRAM initializer */ + ldr r0, =SCU_VGA_HANDSHAKE + ldr r1, [r0] + orr r1, #0x80 + str r1, [r0] + + /* set PERST# as LPC reset source if eSPI mode is enabled*/ + ldr r0, =SCU_HW_STRAP + ldr r1, [r0] + tst r1, #(0x1 << 25) + ldrne r0, =SCU_HW_STRAP_CLR + movne r1, #(0x1 << 14) + strne r1, [r0] + + /* disable WDT3 for SPI 3/4 bytes auto-detection */ + ldr r0, =WDT3_CTRL + mov r1, #0x0 + str r1, [r0] + + mov pc, lr