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https://github.com/AsahiLinux/u-boot
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Fix I/O Macros and mini-app stubs for Nios-II
Patch by Scott McNutt 11, Aug 2005 -Fix asm/io.h macros -Eliminate use of CACHE_BYPASS in cpu code -Eliminate assembler warnings -Fix mini-app stubs and force no small data
This commit is contained in:
parent
9acb626fc1
commit
60e270a490
10 changed files with 58 additions and 43 deletions
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@ -2,6 +2,13 @@
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Changes since U-Boot 1.1.4:
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======================================================================
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* Fix I/O Macros and mini-app stubs for Nios-II
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Patch by Scott McNutt 11, Aug 2005
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-Fix asm/io.h macros
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-Eliminate use of CACHE_BYPASS in cpu code
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-Eliminate assembler warnings
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-Fix mini-app stubs and force no small data
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* Add MCF5282 support (without preloader)
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relocate ichache_State to ram
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u-boot can run from internal flash
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@ -25,7 +25,7 @@
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#if defined(CFG_NIOS_EPCSBASE)
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#include <command.h>
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#include <nios2.h>
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#include <asm/io.h>
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#include <nios2-io.h>
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#include <nios2-epcs.h>
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@ -72,8 +72,7 @@
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*/
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#define EPCS_TIMEOUT 100 /* 100 msec timeout */
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static nios_spi_t *epcs =
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(nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE);
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static nios_spi_t *epcs = (nios_spi_t *)CFG_NIOS_EPCSBASE;
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/***********************************************************************
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* Device access
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@ -81,16 +80,20 @@ static nios_spi_t *epcs =
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static int epcs_cs (int assert)
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{
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ulong start;
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unsigned tmp;
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if (assert) {
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epcs->control |= NIOS_SPI_SSO;
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tmp = readl (&epcs->control);
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writel (&epcs->control, tmp | NIOS_SPI_SSO);
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} else {
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/* Let all bits shift out */
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start = get_timer (0);
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while ((epcs->status & NIOS_SPI_TMT) == 0)
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while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0)
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if (get_timer (start) > EPCS_TIMEOUT)
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return (-1);
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epcs->control &= ~NIOS_SPI_SSO;
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tmp = readl (&epcs->control);
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writel (&epcs->control, tmp & ~NIOS_SPI_SSO);
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}
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return (0);
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}
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@ -100,10 +103,10 @@ static int epcs_tx (unsigned char c)
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ulong start;
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start = get_timer (0);
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while ((epcs->status & NIOS_SPI_TRDY) == 0)
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while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0)
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if (get_timer (start) > EPCS_TIMEOUT)
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return (-1);
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epcs->txdata = c;
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writel (&epcs->txdata, c);
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return (0);
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}
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@ -112,10 +115,10 @@ static int epcs_rx (void)
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ulong start;
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start = get_timer (0);
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while ((epcs->status & NIOS_SPI_RRDY) == 0)
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while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0)
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if (get_timer (start) > EPCS_TIMEOUT)
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return (-1);
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return (epcs->rxdata);
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return (readl (&epcs->rxdata));
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}
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static unsigned char bitrev[] = {
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@ -30,6 +30,9 @@
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.global _exception
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.set noat
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.set nobreak
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_exception:
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/* SAVE ALL REGS -- this allows trap and unimplemented
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* instruction handlers to be coded conveniently in C
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@ -27,6 +27,7 @@
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#include <nios2.h>
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#include <nios2-io.h>
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#include <asm/io.h>
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#include <asm/ptrace.h>
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#include <common.h>
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#include <command.h>
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@ -79,7 +80,7 @@ void tmr_isr (void *arg)
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/* Interrupt is cleared by writing anything to the
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* status register.
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*/
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tmr->status = 0;
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writel (&tmr->status, 0);
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timestamp += CFG_NIOS_TMRMS;
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#ifdef CONFIG_STATUS_LED
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status_led_tick(timestamp);
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@ -88,16 +89,17 @@ void tmr_isr (void *arg)
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static void tmr_init (void)
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{
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nios_timer_t *tmr =(nios_timer_t *)CACHE_BYPASS(CFG_NIOS_TMRBASE);
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nios_timer_t *tmr =(nios_timer_t *)CFG_NIOS_TMRBASE;
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writel (&tmr->status, 0);
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writel (&tmr->control, 0);
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writel (&tmr->control, NIOS_TIMER_STOP);
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tmr->control &= ~(NIOS_TIMER_START | NIOS_TIMER_ITO);
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tmr->control |= NIOS_TIMER_STOP;
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#if defined(CFG_NIOS_TMRCNT)
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tmr->periodl = CFG_NIOS_TMRCNT & 0xffff;
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tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff;
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writel (&tmr->periodl, CFG_NIOS_TMRCNT & 0xffff);
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writel (&tmr->periodh, (CFG_NIOS_TMRCNT >> 16) & 0xffff);
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#endif
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tmr->control |= ( NIOS_TIMER_ITO |
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NIOS_TIMER_CONT |
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writel (&tmr->control, NIOS_TIMER_ITO | NIOS_TIMER_CONT |
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NIOS_TIMER_START );
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irq_install_handler (CFG_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
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}
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@ -24,7 +24,7 @@
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#include <common.h>
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#include <watchdog.h>
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#include <nios2.h>
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#include <asm/io.h>
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#include <nios2-io.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -34,8 +34,7 @@ DECLARE_GLOBAL_DATA_PTR;
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*-----------------------------------------------------------------*/
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#if defined(CONFIG_CONSOLE_JTAG)
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static nios_jtag_t *jtag =
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(nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE);
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static nios_jtag_t *jtag = (nios_jtag_t *)CFG_NIOS_CONSOLE;
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void serial_setbrg( void ){ return; }
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int serial_init( void ) { return(0);}
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@ -44,9 +43,9 @@ void serial_putc (char c)
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{
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unsigned val;
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while (NIOS_JTAG_WSPACE (jtag->control) == 0)
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while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0)
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WATCHDOG_RESET ();
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jtag->data = (unsigned char)c;
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writel (&jtag->data, (unsigned char)c);
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}
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void serial_puts (const char *s)
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int serial_tstc (void)
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{
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return (jtag->control & NIOS_JTAG_RRDY);
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return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
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}
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int serial_getc (void)
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while (1) {
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WATCHDOG_RESET ();
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val = jtag->data;
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val = readl (&jtag->data);
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if (val & NIOS_JTAG_RVALID)
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break;
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}
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*-----------------------------------------------------------------*/
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#else
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static nios_uart_t *uart = (nios_uart_t *)
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CACHE_BYPASS(CFG_NIOS_CONSOLE);
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static nios_uart_t *uart = (nios_uart_t *) CFG_NIOS_CONSOLE;
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#if defined(CFG_NIOS_FIXEDBAUD)
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@ -98,7 +96,7 @@ void serial_setbrg (void)
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unsigned div;
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div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
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uart->divisor = div;
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writel (&uart->divisor,div);
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return;
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}
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@ -118,9 +116,9 @@ void serial_putc (char c)
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{
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if (c == '\n')
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serial_putc ('\r');
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while ((uart->status & NIOS_UART_TRDY) == 0)
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while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
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WATCHDOG_RESET ();
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uart->txdata = (unsigned char)c;
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writel (&uart->txdata,(unsigned char)c);
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}
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void serial_puts (const char *s)
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int serial_tstc (void)
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{
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return (uart->status & NIOS_UART_RRDY);
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return (readl (&uart->status) & NIOS_UART_RRDY);
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}
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int serial_getc (void)
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{
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while (serial_tstc () == 0)
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WATCHDOG_RESET ();
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return( uart->rxdata & 0x00ff );
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return (readl (&uart->rxdata) & 0x00ff );
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}
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#endif /* CONFIG_JTAG_CONSOLE */
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@ -26,20 +26,21 @@
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#if defined (CFG_NIOS_SYSID_BASE)
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#include <command.h>
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#include <nios2.h>
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#include <asm/io.h>
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#include <nios2-io.h>
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#include <linux/time.h>
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void display_sysid (void)
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{
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struct nios_sysid_t *sysid =
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(struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE);
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struct nios_sysid_t *sysid = (struct nios_sysid_t *)CFG_NIOS_SYSID_BASE;
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struct tm t;
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char asc[32];
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time_t stamp;
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localtime_r ((time_t *)&sysid->timestamp, &t);
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stamp = readl (&sysid->timestamp);
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localtime_r (&stamp, &t);
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asctime_r (&t, asc);
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printf ("SYSID : %08x, %s", sysid->id, asc);
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printf ("SYSID : %08x, %s", readl (&sysid->id), asc);
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}
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@ -42,7 +42,7 @@ LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 -T nios.lds
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endif
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ifeq ($(ARCH),nios2)
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LOAD_ADDR = 0x00800000 -L $(gcclibdir) -T nios2.lds
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LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds
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endif
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ifeq ($(ARCH),m68k)
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#x ":\n" \
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" movhi r8, %%hi(%0)\n" \
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" ori r8, r0, %%lo(%0)\n" \
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" add r8, r0, r15\n" \
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" add r8, r8, r15\n" \
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" ldw r8, 0(r8)\n" \
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" ldw r8, %1(r8)\n" \
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" jmp r8\n" \
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#define readl(addr)\
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({unsigned long val;\
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asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
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#define writeb(addr,val)\
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asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val))
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asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
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#define writew(addr,val)\
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asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val))
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asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
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#define writel(addr,val)\
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asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val))
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asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
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#define inb(addr) readb(addr)
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#define inw(addr) readw(addr)
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@ -23,4 +23,4 @@
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#
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PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
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PLATFORM_CPPFLAGS += -ffixed-r15
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PLATFORM_CPPFLAGS += -ffixed-r15 -G0
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