Fix I/O Macros and mini-app stubs for Nios-II

Patch by Scott McNutt 11, Aug 2005
 -Fix asm/io.h macros
 -Eliminate use of CACHE_BYPASS in cpu code
 -Eliminate assembler warnings
 -Fix mini-app stubs and force no small data
This commit is contained in:
Heiko Schocher 2006-04-20 12:38:41 +02:00
parent 9acb626fc1
commit 60e270a490
10 changed files with 58 additions and 43 deletions

View file

@ -2,6 +2,13 @@
Changes since U-Boot 1.1.4:
======================================================================
* Fix I/O Macros and mini-app stubs for Nios-II
Patch by Scott McNutt 11, Aug 2005
-Fix asm/io.h macros
-Eliminate use of CACHE_BYPASS in cpu code
-Eliminate assembler warnings
-Fix mini-app stubs and force no small data
* Add MCF5282 support (without preloader)
relocate ichache_State to ram
u-boot can run from internal flash

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@ -25,7 +25,7 @@
#if defined(CFG_NIOS_EPCSBASE)
#include <command.h>
#include <nios2.h>
#include <asm/io.h>
#include <nios2-io.h>
#include <nios2-epcs.h>
@ -72,8 +72,7 @@
*/
#define EPCS_TIMEOUT 100 /* 100 msec timeout */
static nios_spi_t *epcs =
(nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE);
static nios_spi_t *epcs = (nios_spi_t *)CFG_NIOS_EPCSBASE;
/***********************************************************************
* Device access
@ -81,16 +80,20 @@ static nios_spi_t *epcs =
static int epcs_cs (int assert)
{
ulong start;
unsigned tmp;
if (assert) {
epcs->control |= NIOS_SPI_SSO;
tmp = readl (&epcs->control);
writel (&epcs->control, tmp | NIOS_SPI_SSO);
} else {
/* Let all bits shift out */
start = get_timer (0);
while ((epcs->status & NIOS_SPI_TMT) == 0)
while ((readl (&epcs->status) & NIOS_SPI_TMT) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
epcs->control &= ~NIOS_SPI_SSO;
tmp = readl (&epcs->control);
writel (&epcs->control, tmp & ~NIOS_SPI_SSO);
}
return (0);
}
@ -100,10 +103,10 @@ static int epcs_tx (unsigned char c)
ulong start;
start = get_timer (0);
while ((epcs->status & NIOS_SPI_TRDY) == 0)
while ((readl (&epcs->status) & NIOS_SPI_TRDY) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
epcs->txdata = c;
writel (&epcs->txdata, c);
return (0);
}
@ -112,10 +115,10 @@ static int epcs_rx (void)
ulong start;
start = get_timer (0);
while ((epcs->status & NIOS_SPI_RRDY) == 0)
while ((readl (&epcs->status) & NIOS_SPI_RRDY) == 0)
if (get_timer (start) > EPCS_TIMEOUT)
return (-1);
return (epcs->rxdata);
return (readl (&epcs->rxdata));
}
static unsigned char bitrev[] = {

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@ -30,6 +30,9 @@
.global _exception
.set noat
.set nobreak
_exception:
/* SAVE ALL REGS -- this allows trap and unimplemented
* instruction handlers to be coded conveniently in C

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@ -27,6 +27,7 @@
#include <nios2.h>
#include <nios2-io.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <common.h>
#include <command.h>
@ -79,7 +80,7 @@ void tmr_isr (void *arg)
/* Interrupt is cleared by writing anything to the
* status register.
*/
tmr->status = 0;
writel (&tmr->status, 0);
timestamp += CFG_NIOS_TMRMS;
#ifdef CONFIG_STATUS_LED
status_led_tick(timestamp);
@ -88,16 +89,17 @@ void tmr_isr (void *arg)
static void tmr_init (void)
{
nios_timer_t *tmr =(nios_timer_t *)CACHE_BYPASS(CFG_NIOS_TMRBASE);
nios_timer_t *tmr =(nios_timer_t *)CFG_NIOS_TMRBASE;
writel (&tmr->status, 0);
writel (&tmr->control, 0);
writel (&tmr->control, NIOS_TIMER_STOP);
tmr->control &= ~(NIOS_TIMER_START | NIOS_TIMER_ITO);
tmr->control |= NIOS_TIMER_STOP;
#if defined(CFG_NIOS_TMRCNT)
tmr->periodl = CFG_NIOS_TMRCNT & 0xffff;
tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff;
writel (&tmr->periodl, CFG_NIOS_TMRCNT & 0xffff);
writel (&tmr->periodh, (CFG_NIOS_TMRCNT >> 16) & 0xffff);
#endif
tmr->control |= ( NIOS_TIMER_ITO |
NIOS_TIMER_CONT |
writel (&tmr->control, NIOS_TIMER_ITO | NIOS_TIMER_CONT |
NIOS_TIMER_START );
irq_install_handler (CFG_NIOS_TMRIRQ, tmr_isr, (void *)tmr);
}

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@ -24,7 +24,7 @@
#include <common.h>
#include <watchdog.h>
#include <nios2.h>
#include <asm/io.h>
#include <nios2-io.h>
DECLARE_GLOBAL_DATA_PTR;
@ -34,8 +34,7 @@ DECLARE_GLOBAL_DATA_PTR;
*-----------------------------------------------------------------*/
#if defined(CONFIG_CONSOLE_JTAG)
static nios_jtag_t *jtag =
(nios_jtag_t *)CACHE_BYPASS(CFG_NIOS_CONSOLE);
static nios_jtag_t *jtag = (nios_jtag_t *)CFG_NIOS_CONSOLE;
void serial_setbrg( void ){ return; }
int serial_init( void ) { return(0);}
@ -44,9 +43,9 @@ void serial_putc (char c)
{
unsigned val;
while (NIOS_JTAG_WSPACE (jtag->control) == 0)
while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0)
WATCHDOG_RESET ();
jtag->data = (unsigned char)c;
writel (&jtag->data, (unsigned char)c);
}
void serial_puts (const char *s)
@ -57,7 +56,7 @@ void serial_puts (const char *s)
int serial_tstc (void)
{
return (jtag->control & NIOS_JTAG_RRDY);
return ( readl (&jtag->control) & NIOS_JTAG_RRDY);
}
int serial_getc (void)
@ -67,7 +66,7 @@ int serial_getc (void)
while (1) {
WATCHDOG_RESET ();
val = jtag->data;
val = readl (&jtag->data);
if (val & NIOS_JTAG_RVALID)
break;
}
@ -80,8 +79,7 @@ int serial_getc (void)
*-----------------------------------------------------------------*/
#else
static nios_uart_t *uart = (nios_uart_t *)
CACHE_BYPASS(CFG_NIOS_CONSOLE);
static nios_uart_t *uart = (nios_uart_t *) CFG_NIOS_CONSOLE;
#if defined(CFG_NIOS_FIXEDBAUD)
@ -98,7 +96,7 @@ void serial_setbrg (void)
unsigned div;
div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1;
uart->divisor = div;
writel (&uart->divisor,div);
return;
}
@ -118,9 +116,9 @@ void serial_putc (char c)
{
if (c == '\n')
serial_putc ('\r');
while ((uart->status & NIOS_UART_TRDY) == 0)
while ((readl (&uart->status) & NIOS_UART_TRDY) == 0)
WATCHDOG_RESET ();
uart->txdata = (unsigned char)c;
writel (&uart->txdata,(unsigned char)c);
}
void serial_puts (const char *s)
@ -132,14 +130,14 @@ void serial_puts (const char *s)
int serial_tstc (void)
{
return (uart->status & NIOS_UART_RRDY);
return (readl (&uart->status) & NIOS_UART_RRDY);
}
int serial_getc (void)
{
while (serial_tstc () == 0)
WATCHDOG_RESET ();
return( uart->rxdata & 0x00ff );
return (readl (&uart->rxdata) & 0x00ff );
}
#endif /* CONFIG_JTAG_CONSOLE */

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@ -26,20 +26,21 @@
#if defined (CFG_NIOS_SYSID_BASE)
#include <command.h>
#include <nios2.h>
#include <asm/io.h>
#include <nios2-io.h>
#include <linux/time.h>
void display_sysid (void)
{
struct nios_sysid_t *sysid =
(struct nios_sysid_t *)CACHE_BYPASS(CFG_NIOS_SYSID_BASE);
struct nios_sysid_t *sysid = (struct nios_sysid_t *)CFG_NIOS_SYSID_BASE;
struct tm t;
char asc[32];
time_t stamp;
localtime_r ((time_t *)&sysid->timestamp, &t);
stamp = readl (&sysid->timestamp);
localtime_r (&stamp, &t);
asctime_r (&t, asc);
printf ("SYSID : %08x, %s", sysid->id, asc);
printf ("SYSID : %08x, %s", readl (&sysid->id), asc);
}

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@ -42,7 +42,7 @@ LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 -T nios.lds
endif
ifeq ($(ARCH),nios2)
LOAD_ADDR = 0x00800000 -L $(gcclibdir) -T nios2.lds
LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds
endif
ifeq ($(ARCH),m68k)

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@ -92,7 +92,7 @@ gd_t *global_data;
#x ":\n" \
" movhi r8, %%hi(%0)\n" \
" ori r8, r0, %%lo(%0)\n" \
" add r8, r0, r15\n" \
" add r8, r8, r15\n" \
" ldw r8, 0(r8)\n" \
" ldw r8, %1(r8)\n" \
" jmp r8\n" \

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@ -39,12 +39,13 @@ extern unsigned inl (unsigned port);
#define readl(addr)\
({unsigned long val;\
asm volatile( "ldwio %0, 0(%1)" :"=r"(val) : "r" (addr)); val;})
#define writeb(addr,val)\
asm volatile ("stbio %0, 0(%1)" : : "r" (addr), "r" (val))
asm volatile ("stbio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writew(addr,val)\
asm volatile ("sthio %0, 0(%1)" : : "r" (addr), "r" (val))
asm volatile ("sthio %1, 0(%0)" : : "r" (addr), "r" (val))
#define writel(addr,val)\
asm volatile ("stwio %0, 0(%1)" : : "r" (addr), "r" (val))
asm volatile ("stwio %1, 0(%0)" : : "r" (addr), "r" (val))
#define inb(addr) readb(addr)
#define inw(addr) readw(addr)

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@ -23,4 +23,4 @@
#
PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
PLATFORM_CPPFLAGS += -ffixed-r15
PLATFORM_CPPFLAGS += -ffixed-r15 -G0