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Move CONFIG_FSL_ESDHC to defconfig

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Moved CONFIG_FSL_ESDHC from header files to defconfig files.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
This commit is contained in:
Yangbo Lu 2019-06-21 11:42:26 +08:00 committed by Peng Fan
parent bdf97b5d39
commit 60742bfb53
22 changed files with 14 additions and 14 deletions
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1
configs/apalis-imx8qm_defconfig
View file

@ -35,6 +35,7 @@ CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL=y

1
configs/colibri-imx8qxp_defconfig
View file

@ -34,6 +34,7 @@ CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_SYS_I2C_IMX_LPI2C=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL=y

1
configs/imx8mq_evk_defconfig
View file

@ -30,6 +30,7 @@ CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y CONFIG_SYS_I2C_MXC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_DM_ETH=y CONFIG_DM_ETH=y
CONFIG_PINCTRL=y CONFIG_PINCTRL=y

1
configs/imx8qm_mek_defconfig
View file

@ -51,6 +51,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y

1
configs/imx8qxp_mek_defconfig
View file

@ -55,6 +55,7 @@ CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y CONFIG_MISC=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y

1
configs/kp_imx6q_tpc_defconfig
View file

@ -34,6 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_ISO_PARTITION is not set # CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set # CONFIG_EFI_PARTITION is not set
CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y CONFIG_PHY_ATHEROS=y
CONFIG_FEC_MXC=y CONFIG_FEC_MXC=y

1
configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
View file

@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
# CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_BAR is not set

1
configs/ls1012afrwy_qspi_defconfig
View file

@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y

1
configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
View file

@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
# CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_BAR is not set

1
configs/ls1012afrwy_tfa_defconfig
View file

@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y CONFIG_DM=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
# CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_BAR is not set

1
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
View file

@ -32,6 +32,7 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

1
configs/ls1028aqds_tfa_defconfig
View file

@ -35,6 +35,7 @@ CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

1
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
View file

@ -32,6 +32,7 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

1
configs/ls1028ardb_tfa_defconfig
View file

@ -35,6 +35,7 @@ CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_DM_MMC=y CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

1
include/configs/apalis-imx8.h
View file

@ -15,7 +15,6 @@
#undef CONFIG_BOOTM_NETBSD #undef CONFIG_BOOTM_NETBSD
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5b010000 #define USDHC1_BASE_ADDR 0x5b010000

1
include/configs/colibri-imx8x.h
View file

@ -15,7 +15,6 @@
#undef CONFIG_BOOTM_NETBSD #undef CONFIG_BOOTM_NETBSD
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5b010000 #define USDHC1_BASE_ADDR 0x5b010000

1
include/configs/imx8mq_evk.h
View file

@ -216,7 +216,6 @@
#define CONFIG_IMX_BOOTAUX #define CONFIG_IMX_BOOTAUX
#define CONFIG_CMD_MMC #define CONFIG_CMD_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2

1
include/configs/imx8qm_mek.h
View file

@ -47,7 +47,6 @@
#undef CONFIG_CMD_CRC32 #undef CONFIG_CMD_CRC32
#undef CONFIG_BOOTM_NETBSD #undef CONFIG_BOOTM_NETBSD
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000 #define USDHC1_BASE_ADDR 0x5B010000

1
include/configs/imx8qxp_mek.h
View file

@ -46,7 +46,6 @@
#undef CONFIG_CMD_CRC32 #undef CONFIG_CMD_CRC32
#undef CONFIG_BOOTM_NETBSD #undef CONFIG_BOOTM_NETBSD
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000 #define USDHC1_BASE_ADDR 0x5B010000

1
include/configs/kp_imx6q_tpc.h
View file

@ -39,7 +39,6 @@
#define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */ /* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2

1
include/configs/ls1012afrwy.h
View file

@ -41,7 +41,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif #endif

7
include/configs/ls1028a_common.h
View file

@ -164,7 +164,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif #endif
@ -178,12 +177,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/* MMC */
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
/* I2C bus multiplexer */ /* I2C bus multiplexer */
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
#define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH_DEFAULT 0x8