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Merge tag 'u-boot-rockchip-20200628' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

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- rk3188 cpu init and APLL fix;
- rk3399: Add BOOTENV_SF command;
- rk3288 correct vop0 vop1 setting;
This commit is contained in:
Tom Rini 2020-06-28 10:12:07 -04:00
commit 5f99ba1e24
4 changed files with 24 additions and 4 deletions
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21
arch/arm/mach-rockchip/rk3188/rk3188.c
View file

@ -77,15 +77,32 @@ int arch_cpu_init(void)
BYPASSSEL_MASK | BYPASSDMEN_MASK,
1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
#endif
return 0;
}
#endif
__weak int rk3188_board_late_init(void)
{
return 0;
}
int rk_board_late_init(void)
{
struct rk3188_grf *grf;
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
if (IS_ERR(grf)) {
pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
return 0;
}
/* enable noc remap to mimic legacy loaders */
rk_clrsetreg(&grf->soc_con0,
NOC_REMAP_MASK << NOC_REMAP_SHIFT,
NOC_REMAP_MASK << NOC_REMAP_SHIFT);
return 0;
return rk3188_board_late_init();
}
#endif
#ifdef CONFIG_SPL_BUILD
static int setup_led(void)

3
drivers/clk/rockchip/clk_rk3188.c
View file

@ -569,7 +569,8 @@ static int rk3188_clk_probe(struct udevice *dev)
rkclk_init(priv->cru, priv->grf, priv->has_bwadj);
/* Init CPU frequency */
rkclk_configure_cpu(priv->cru, priv->grf, APLL_HZ, priv->has_bwadj);
rkclk_configure_cpu(priv->cru, priv->grf, APLL_SAFE_HZ,
priv->has_bwadj);
#endif
return 0;

3
drivers/video/rockchip/rk_edp.c
View file

@ -1062,7 +1062,8 @@ static int rk_edp_probe(struct udevice *dev)
rk_setreg(&priv->grf->soc_con12, 1 << 4);
/* select epd signal from vop0 or vop1 */
rk_setreg(&priv->grf->soc_con6, (vop_id == 1) ? (1 << 5) : (1 << 5));
rk_clrsetreg(&priv->grf->soc_con6, (1 << 5),
(vop_id == 1) ? (1 << 5) : (0 << 5));
rockchip_edp_wait_hpd(priv);

1
include/configs/rk3399_common.h
View file

@ -67,6 +67,7 @@
"partitions=" PARTS_DEFAULT \
ROCKCHIP_DEVICE_SETTINGS \
BOOTENV \
BOOTENV_SF \
"altbootcmd=" \
"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
"run distro_bootcmd\0"