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ddr: imx9: enable Performance monitor counter
Add Kconfig for enabling reference events counter in DDRC performance monitor by default Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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2 changed files with 10 additions and 0 deletions
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@ -11,6 +11,12 @@ config IMX9_LPDDR4X
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help
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help
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Select the i.MX9 LPDDR4/4X driver support on i.MX9 SOC.
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Select the i.MX9 LPDDR4/4X driver support on i.MX9 SOC.
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config IMX9_DRAM_PM_COUNTER
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bool "imx9 DDRC performance monitor counter"
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default y
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help
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Enable DDR controller performance monitor counter for reference events.
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config SAVED_DRAM_TIMING_BASE
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config SAVED_DRAM_TIMING_BASE
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hex "Define the base address for saved dram timing"
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hex "Define the base address for saved dram timing"
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help
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help
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@ -112,6 +112,10 @@ int ddr_init(struct dram_timing_info *dram_timing)
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ddrc_config(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num);
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ddrc_config(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num);
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debug("DDRINFO: ddrc config done\n");
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debug("DDRINFO: ddrc config done\n");
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#ifdef CONFIG_IMX9_DRAM_PM_COUNTER
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writel(0x200000, REG_DDR_DEBUG_19);
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#endif
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check_dfi_init_complete();
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check_dfi_init_complete();
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regval = readl(REG_DDR_SDRAM_CFG);
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regval = readl(REG_DDR_SDRAM_CFG);
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