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samsung: exynos: Convert SROMC interface to a driver

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Add a bus driver for this and use it to configure the bus parameters for
the Ethernet interface. Drop the old pre-driver-model code.

Switch over to use driver model for Ethernet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Simon Glass 2021-07-18 19:02:40 -06:00 committed by Minkyu Kang
parent b70b9b0746
commit 5e19f4aa13
18 changed files with 79 additions and 119 deletions
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1
arch/arm/Kconfig
View file

@ -661,6 +661,7 @@ config ARCH_EXYNOS
select DM
select DM_GPIO
select DM_I2C
select DM_ETH
select DM_KEYBOARD
select DM_SERIAL
select DM_SPI

1
arch/arm/dts/exynos5250-smdk5250.dts
View file

@ -41,6 +41,7 @@
};
sromc@12250000 {
compatible = "samsung,exynos5-sromc";
bank = <1>;
srom-timing = <1 9 12 1 6 1 1>;
width = <2>;

18
arch/arm/mach-exynos/include/mach/sromc.h
View file

@ -33,22 +33,4 @@ struct s5p_sromc {
/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
enum {
FDT_SROM_PMC,
FDT_SROM_TACP,
FDT_SROM_TAH,
FDT_SROM_TCOH,
FDT_SROM_TACC,
FDT_SROM_TCOS,
FDT_SROM_TACS,
FDT_SROM_TIMING_COUNT,
};
struct fdt_sromc {
u8 bank; /* srom bank number */
u8 width; /* bus width in bytes */
unsigned int timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
};
#endif /* __ASM_ARCH_SROMC_H_ */

2
board/samsung/common/Makefile
View file

@ -7,7 +7,7 @@ obj-$(CONFIG_USB_GADGET_DOWNLOAD) += gadget.o
obj-$(CONFIG_MISC_COMMON) += misc.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_BOARD_COMMON) += board.o
obj-$(CONFIG_BOARD_COMMON) += board.o sromc.o
ifdef CONFIG_EXYNOS5_DT
obj-y += exynos5-dt.o
obj-$(CONFIG_BOARD_TYPES) += exynos5-dt-types.o

78
board/samsung/common/board.c
View file

@ -26,7 +26,6 @@
#include <asm/arch/pinmux.h>
#include <asm/arch/power.h>
#include <asm/arch/system.h>
#include <asm/arch/sromc.h>
#include <lcd.h>
#include <i2c.h>
#include <mmc.h>
@ -195,83 +194,6 @@ int power_init_board(void)
}
#endif
#ifdef CONFIG_SMC911X
static int decode_sromc(const void *blob, struct fdt_sromc *config)
{
int err;
int node;
node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
if (node < 0) {
debug("Could not find SROMC node\n");
return node;
}
config->bank = fdtdec_get_int(blob, node, "bank", 0);
config->width = fdtdec_get_int(blob, node, "width", 2);
err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
FDT_SROM_TIMING_COUNT);
if (err < 0) {
debug("Could not decode SROMC configuration Error: %s\n",
fdt_strerror(err));
return -FDT_ERR_NOTFOUND;
}
return 0;
}
#endif
int board_eth_init(struct bd_info *bis)
{
#ifdef CONFIG_SMC911X
u32 smc_bw_conf, smc_bc_conf;
struct fdt_sromc config;
fdt_addr_t base_addr;
int node;
node = decode_sromc(gd->fdt_blob, &config);
if (node < 0) {
debug("%s: Could not find sromc configuration\n", __func__);
return 0;
}
node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
if (node < 0) {
debug("%s: Could not find lan9215 configuration\n", __func__);
return 0;
}
/* We now have a node, so any problems from now on are errors */
base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
if (base_addr == FDT_ADDR_T_NONE) {
debug("%s: Could not find lan9215 address\n", __func__);
return -1;
}
/* Ethernet needs data bus width of 16 bits */
if (config.width != 2) {
debug("%s: Unsupported bus width %d\n", __func__,
config.width);
return -1;
}
smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
| SROMC_BYTE_ENABLE(config.bank);
smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
/* Select and configure the SROMC bank */
exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
return smc911x_initialize(0, base_addr);
#endif
return 0;
}
#if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
int checkboard(void)
{

76
board/samsung/common/sromc.c Normal file
View file

@ -0,0 +1,76 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2021 Google LLC
*/
#define LOG_CATEGORY UCLASS_ETH
#include <common.h>
#include <dm.h>
#include <log.h>
#include <asm/arch/pinmux.h>
#include <asm/arch/sromc.h>
enum {
FDT_SROM_PMC,
FDT_SROM_TACP,
FDT_SROM_TAH,
FDT_SROM_TCOH,
FDT_SROM_TACC,
FDT_SROM_TCOS,
FDT_SROM_TACS,
FDT_SROM_TIMING_COUNT,
};
static int exyno5_sromc_probe(struct udevice *dev)
{
u32 timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
u32 smc_bw_conf, smc_bc_conf;
int bank; /* srom bank number */
int width; /* bus width in bytes */
int ret;
if (!IS_ENABLED(CONFIG_SMC911X))
return 0;
bank = dev_read_s32_default(dev, "bank", 0);
width = dev_read_s32_default(dev, "width", 2);
/* Ethernet needs data bus width of 16 bits */
if (width != 2) {
log_debug("Unsupported bus width %d\n", width);
return log_msg_ret("width", -EINVAL);
}
ret = dev_read_u32_array(dev, "srom-timing", timing,
FDT_SROM_TIMING_COUNT);
if (ret)
return log_msg_ret("sromc", -EINVAL);
smc_bw_conf = SROMC_DATA16_WIDTH(bank) | SROMC_BYTE_ENABLE(bank);
smc_bc_conf = SROMC_BC_TACS(timing[FDT_SROM_TACS]) |
SROMC_BC_TCOS(timing[FDT_SROM_TCOS]) |
SROMC_BC_TACC(timing[FDT_SROM_TACC]) |
SROMC_BC_TCOH(timing[FDT_SROM_TCOH]) |
SROMC_BC_TAH(timing[FDT_SROM_TAH]) |
SROMC_BC_TACP(timing[FDT_SROM_TACP]) |
SROMC_BC_PMC(timing[FDT_SROM_PMC]);
/* Select and configure the SROMC bank */
exynos_pinmux_config(PERIPH_ID_SROMC, bank);
s5p_config_sromc(bank, smc_bw_conf, smc_bc_conf);
return 0;
}
static const struct udevice_id exyno5_sromc_ids[] = {
{ .compatible = "samsung,exynos5-sromc" },
{}
};
U_BOOT_DRIVER(exyno5_sromc) = {
.name = "exyno5_sromc",
.id = UCLASS_SIMPLE_BUS,
.of_match = exyno5_sromc_ids,
.probe = exyno5_sromc_probe,
};

9
board/samsung/smdkv310/smdkv310.c
View file

@ -73,15 +73,6 @@ int dram_init_banksize(void)
return 0;
}
int board_eth_init(struct bd_info *bis)
{
int rc = 0;
#ifdef CONFIG_SMC911X
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
#endif
return rc;
}
#ifdef CONFIG_DISPLAY_BOARDINFO
int checkboard(void)
{

1
configs/arndale_defconfig
View file

@ -37,7 +37,6 @@ CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_S5P=y
CONFIG_MTD=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_I2S_SAMSUNG=y

1
configs/odroid-xu3_defconfig
View file

@ -46,7 +46,6 @@ CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_MMC_DW=y
CONFIG_MTD=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_DM_PMIC=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_REGULATOR=y

1
configs/peach-pi_defconfig
View file

@ -53,7 +53,6 @@ CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_DM_PMIC=y
CONFIG_PMIC_TPS65090=y
CONFIG_DM_REGULATOR=y

1
configs/peach-pit_defconfig
View file

@ -52,7 +52,6 @@ CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_DM_PMIC=y
CONFIG_PMIC_TPS65090=y
CONFIG_DM_REGULATOR=y

1
configs/smdk5250_defconfig
View file

@ -48,7 +48,6 @@ CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_REGULATOR=y

1
configs/smdk5420_defconfig
View file

@ -43,7 +43,6 @@ CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_DM_PMIC=y
CONFIG_DM_REGULATOR=y
CONFIG_EXYNOS_SPI=y

1
configs/smdkv310_defconfig
View file

@ -28,6 +28,5 @@ CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
CONFIG_MTD=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_USB=y
CONFIG_DM_USB=y

1
configs/snow_defconfig
View file

@ -58,7 +58,6 @@ CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_PMIC_S5M8767=y

1
configs/spring_defconfig
View file

@ -58,7 +58,6 @@ CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x5000000
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_PMIC_S5M8767=y

2
include/fdtdec.h
View file

@ -140,8 +140,6 @@ enum fdt_compat_id {
/* Tegra124 XUSB pad controller */
COMPAT_NVIDIA_TEGRA210_XUSB_PADCTL,
/* Tegra210 XUSB pad controller */
COMPAT_SMSC_LAN9215, /* SMSC 10/100 Ethernet LAN9215 */
COMPAT_SAMSUNG_EXYNOS5_SROMC, /* Exynos5 SROMC */
COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */
COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */

2
lib/fdtdec.c
View file

@ -47,8 +47,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
COMPAT(SMSC_LAN9215, "smsc,lan9215"),
COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),