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usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.h

Browse source 
The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.

The rename is done automatically:
	$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
		`git grep "s3c_udc\.h" | cut -d : -f 1`

Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut 2015-12-04 02:51:20 +01:00
parent a4bb9b3636
commit 5d5716eebc
15 changed files with 18 additions and 18 deletions
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2
board/altera/arria5-socdk/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>

2
board/altera/cyclone5-socdk/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>

2
board/broadcom/bcm28155_ap/bcm28155_ap.c
View file

@ -13,7 +13,7 @@
#include <asm/arch/sysmap.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <g_dnl.h>
#define SECWATCHDOG_SDOGCR_OFFSET 0x00000000

2
board/denx/mcvevk/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;

2
board/ebv/socrates/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>

2
board/samsung/goni/goni.c
View file

@ -10,7 +10,7 @@
#include <asm/gpio.h>
#include <asm/arch/mmc.h>
#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <asm/arch/cpu.h>
#include <power/max8998_pmic.h>
#include <samsung/misc.h>

2
board/samsung/odroid/odroid.c
View file

@ -19,7 +19,7 @@
#include <errno.h>
#include <mmc.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <samsung/misc.h>
#include "setup.h"

2
board/samsung/trats/trats.c
View file

@ -18,7 +18,7 @@
#include <asm/arch/watchdog.h>
#include <asm/arch/power.h>
#include <power/pmic.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <power/max8997_pmic.h>
#include <power/max8997_muic.h>
#include <power/battery.h>

2
board/samsung/trats2/trats2.c
View file

@ -21,7 +21,7 @@
#include <libtizen.h>
#include <errno.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;

2
board/samsung/universal_c210/universal.c
View file

@ -17,7 +17,7 @@
#include <ld9040.h>
#include <power/pmic.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <asm/arch/cpu.h>
#include <power/max8998_pmic.h>
#include <libtizen.h>

2
board/terasic/sockit/socfpga.c
View file

@ -9,7 +9,7 @@
#include <asm/io.h>
#include <usb.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#include <usb_mass_storage.h>
#include <micrel.h>

2
drivers/usb/gadget/dwc2_udc_otg.c
View file

@ -46,7 +46,7 @@
#define DEBUG_OUT_EP 0
#define DEBUG_IN_EP 0
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
#define EP0_CON 0
#define EP_MASK 0xF

2
drivers/usb/gadget/dwc2_udc_otg_phy.c
View file

@ -36,7 +36,7 @@
#include "dwc2_udc_otg_priv.h"
#include <usb/lin_gadget_compat.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
void otg_phy_init(struct dwc2_udc *dev)
{

2
drivers/usb/gadget/dwc2_udc_otg_priv.h
View file

@ -14,7 +14,7 @@
#include <linux/usb/gadget.h>
#include <linux/list.h>
#include <usb/lin_gadget_compat.h>
#include <usb/s3c_udc.h>
#include <usb/dwc2_udc.h>
/*-------------------------------------------------------------------------*/
/* DMA bounce buffer size, 16K is enough even for mass storage */

8
include/usb/s3c_udc.h → include/usb/dwc2_udc.h
View file

@ -1,13 +1,13 @@
/*
* drivers/usb/gadget/s3c_udc.h
* drivers/usb/gadget/dwc2_udc.h
* Designware DWC2 on-chip full/high speed USB device controllers
* Copyright (C) 2005 for Samsung Electronics
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __S3C_USB_GADGET
#define __S3C_USB_GADGET
#ifndef __DWC2_USB_GADGET
#define __DWC2_USB_GADGET
#define PHY0_SLEEP (1 << 5)
@ -22,4 +22,4 @@ struct dwc2_plat_otg_data {
int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata);
#endif
#endif /* __DWC2_USB_GADGET */