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https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes displays which of these is actually built, but it's inconsistent. This is especially problematic since the "default" build for a given 85xx board can be either one, so if you don't see a message, you can't always know which size is being used. Not only that, but each board includes code that displays the message, so there is duplication. The 'bdinfo' command has been updated to display this information, so we don't need to display it at boot time. The board-specific code is deleted. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
parent
34e210f5bd
commit
5d065c3e10
11 changed files with 9 additions and 52 deletions
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@ -62,10 +62,6 @@ int checkboard (void)
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else
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else
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printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
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printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
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#ifdef CONFIG_PHYS_64BIT
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puts("36-bit Addressing\n");
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#endif
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/* Display the RCW, so that no one gets confused as to what RCW
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/* Display the RCW, so that no one gets confused as to what RCW
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* we're actually using for this boot.
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* we're actually using for this boot.
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*/
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*/
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@ -68,12 +68,7 @@ int checkboard (void)
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u8 vboot;
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u8 vboot;
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u8 *pixis_base = (u8 *)PIXIS_BASE;
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u8 *pixis_base = (u8 *)PIXIS_BASE;
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puts("Board: MPC8536DS ");
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printf("Board: MPC8536DS Sys ID: 0x%02x, "
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#ifdef CONFIG_PHYS_64BIT
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puts("(36-bit addrmap) ");
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#endif
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printf ("Sys ID: 0x%02x, "
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"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
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in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
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in_8(pixis_base + PIXIS_PVER));
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in_8(pixis_base + PIXIS_PVER));
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@ -45,11 +45,7 @@ int checkboard (void)
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u8 vboot;
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u8 vboot;
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u8 *pixis_base = (u8 *)PIXIS_BASE;
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u8 *pixis_base = (u8 *)PIXIS_BASE;
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puts ("Board: MPC8572DS ");
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printf("Board: MPC8572DS Sys ID: 0x%02x, "
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#ifdef CONFIG_PHYS_64BIT
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puts ("(36-bit addrmap) ");
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#endif
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printf ("Sys ID: 0x%02x, "
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"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
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in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
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in_8(pixis_base + PIXIS_PVER));
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in_8(pixis_base + PIXIS_PVER));
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@ -50,9 +50,6 @@ int checkboard(void)
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else
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else
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puts ("Promjet\n");
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puts ("Promjet\n");
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#ifdef CONFIG_PHYS_64BIT
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printf (" 36-bit physical address map\n");
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#endif
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return 0;
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return 0;
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}
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}
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@ -165,11 +165,7 @@ int checkboard(void)
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struct cpu_type *cpu;
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struct cpu_type *cpu;
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cpu = gd->cpu;
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cpu = gd->cpu;
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printf("Board: %sRDB ", cpu->name);
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printf("Board: %sRDB\n", cpu->name);
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#ifdef CONFIG_PHYS_64BIT
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puts("(36-bit addrmap)");
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#endif
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puts("\n");
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return 0;
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return 0;
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}
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}
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@ -56,12 +56,8 @@ int checkboard(void)
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{
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{
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u8 sw;
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u8 sw;
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puts("Board: P1022DS ");
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printf("Board: P1022DS Sys ID: 0x%02x, "
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#ifdef CONFIG_PHYS_64BIT
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"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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puts("(36-bit addrmap) ");
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#endif
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printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
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in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
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sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH));
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sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH));
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@ -110,9 +110,7 @@ int checkboard (void)
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cpu = gd->cpu;
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cpu = gd->cpu;
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printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
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printf ("Board: %sRDB Rev%c\n", cpu->name, board_rev);
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#ifdef CONFIG_PHYS_64BIT
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puts ("(36-bit addrmap) \n");
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#endif
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setbits_be32(&pgpio->gpdir, GPIO_DIR);
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setbits_be32(&pgpio->gpdir, GPIO_DIR);
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/*
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/*
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@ -225,13 +225,7 @@ int checkboard(void)
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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u8 in, out, io_config, val;
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u8 in, out, io_config, val;
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printf("Board: %s ", CONFIG_BOARDNAME);
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printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME,
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#ifdef CONFIG_PHYS_64BIT
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puts("(36-bit addrmap) ");
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#endif
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printf("CPLD: V%d.%d PCBA: V%d.0\n",
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in_8(&cpld_data->cpld_rev_major) & 0x0F,
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in_8(&cpld_data->cpld_rev_major) & 0x0F,
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in_8(&cpld_data->cpld_rev_minor) & 0x0F,
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in_8(&cpld_data->cpld_rev_minor) & 0x0F,
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in_8(&cpld_data->pcba_rev) & 0x0F);
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in_8(&cpld_data->pcba_rev) & 0x0F);
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@ -61,12 +61,8 @@ int checkboard(void)
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{
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{
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u8 sw;
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u8 sw;
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puts("Board: P2020DS ");
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printf("Board: P2020DS Sys ID: 0x%02x, "
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#ifdef CONFIG_PHYS_64BIT
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"Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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puts("(36-bit addrmap) ");
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#endif
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printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
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in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
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in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
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sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH));
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sw = in_8(&PIXIS_SW(PIXIS_LBMAP_SWITCH));
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@ -54,10 +54,6 @@ int checkboard(void)
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sw = CPLD_READ(fbank_sel);
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sw = CPLD_READ(fbank_sel);
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printf("vBank: %d\n", sw & 0x1);
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printf("vBank: %d\n", sw & 0x1);
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#ifdef CONFIG_PHYS_64BIT
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puts("36-bit Addressing\n");
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#endif
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/*
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/*
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* Display the RCW, so that no one gets confused as to what RCW
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* Display the RCW, so that no one gets confused as to what RCW
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* we're actually using for this boot.
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* we're actually using for this boot.
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@ -68,9 +68,6 @@ int checkboard(void)
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else
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else
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printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
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printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
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#ifdef CONFIG_PHYS_64BIT
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puts("36-bit Addressing\n");
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#endif
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puts("Reset Configuration Word (RCW):");
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puts("Reset Configuration Word (RCW):");
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for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
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for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
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u32 rcw = in_be32(&gur->rcwsr[i]);
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u32 rcw = in_be32(&gur->rcwsr[i]);
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