mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
arm: dts: k3-am62a*: Sync with kernel v6.7-rc1
Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly. Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Nishanth Menon
Tom Rini
parent
6a331b8014
commit
5b70caa6a4
9 changed files with 1224 additions and 128 deletions
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@ -48,6 +48,18 @@
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00 0x00 0x00100000 0x20000>;
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phy_gmii_sel: phy@4044 {
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compatible = "ti,am654-phy-gmii-sel";
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reg = <0x4044 0x8>;
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#phy-cells = <1>;
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};
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epwm_tbclk: clock-controller@4130 {
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compatible = "ti,am62-epwm-tbclk";
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reg = <0x4130 0x4>;
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#clock-cells = <1>;
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};
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};
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dmss: bus@48000000 {
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@ -69,6 +81,67 @@
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interrupt-names = "rx_012";
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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};
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inta_main_dmss: interrupt-controller@48000000 {
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compatible = "ti,sci-inta";
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reg = <0x00 0x48000000 0x00 0x100000>;
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#interrupt-cells = <0>;
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interrupt-controller;
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interrupt-parent = <&gic500>;
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msi-controller;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <28>;
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ti,interrupt-ranges = <6 70 34>;
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ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
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};
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main_bcdma: dma-controller@485c0100 {
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compatible = "ti,am64-dmss-bcdma";
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reg = <0x00 0x485c0100 0x00 0x100>,
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<0x00 0x4c000000 0x00 0x20000>,
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<0x00 0x4a820000 0x00 0x20000>,
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<0x00 0x4aa40000 0x00 0x20000>,
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<0x00 0x4bc00000 0x00 0x100000>;
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reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <3>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <26>;
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ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
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ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
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ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
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};
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main_pktdma: dma-controller@485c0000 {
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compatible = "ti,am64-dmss-pktdma";
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reg = <0x00 0x485c0000 0x00 0x100>,
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<0x00 0x4a800000 0x00 0x20000>,
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<0x00 0x4aa00000 0x00 0x40000>,
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<0x00 0x4b800000 0x00 0x400000>;
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reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <2>;
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <30>;
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ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
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<0x24>, /* CPSW_TX_CHAN */
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<0x25>, /* SAUL_TX_0_CHAN */
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<0x26>; /* SAUL_TX_1_CHAN */
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ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
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<0x11>, /* RING_CPSW_TX_CHAN */
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<0x12>, /* RING_SAUL_TX_0_CHAN */
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<0x13>; /* RING_SAUL_TX_1_CHAN */
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ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
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<0x2b>, /* CPSW_RX_CHAN */
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<0x2d>, /* SAUL_RX_0_CHAN */
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<0x2f>, /* SAUL_RX_1_CHAN */
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<0x31>, /* SAUL_RX_2_CHAN */
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<0x33>; /* SAUL_RX_3_CHAN */
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ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
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<0x2c>, /* FLOW_CPSW_RX_CHAN */
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<0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
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<0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
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};
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};
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dmsc: system-controller@44043000 {
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@ -77,8 +150,8 @@
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reg-names = "debug_messages";
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ti,host-id = <12>;
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mbox-names = "rx", "tx";
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mboxes= <&secure_proxy_main 12>,
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<&secure_proxy_main 13>;
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mboxes = <&secure_proxy_main 12>,
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<&secure_proxy_main 13>;
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k3_pds: power-controller {
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compatible = "ti,sci-pm-domain";
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@ -96,6 +169,21 @@
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};
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};
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secure_proxy_sa3: mailbox@43600000 {
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compatible = "ti,am654-secure-proxy";
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#mbox-cells = <1>;
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reg-names = "target_data", "rt", "scfg";
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reg = <0x00 0x43600000 0x00 0x10000>,
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<0x00 0x44880000 0x00 0x20000>,
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<0x00 0x44860000 0x00 0x20000>;
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/*
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* Marked Disabled:
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* Node is incomplete as it is meant for bootloaders and
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* firmware on non-MPU processors
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*/
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status = "disabled";
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};
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main_pmx0: pinctrl@f4000 {
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compatible = "pinctrl-single";
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reg = <0x00 0xf4000 0x00 0x2ac>;
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@ -104,6 +192,102 @@
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pinctrl-single,function-mask = <0xffffffff>;
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};
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main_timer0: timer@2400000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2400000 0x00 0x400>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 36 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 36 2>;
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assigned-clock-parents = <&k3_clks 36 3>;
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power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_timer1: timer@2410000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2410000 0x00 0x400>;
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interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 37 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 37 2>;
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assigned-clock-parents = <&k3_clks 37 3>;
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power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_timer2: timer@2420000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2420000 0x00 0x400>;
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interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 38 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 38 2>;
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assigned-clock-parents = <&k3_clks 38 3>;
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power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_timer3: timer@2430000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2430000 0x00 0x400>;
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interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 39 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 39 2>;
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assigned-clock-parents = <&k3_clks 39 3>;
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power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_timer4: timer@2440000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2440000 0x00 0x400>;
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interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 40 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 40 2>;
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assigned-clock-parents = <&k3_clks 40 3>;
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power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_timer5: timer@2450000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2450000 0x00 0x400>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 41 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 41 2>;
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assigned-clock-parents = <&k3_clks 41 3>;
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power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_timer6: timer@2460000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2460000 0x00 0x400>;
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interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 42 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 42 2>;
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assigned-clock-parents = <&k3_clks 42 3>;
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power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_timer7: timer@2470000 {
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compatible = "ti,am654-timer";
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reg = <0x00 0x2470000 0x00 0x400>;
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interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&k3_clks 43 2>;
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clock-names = "fck";
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assigned-clocks = <&k3_clks 43 2>;
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assigned-clock-parents = <&k3_clks 43 3>;
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power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
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ti,timer-pwm;
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};
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main_uart0: serial@2800000 {
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compatible = "ti,am64-uart", "ti,am654-uart";
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reg = <0x00 0x02800000 0x00 0x100>;
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@ -222,6 +406,39 @@
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status = "disabled";
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};
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main_spi0: spi@20100000 {
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compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
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reg = <0x00 0x20100000 0x00 0x400>;
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interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 141 0>;
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status = "disabled";
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};
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main_spi1: spi@20110000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x00 0x20110000 0x00 0x400>;
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interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 142 0>;
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status = "disabled";
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};
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main_spi2: spi@20120000 {
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compatible = "ti,am654-mcspi","ti,omap4-mcspi";
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reg = <0x00 0x20120000 0x00 0x400>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 143 0>;
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status = "disabled";
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};
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main_gpio_intr: interrupt-controller@a00000 {
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compatible = "ti,sci-intr";
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reg = <0x00 0x00a00000 0x00 0x800>;
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@ -295,4 +512,368 @@
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no-1-8-v;
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status = "disabled";
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};
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usbss0: dwc3-usb@f900000 {
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compatible = "ti,am62-usb";
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reg = <0x00 0x0f900000 0x00 0x800>;
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clocks = <&k3_clks 161 3>;
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clock-names = "ref";
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ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
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#address-cells = <2>;
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#size-cells = <2>;
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power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
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ranges;
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status = "disabled";
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usb0: usb@31000000 {
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compatible = "snps,dwc3";
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reg = <0x00 0x31000000 0x00 0x50000>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
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<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
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interrupt-names = "host", "peripheral";
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maximum-speed = "high-speed";
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dr_mode = "otg";
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};
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};
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usbss1: dwc3-usb@f910000 {
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compatible = "ti,am62-usb";
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reg = <0x00 0x0f910000 0x00 0x800>;
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clocks = <&k3_clks 162 3>;
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clock-names = "ref";
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ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
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#address-cells = <2>;
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#size-cells = <2>;
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power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
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ranges;
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status = "disabled";
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usb1: usb@31100000 {
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compatible = "snps,dwc3";
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reg = <0x00 0x31100000 0x00 0x50000>;
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interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
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<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
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interrupt-names = "host", "peripheral";
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maximum-speed = "high-speed";
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dr_mode = "otg";
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};
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};
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fss: bus@fc00000 {
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compatible = "simple-bus";
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reg = <0x00 0x0fc00000 0x00 0x70000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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status = "disabled";
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ospi0: spi@fc40000 {
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compatible = "ti,am654-ospi", "cdns,qspi-nor";
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reg = <0x00 0x0fc40000 0x00 0x100>,
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<0x05 0x00000000 0x01 0x00000000>;
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interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x0>;
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clocks = <&k3_clks 75 7>;
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assigned-clocks = <&k3_clks 75 7>;
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assigned-clock-parents = <&k3_clks 75 8>;
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assigned-clock-rates = <166666666>;
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power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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cpsw3g: ethernet@8000000 {
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compatible = "ti,am642-cpsw-nuss";
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#address-cells = <2>;
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#size-cells = <2>;
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reg = <0x0 0x8000000 0x0 0x200000>;
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reg-names = "cpsw_nuss";
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ranges = <0x0 0x0 0x0 0x8000000 0x0 0x200000>;
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clocks = <&k3_clks 13 0>;
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assigned-clocks = <&k3_clks 13 3>;
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assigned-clock-parents = <&k3_clks 13 11>;
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clock-names = "fck";
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power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
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status = "disabled";
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dmas = <&main_pktdma 0xc600 15>,
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<&main_pktdma 0xc601 15>,
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<&main_pktdma 0xc602 15>,
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<&main_pktdma 0xc603 15>,
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<&main_pktdma 0xc604 15>,
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<&main_pktdma 0xc605 15>,
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<&main_pktdma 0xc606 15>,
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<&main_pktdma 0xc607 15>,
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<&main_pktdma 0x4600 15>;
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dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
|
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"tx7", "rx";
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ethernet-ports {
|
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#address-cells = <1>;
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#size-cells = <0>;
|
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cpsw_port1: port@1 {
|
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reg = <1>;
|
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ti,mac-only;
|
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label = "port1";
|
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phys = <&phy_gmii_sel 1>;
|
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mac-address = [00 00 00 00 00 00];
|
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ti,syscon-efuse = <&wkup_conf 0x200>;
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};
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cpsw_port2: port@2 {
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reg = <2>;
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ti,mac-only;
|
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label = "port2";
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phys = <&phy_gmii_sel 2>;
|
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mac-address = [00 00 00 00 00 00];
|
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};
|
||||
};
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cpsw3g_mdio: mdio@f00 {
|
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compatible = "ti,cpsw-mdio","ti,davinci_mdio";
|
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reg = <0x0 0xf00 0x0 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&k3_clks 13 0>;
|
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clock-names = "fck";
|
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bus_freq = <1000000>;
|
||||
};
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||||
|
||||
cpts@3d000 {
|
||||
compatible = "ti,j721e-cpts";
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reg = <0x0 0x3d000 0x0 0x400>;
|
||||
clocks = <&k3_clks 13 3>;
|
||||
clock-names = "cpts";
|
||||
interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "cpts";
|
||||
ti,cpts-ext-ts-inputs = <4>;
|
||||
ti,cpts-periodic-outputs = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
hwspinlock: spinlock@2a000000 {
|
||||
compatible = "ti,am64-hwspinlock";
|
||||
reg = <0x00 0x2a000000 0x00 0x1000>;
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
mailbox0_cluster0: mailbox@29000000 {
|
||||
compatible = "ti,am64-mailbox";
|
||||
reg = <0x00 0x29000000 0x00 0x200>;
|
||||
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <16>;
|
||||
};
|
||||
|
||||
mailbox0_cluster1: mailbox@29010000 {
|
||||
compatible = "ti,am64-mailbox";
|
||||
reg = <0x00 0x29010000 0x00 0x200>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <16>;
|
||||
};
|
||||
|
||||
mailbox0_cluster2: mailbox@29020000 {
|
||||
compatible = "ti,am64-mailbox";
|
||||
reg = <0x00 0x29020000 0x00 0x200>;
|
||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <16>;
|
||||
};
|
||||
|
||||
mailbox0_cluster3: mailbox@29030000 {
|
||||
compatible = "ti,am64-mailbox";
|
||||
reg = <0x00 0x29030000 0x00 0x200>;
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#mbox-cells = <1>;
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <16>;
|
||||
};
|
||||
|
||||
main_mcan0: can@20701000 {
|
||||
compatible = "bosch,m_can";
|
||||
reg = <0x00 0x20701000 0x00 0x200>,
|
||||
<0x00 0x20708000 0x00 0x8000>;
|
||||
reg-names = "m_can", "message_ram";
|
||||
power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
|
||||
clock-names = "hclk", "cclk";
|
||||
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "int0", "int1";
|
||||
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
main_rti0: watchdog@e000000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e000000 0x00 0x100>;
|
||||
clocks = <&k3_clks 125 0>;
|
||||
power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 125 0>;
|
||||
assigned-clock-parents = <&k3_clks 125 2>;
|
||||
};
|
||||
|
||||
main_rti1: watchdog@e010000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e010000 0x00 0x100>;
|
||||
clocks = <&k3_clks 126 0>;
|
||||
power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 126 0>;
|
||||
assigned-clock-parents = <&k3_clks 126 2>;
|
||||
};
|
||||
|
||||
main_rti2: watchdog@e020000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e020000 0x00 0x100>;
|
||||
clocks = <&k3_clks 127 0>;
|
||||
power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 127 0>;
|
||||
assigned-clock-parents = <&k3_clks 127 2>;
|
||||
};
|
||||
|
||||
main_rti3: watchdog@e030000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e030000 0x00 0x100>;
|
||||
clocks = <&k3_clks 128 0>;
|
||||
power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 128 0>;
|
||||
assigned-clock-parents = <&k3_clks 128 2>;
|
||||
};
|
||||
|
||||
main_rti4: watchdog@e040000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x0e040000 0x00 0x100>;
|
||||
clocks = <&k3_clks 205 0>;
|
||||
power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 205 0>;
|
||||
assigned-clock-parents = <&k3_clks 205 2>;
|
||||
};
|
||||
|
||||
epwm0: pwm@23000000 {
|
||||
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x00 0x23000000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
epwm1: pwm@23010000 {
|
||||
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x00 0x23010000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
epwm2: pwm@23020000 {
|
||||
compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x00 0x23020000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
|
||||
clock-names = "tbclk", "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecap0: pwm@23100000 {
|
||||
compatible = "ti,am3352-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x00 0x23100000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 51 0>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecap1: pwm@23110000 {
|
||||
compatible = "ti,am3352-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x00 0x23110000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 52 0>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ecap2: pwm@23120000 {
|
||||
compatible = "ti,am3352-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x00 0x23120000 0x00 0x100>;
|
||||
power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 53 0>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp0: audio-controller@2b00000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b00000 0x00 0x2000>,
|
||||
<0x00 0x02b08000 0x00 0x400>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
|
||||
dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
clocks = <&k3_clks 190 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 190 0>;
|
||||
assigned-clock-parents = <&k3_clks 190 2>;
|
||||
power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp1: audio-controller@2b10000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b10000 0x00 0x2000>,
|
||||
<0x00 0x02b18000 0x00 0x400>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
|
||||
dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
clocks = <&k3_clks 191 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 191 0>;
|
||||
assigned-clock-parents = <&k3_clks 191 2>;
|
||||
power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp2: audio-controller@2b20000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b20000 0x00 0x2000>,
|
||||
<0x00 0x02b28000 0x00 0x400>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
|
||||
dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
clocks = <&k3_clks 192 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 192 0>;
|
||||
assigned-clock-parents = <&k3_clks 192 2>;
|
||||
power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,6 +15,51 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
/*
|
||||
* The MCU domain timer interrupts are routed only to the ESM module,
|
||||
* and not currently available for Linux. The MCU domain timers are
|
||||
* of limited use without interrupts, and likely reserved by the ESM.
|
||||
*/
|
||||
mcu_timer0: timer@4800000 {
|
||||
compatible = "ti,am654-timer";
|
||||
reg = <0x00 0x4800000 0x00 0x400>;
|
||||
clocks = <&k3_clks 35 2>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
|
||||
ti,timer-pwm;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
mcu_timer1: timer@4810000 {
|
||||
compatible = "ti,am654-timer";
|
||||
reg = <0x00 0x4810000 0x00 0x400>;
|
||||
clocks = <&k3_clks 48 2>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
|
||||
ti,timer-pwm;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
mcu_timer2: timer@4820000 {
|
||||
compatible = "ti,am654-timer";
|
||||
reg = <0x00 0x4820000 0x00 0x400>;
|
||||
clocks = <&k3_clks 49 2>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
|
||||
ti,timer-pwm;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
mcu_timer3: timer@4830000 {
|
||||
compatible = "ti,am654-timer";
|
||||
reg = <0x00 0x4830000 0x00 0x400>;
|
||||
clocks = <&k3_clks 50 2>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
|
||||
ti,timer-pwm;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
mcu_uart0: serial@4a00000 {
|
||||
compatible = "ti,am64-uart", "ti,am654-uart";
|
||||
reg = <0x00 0x04a00000 0x00 0x100>;
|
||||
|
|
@ -36,4 +81,90 @@
|
|||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi0: spi@4b00000 {
|
||||
compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
|
||||
reg = <0x00 0x04b00000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 147 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_spi1: spi@4b10000 {
|
||||
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x00 0x04b10000 0x00 0x400>;
|
||||
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 148 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_gpio_intr: interrupt-controller@4210000 {
|
||||
compatible = "ti,sci-intr";
|
||||
reg = <0x00 0x04210000 0x00 0x200>;
|
||||
ti,intr-trigger-type = <1>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic500>;
|
||||
#interrupt-cells = <1>;
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <5>;
|
||||
ti,interrupt-ranges = <0 104 4>;
|
||||
};
|
||||
|
||||
mcu_gpio0: gpio@4201000 {
|
||||
compatible = "ti,am64-gpio", "ti,keystone-gpio";
|
||||
reg = <0x00 0x04201000 0x00 0x100>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&mcu_gpio_intr>;
|
||||
interrupts = <30>, <31>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
ti,ngpio = <24>;
|
||||
ti,davinci-gpio-unbanked = <0>;
|
||||
power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 79 0>;
|
||||
clock-names = "gpio";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_rti0: watchdog@4880000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x04880000 0x00 0x100>;
|
||||
clocks = <&k3_clks 131 0>;
|
||||
power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 131 0>;
|
||||
assigned-clock-parents = <&k3_clks 131 2>;
|
||||
/* Tightly coupled to M4F */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
mcu_mcan0: can@4e08000 {
|
||||
compatible = "bosch,m_can";
|
||||
reg = <0x00 0x4e08000 0x00 0x200>,
|
||||
<0x00 0x4e00000 0x00 0x8000>;
|
||||
reg-names = "m_can", "message_ram";
|
||||
power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcu_mcan1: can@4e18000 {
|
||||
compatible = "bosch,m_can";
|
||||
reg = <0x00 0x4e18000 0x00 0x200>,
|
||||
<0x00 0x4e10000 0x00 0x8000>;
|
||||
reg-names = "m_can", "message_ram";
|
||||
power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
47
arch/arm/dts/k3-am62a-thermal.dtsi
Normal file
47
arch/arm/dts/k3-am62a-thermal.dtsi
Normal file
|
|
@ -0,0 +1,47 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
thermal_zones: thermal-zones {
|
||||
main0_thermal: main0-thermal {
|
||||
polling-delay-passive = <250>; /* milliSeconds */
|
||||
polling-delay = <500>; /* milliSeconds */
|
||||
thermal-sensors = <&wkup_vtm0 0>;
|
||||
|
||||
trips {
|
||||
main0_crit: main0-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
main1_thermal: main1-thermal {
|
||||
polling-delay-passive = <250>; /* milliSeconds */
|
||||
polling-delay = <500>; /* milliSeconds */
|
||||
thermal-sensors = <&wkup_vtm0 1>;
|
||||
|
||||
trips {
|
||||
main1_crit: main1-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
main2_thermal: main2-thermal {
|
||||
polling-delay-passive = <250>; /* milliSeconds */
|
||||
polling-delay = <500>; /* milliSeconds */
|
||||
thermal-sensors = <&wkup_vtm0 2>;
|
||||
|
||||
trips {
|
||||
main2_crit: main2-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
wkup_i2c0: i2c@2b200000 {
|
||||
compatible = "ti,am64-i2c", "ti,omap4-i2c";
|
||||
reg = <0x00 0x02b200000 0x00 0x100>;
|
||||
reg = <0x00 0x2b200000 0x00 0x100>;
|
||||
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -51,4 +51,23 @@
|
|||
wakeup-source;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wkup_rti0: watchdog@2b000000 {
|
||||
compatible = "ti,j7-rti-wdt";
|
||||
reg = <0x00 0x2b000000 0x00 0x100>;
|
||||
clocks = <&k3_clks 132 0>;
|
||||
power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 132 0>;
|
||||
assigned-clock-parents = <&k3_clks 132 2>;
|
||||
/* Used by DM firmware */
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
wkup_vtm0: temperature-sensor@b00000 {
|
||||
compatible = "ti,j7200-vtm";
|
||||
reg = <0x00 0xb00000 0x00 0x400>,
|
||||
<0x00 0xb01000 0x00 0x400>;
|
||||
power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,9 +8,10 @@
|
|||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/pinctrl/k3.h>
|
||||
#include <dt-bindings/soc/ti,sci_pm_domain.h>
|
||||
|
||||
#include "k3-pinctrl.h"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 AM62A SoC";
|
||||
compatible = "ti,am62a7";
|
||||
|
|
@ -114,6 +115,8 @@
|
|||
<0x00 0x78100000 0x00 0x78100000 0x00 0x00008000>; /* DM R5 BTCM*/
|
||||
};
|
||||
};
|
||||
|
||||
#include "k3-am62a-thermal.dtsi"
|
||||
};
|
||||
|
||||
/* Now include the peripherals for each bus segments */
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@
|
|||
#include "k3-am62a7-sk.dts"
|
||||
#include "k3-am62a-ddr-1866mhz-32bit.dtsi"
|
||||
#include "k3-am62a-ddr.dtsi"
|
||||
#include "k3-am62a-sk-binman.dtsi"
|
||||
|
||||
#include "k3-am62a7-sk-u-boot.dtsi"
|
||||
|
||||
|
|
@ -15,33 +14,6 @@
|
|||
aliases {
|
||||
remoteproc0 = &sysctrler;
|
||||
remoteproc1 = &a53_0;
|
||||
serial0 = &wkup_uart0;
|
||||
serial3 = &main_uart1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
tick-timer = &timer1;
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 4G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
|
||||
<0x00000008 0x80000000 0x00000000 0x80000000>;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
||||
alignment = <0x1000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
a53_0: a53@0 {
|
||||
|
|
@ -81,67 +53,39 @@
|
|||
ti,secure-host;
|
||||
};
|
||||
|
||||
&cbass_main {
|
||||
sa3_secproxy: secproxy@44880000 {
|
||||
compatible = "ti,am654-secure-proxy";
|
||||
#mbox-cells = <1>;
|
||||
reg = <0x00 0x44880000 0x00 0x20000>,
|
||||
<0x0 0x44860000 0x0 0x20000>,
|
||||
<0x0 0x43600000 0x0 0x10000>;
|
||||
reg-names = "rt", "scfg", "target_data";
|
||||
bootph-pre-ram;
|
||||
};
|
||||
&secure_proxy_sa3 {
|
||||
/* Needed for initial handshake with ROM */
|
||||
status = "okay";
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
&cbass_main {
|
||||
sysctrler: sysctrler {
|
||||
compatible = "ti,am654-system-controller";
|
||||
mboxes= <&secure_proxy_main 1>,
|
||||
<&secure_proxy_main 0>,
|
||||
<&sa3_secproxy 0>;
|
||||
<&secure_proxy_sa3 0>;
|
||||
mbox-names = "tx", "rx", "boot_notify";
|
||||
bootph-pre-ram;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
status = "okay";
|
||||
&wkup_uart0_pins_default {
|
||||
bootph-pre-ram;
|
||||
|
||||
wkup_uart0_pins_default: wkup-uart0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
|
||||
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
|
||||
AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
|
||||
AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
|
||||
>;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
&main_uart1_pins_default {
|
||||
bootph-pre-ram;
|
||||
main_uart1_pins_default: main-uart1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
|
||||
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
|
||||
AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
|
||||
AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
|
||||
>;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
};
|
||||
|
||||
/* WKUP UART0 is used for DM firmware logs */
|
||||
&wkup_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_uart0_pins_default>;
|
||||
status = "okay";
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
/* Main UART1 is used for TIFS firmware logs */
|
||||
&main_uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart1_pins_default>;
|
||||
status = "okay";
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -4,137 +4,186 @@
|
|||
* Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
#include "k3-am62a-sk-binman.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
tick-timer = &timer1;
|
||||
tick-timer = &main_timer0;
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&cbass_main{
|
||||
bootph-pre-ram;
|
||||
&main_timer0 {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
timer1: timer@2400000 {
|
||||
compatible = "ti,omap5430-timer";
|
||||
reg = <0x00 0x2400000 0x00 0x80>;
|
||||
ti,timer-alwon;
|
||||
clock-frequency = <25000000>;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
&cbass_main {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&dmss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&secure_proxy_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&dmsc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_pds {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_clks {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_reset {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_conf {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&chipid {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_uart0_pins_default {
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cbass_mcu {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cbass_wakeup {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
&wkup_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_i2c0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_i2c1_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&exp1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_mmc1_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_reset {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&dmsc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
k3_sysreset: sysreset-controller {
|
||||
compatible = "ti,sci-sysreset";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&vdd_mmc1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_bcdma {
|
||||
reg = <0x00 0x485c0100 0x00 0x100>,
|
||||
<0x00 0x4c000000 0x00 0x20000>,
|
||||
<0x00 0x4a820000 0x00 0x20000>,
|
||||
<0x00 0x4aa40000 0x00 0x20000>,
|
||||
<0x00 0x4bc00000 0x00 0x100000>,
|
||||
<0x00 0x48600000 0x00 0x8000>,
|
||||
<0x00 0x484a4000 0x00 0x2000>,
|
||||
<0x00 0x484c2000 0x00 0x2000>;
|
||||
reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
|
||||
"ringrt" , "cfg", "tchan", "rchan";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_pktdma {
|
||||
reg = <0x00 0x485c0000 0x00 0x100>,
|
||||
<0x00 0x4a800000 0x00 0x20000>,
|
||||
<0x00 0x4aa00000 0x00 0x20000>,
|
||||
<0x00 0x4b800000 0x00 0x200000>,
|
||||
<0x00 0x485e0000 0x00 0x10000>,
|
||||
<0x00 0x484a0000 0x00 0x2000>,
|
||||
<0x00 0x484c0000 0x00 0x2000>,
|
||||
<0x00 0x48430000 0x00 0x1000>;
|
||||
reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
|
||||
"cfg", "tchan", "rchan", "rflow";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_mdio1_pins_default {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw3g_mdio {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw3g_phy0 {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_rgmii1_pins_default {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&phy_gmii_sel {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
bootph-all;
|
||||
ethernet-ports {
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
bootph-all;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -9,15 +9,17 @@
|
|||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
#include "k3-am62a7.dtsi"
|
||||
#include "k3-am62a-sk-binman.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ti,am62a7-sk", "ti,am62a7";
|
||||
compatible = "ti,am62a7-sk", "ti,am62a7";
|
||||
model = "Texas Instruments AM62A7 SK";
|
||||
|
||||
aliases {
|
||||
serial0 = &wkup_uart0;
|
||||
serial2 = &main_uart0;
|
||||
serial3 = &main_uart1;
|
||||
mmc1 = &sdhci1;
|
||||
};
|
||||
|
||||
|
|
@ -77,10 +79,10 @@
|
|||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vcc_3v3_sys: regulator-2 {
|
||||
vcc_3v3_main: regulator-2 {
|
||||
/* output of LM5141-Q1 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_sys";
|
||||
regulator-name = "vcc_3v3_main";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vmain_pd>;
|
||||
|
|
@ -99,6 +101,17 @@
|
|||
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
vcc_3v3_sys: regulator-4 {
|
||||
/* output of TPS222965DSGT */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_sys";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc_3v3_main>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -112,38 +125,100 @@
|
|||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
tlv320_mclk: clk-0 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <12288000>;
|
||||
};
|
||||
|
||||
codec_audio: sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "AM62Ax-SKEVM";
|
||||
simple-audio-card,widgets =
|
||||
"Headphone", "Headphone Jack",
|
||||
"Line", "Line In",
|
||||
"Microphone", "Microphone Jack";
|
||||
simple-audio-card,routing =
|
||||
"Headphone Jack", "HPLOUT",
|
||||
"Headphone Jack", "HPROUT",
|
||||
"LINE1L", "Line In",
|
||||
"LINE1R", "Line In",
|
||||
"MIC3R", "Microphone Jack",
|
||||
"Microphone Jack", "Mic Bias";
|
||||
simple-audio-card,format = "dsp_b";
|
||||
simple-audio-card,bitclock-master = <&sound_master>;
|
||||
simple-audio-card,frame-master = <&sound_master>;
|
||||
simple-audio-card,bitclock-inversion;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp1>;
|
||||
};
|
||||
|
||||
sound_master: simple-audio-card,codec {
|
||||
sound-dai = <&tlv320aic3106>;
|
||||
clocks = <&tlv320_mclk>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
wkup_uart0_pins_default: wkup-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */
|
||||
AM62AX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */
|
||||
AM62AX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */
|
||||
AM62AX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* WKUP UART0 is used for DM firmware logs */
|
||||
&wkup_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_uart0_pins_default>;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_uart0_pins_default: main-uart0-pins-default {
|
||||
main_uart0_pins_default: main-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
|
||||
AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
|
||||
AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */
|
||||
AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c0_pins_default: main-i2c0-pins-default {
|
||||
main_uart1_pins_default: main-uart1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C17) I2C1_SCL.UART1_RXD */
|
||||
AM62AX_IOPAD(0x01ec, PIN_OUTPUT, 1) /* (E17) I2C1_SDA.UART1_TXD */
|
||||
AM62AX_IOPAD(0x0194, PIN_INPUT, 2) /* (C19) MCASP0_AXR3.UART1_CTSn */
|
||||
AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c0_pins_default: main-i2c0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
|
||||
AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c1_pins_default: main-i2c1-pins-default {
|
||||
main_i2c1_pins_default: main-i2c1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
|
||||
AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_i2c2_pins_default: main-i2c2-pins-default {
|
||||
main_i2c2_pins_default: main-i2c2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
|
||||
AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-pins-default {
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
|
||||
AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
|
||||
|
|
@ -155,11 +230,64 @@
|
|||
>;
|
||||
};
|
||||
|
||||
usr_led_pins_default: usr-led-pins-default {
|
||||
usr_led_pins_default: usr-led-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x244, PIN_OUTPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_usb1_pins_default: main-usb1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mdio1_pins_default: main-mdio1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
|
||||
AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
|
||||
>;
|
||||
};
|
||||
|
||||
main_rgmii1_pins_default: main-rgmii1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */
|
||||
AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */
|
||||
AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */
|
||||
AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */
|
||||
AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */
|
||||
AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */
|
||||
AM62AX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */
|
||||
AM62AX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */
|
||||
AM62AX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */
|
||||
AM62AX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */
|
||||
AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */
|
||||
AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mcasp1_pins_default: main-mcasp1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x090, PIN_INPUT, 2) /* (L19) GPMC0_BE0n_CLE.MCASP1_ACLKX */
|
||||
AM62AX_IOPAD(0x098, PIN_INPUT, 2) /* (R18) GPMC0_WAIT0.MCASP1_AFSX */
|
||||
AM62AX_IOPAD(0x08c, PIN_OUTPUT, 2) /* (K19) GPMC0_WEn.MCASP1_AXR0 */
|
||||
AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
status = "okay";
|
||||
|
||||
pmic_irq_pins_default: pmic-irq-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
|
|
@ -167,13 +295,112 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
typec_pd0: usb-power-controller@3f {
|
||||
compatible = "ti,tps6598x";
|
||||
reg = <0x3f>;
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
self-powered;
|
||||
data-role = "dual";
|
||||
power-role = "sink";
|
||||
port {
|
||||
usb_con_hs: endpoint {
|
||||
remote-endpoint = <&usb0_hs_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tps659312: pmic@48 {
|
||||
compatible = "ti,tps6593-q1";
|
||||
reg = <0x48>;
|
||||
ti,primary-pmic;
|
||||
system-power-controller;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pmic_irq_pins_default>;
|
||||
interrupt-parent = <&mcu_gpio0>;
|
||||
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
buck123-supply = <&vcc_3v3_sys>;
|
||||
buck4-supply = <&vcc_3v3_sys>;
|
||||
buck5-supply = <&vcc_3v3_sys>;
|
||||
ldo1-supply = <&vcc_3v3_sys>;
|
||||
ldo2-supply = <&vcc_3v3_sys>;
|
||||
ldo3-supply = <&buck5>;
|
||||
ldo4-supply = <&vcc_3v3_sys>;
|
||||
|
||||
regulators {
|
||||
buck123: buck123 {
|
||||
regulator-name = "vcc_core";
|
||||
regulator-min-microvolt = <715000>;
|
||||
regulator-max-microvolt = <895000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck4: buck4 {
|
||||
regulator-name = "vcc_1v1";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck5: buck5 {
|
||||
regulator-name = "vcc_1v8_sys";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1: ldo1 {
|
||||
regulator-name = "vddshv5_sdio";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2: ldo2 {
|
||||
regulator-name = "vpp_1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3: ldo3 {
|
||||
regulator-name = "vcc_0v85";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4: ldo4 {
|
||||
regulator-name = "vdda_1v8";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
exp1: gpio@22 {
|
||||
compatible = "ti,tca6424";
|
||||
|
|
@ -194,6 +421,19 @@
|
|||
"MCASP1_FET_SEL", "UART1_FET_SEL",
|
||||
"PD_I2C_IRQ", "IO_EXP_TEST_LED";
|
||||
};
|
||||
|
||||
tlv320aic3106: audio-codec@1b {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "ti,tlv320aic3106";
|
||||
reg = <0x1b>;
|
||||
ai3x-micbias-vg = <1>; /* 2.0V */
|
||||
|
||||
/* Regulators */
|
||||
AVDD-supply = <&vcc_3v3_sys>;
|
||||
IOVDD-supply = <&vcc_3v3_sys>;
|
||||
DRVDD-supply = <&vcc_3v3_sys>;
|
||||
DVDD-supply = <&buck5>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
|
|
@ -223,3 +463,84 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
};
|
||||
|
||||
/* Main UART1 is used for TIFS firmware logs */
|
||||
&main_uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart1_pins_default>;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
status = "okay";
|
||||
ti,vbus-divider;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
usb-role-switch;
|
||||
|
||||
port {
|
||||
usb0_hs_ep: endpoint {
|
||||
remote-endpoint = <&usb_con_hs>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usbss1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_usb1_pins_default>;
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_rgmii1_pins_default>;
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cpsw3g_mdio {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mdio1_pins_default>;
|
||||
|
||||
cpsw3g_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
};
|
||||
|
||||
&mcasp1 {
|
||||
status = "okay";
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mcasp1_pins_default>;
|
||||
|
||||
op-mode = <0>; /* MCASP_IIS_MODE */
|
||||
tdm-slots = <2>;
|
||||
|
||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
||||
1 0 2 0
|
||||
0 0 0 0
|
||||
0 0 0 0
|
||||
0 0 0 0
|
||||
>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -95,8 +95,9 @@
|
|||
|
||||
L2_0: l2-cache0 {
|
||||
compatible = "cache";
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
cache-size = <0x40000>;
|
||||
cache-size = <0x80000>;
|
||||
cache-line-size = <64>;
|
||||
cache-sets = <512>;
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue