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configs: Resync with savedefconfig

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Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2019-11-11 20:04:24 -05:00
parent d6da4da3be
commit 59e5d1e2a5
29 changed files with 30 additions and 32 deletions
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2
configs/am65x_evm_a53_defconfig
View file

@ -8,8 +8,8 @@ CONFIG_TARGET_AM654_A53_EVM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_PSCI_RESET is not set

4
configs/am65x_evm_r5_defconfig
View file

@ -10,8 +10,8 @@ CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x41c00000
@ -70,6 +70,7 @@ CONFIG_SYS_I2C_OMAP24XX=y
CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_MISC=y
CONFIG_K3_AVS0=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_AM654=y
@ -99,4 +100,3 @@ CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_OMAP_TIMER=y
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
CONFIG_K3_AVS0=y

2
configs/am65x_hs_evm_a53_defconfig
View file

@ -9,8 +9,8 @@ CONFIG_TARGET_AM654_A53_EVM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x80080000

2
configs/am65x_hs_evm_r5_defconfig
View file

@ -10,8 +10,8 @@ CONFIG_TARGET_AM654_R5_EVM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x41c00000

2
configs/chromebit_mickey_defconfig
View file

@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_CHROMEBIT_MICKEY=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y

2
configs/chromebook_jerry_defconfig
View file

@ -4,8 +4,8 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y

2
configs/chromebook_minnie_defconfig
View file

@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_CHROMEBOOK_MINNIE=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y

2
configs/chromebook_speedy_defconfig
View file

@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_ROCKCHIP_RK3288=y
# CONFIG_SPL_MMC_SUPPORT is not set
CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y

2
configs/evb-px5_defconfig
View file

@ -7,8 +7,8 @@ CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
CONFIG_TARGET_EVB_PX5=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xFF1c0000
CONFIG_DEBUG_UART_CLOCK=24000000

2
configs/evb-rk3036_defconfig
View file

@ -5,9 +5,9 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ROCKCHIP_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/evb-rk3229_defconfig
View file

@ -5,8 +5,8 @@ CONFIG_ROCKCHIP_RK322X=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_TARGET_EVB_RK3229=y
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl.lds"
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_STACK_R_ADDR=0x60600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEBUG_UART_BASE=0x11030000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/evb-rk3288_defconfig
View file

@ -3,9 +3,9 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_EVB_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_SIZE_LIMIT=0x4b000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/evb-rk3328_defconfig
View file

@ -6,8 +6,8 @@ CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/firefly-rk3288_defconfig
View file

@ -3,9 +3,9 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_FIREFLY_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_SIZE_LIMIT=262144
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/gwventana_emmc_defconfig
View file

@ -9,8 +9,8 @@ CONFIG_CMD_EECONFIG=y
CONFIG_CMD_GSC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_CMD_HDMIDETECT=y
CONFIG_SPL_TEXT_BASE=0x00908000

2
configs/gwventana_gw5904_defconfig
View file

@ -9,8 +9,8 @@ CONFIG_CMD_EECONFIG=y
CONFIG_CMD_GSC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_CMD_HDMIDETECT=y
CONFIG_SPL_TEXT_BASE=0x00908000

2
configs/gwventana_nand_defconfig
View file

@ -9,8 +9,8 @@ CONFIG_CMD_EECONFIG=y
CONFIG_CMD_GSC=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x18000000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_CMD_HDMIDETECT=y
CONFIG_SPL_TEXT_BASE=0x00908000

2
configs/j721e_evm_a72_defconfig
View file

@ -8,8 +8,8 @@ CONFIG_TARGET_J721E_A72_EVM=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL_FS_FAT=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y

2
configs/kylin-rk3036_defconfig
View file

@ -6,9 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ROCKCHIP_RK3036=y
CONFIG_TARGET_KYLIN_RK3036=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0x20068000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

4
configs/leez-rk3399_defconfig
View file

@ -15,7 +15,6 @@ CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
@ -23,7 +22,6 @@ CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
@ -37,6 +35,7 @@ CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
@ -51,6 +50,5 @@ CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y

2
configs/lion-rk3368_defconfig
View file

@ -6,8 +6,8 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xFF180000
CONFIG_DEBUG_UART_CLOCK=24000000

2
configs/miqi-rk3288_defconfig
View file

@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_MIQI_RK3288=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/phycore-rk3288_defconfig
View file

@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_PHYCORE_RK3288=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/popmetal-rk3288_defconfig
View file

@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_POPMETAL_RK3288=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/rock2_defconfig
View file

@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_TARGET_ROCK2=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/rock64-rk3328_defconfig
View file

@ -6,8 +6,8 @@ CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SMBIOS_PRODUCT_NAME="rock64_rk3328"

2
configs/rock_defconfig
View file

@ -6,8 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3188=y
CONFIG_TARGET_ROCK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x60080000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0x20064000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/tinker-rk3288_defconfig
View file

@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_TINKER_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_SIZE_LIMIT=0x4b000
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y

2
configs/vyasa-rk3288_defconfig
View file

@ -5,8 +5,8 @@ CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_VYASA_RK3288=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y