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arm: imx: imx8m: Program CSU and TZASC if PSCI provider

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In case U-Boot is the PSCI provider, it is necessary to correctly
program CSU and TZASC registers. Those are poorly documented, so
push in the correct values.

Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut 2022-12-22 01:46:42 +01:00 • committed by Stefano Babic
parent 191937134b
commit 58552ab81b
2 changed files with 26 additions and 0 deletions
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1
arch/arm/include/asm/arch-imx8m/imx-regs.h
View file

@ -31,6 +31,7 @@
#define CCM_BASE_ADDR 0x30380000
#define SRC_BASE_ADDR 0x30390000
#define GPC_BASE_ADDR 0x303A0000
#define CSU_BASE_ADDR 0x303E0000
#define SYSCNT_RD_BASE_ADDR 0x306A0000
#define SYSCNT_CMP_BASE_ADDR 0x306B0000

25
arch/arm/mach-imx/imx8m/soc.c
View file

@ -561,6 +561,29 @@ static void imx8m_setup_snvs(void)
writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
}
static void imx8m_setup_csu_tzasc(void)
{
const uintptr_t tzasc_base[4] = {
0x301f0000, 0x301f0000, 0x301f0000, 0x301f0000
};
int i, j;
if (!IS_ENABLED(CONFIG_ARMV8_PSCI))
return;
/* CSU */
for (i = 0; i < 64; i++)
writel(0x00ff00ff, (void *)CSU_BASE_ADDR + (4 * i));
/* TZASC */
for (j = 0; j < 4; j++) {
writel(0x77777777, (void *)(tzasc_base[j]));
writel(0x77777777, (void *)(tzasc_base[j]) + 0x4);
for (i = 0; i <= 0x10; i += 4)
writel(0, (void *)(tzasc_base[j]) + 0x40 + i);
}
}
int arch_cpu_init(void)
{
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
@ -613,6 +636,8 @@ int arch_cpu_init(void)
imx8m_setup_snvs();
imx8m_setup_csu_tzasc();
return 0;
}