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microblaze: Flush caches before enabling them

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Flushing caches is necessary because of soft reset
which doesn't clear caches.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Reviewed-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Michal Simek 2012-09-25 10:13:35 +02:00
parent ea0122816c
commit 5811830fae
4 changed files with 10 additions and 10 deletions
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5
arch/microblaze/cpu/cache.c
View file

@ -61,12 +61,7 @@ void dcache_enable (void) {
void dcache_disable(void) {
#ifdef XILINX_USE_DCACHE
#ifdef XILINX_DCACHE_BYTE_SIZE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
#else
#warning please rebuild BSPs and update configuration
flush_cache(0, 32768);
#endif
#endif
MSRCLR(0x80);
}

6
arch/microblaze/cpu/start.S
View file

@ -132,6 +132,12 @@ _start:
rsubi r8, r10, 0x26
sh r6, r0, r8
/* Flush cache before enable cache */
addik r5, r0, 0
addik r6, r0, XILINX_DCACHE_BYTE_SIZE
flush: bralid r15, flush_cache
nop
/* enable instruction and data cache */
mfs r12, rmsr
ori r12, r12, 0xa0

5
arch/microblaze/lib/bootm.c
View file

@ -70,12 +70,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima
#endif
#ifdef XILINX_USE_DCACHE
#ifdef XILINX_DCACHE_BYTE_SIZE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
#else
#warning please rebuild BSPs and update configuration
flush_cache(0, 32768);
#endif
#endif
/*
* Linux Kernel Parameters (passing device tree):

4
include/configs/microblaze-generic.h
View file

@ -287,6 +287,10 @@
# undef CONFIG_DCACHE
#endif
#ifndef XILINX_DCACHE_BYTE_SIZE
#define XILINX_DCACHE_BYTE_SIZE 32768
#endif
/*
* BOOTP options
*/