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arm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsi
The timer0 node has its two clocks written in reversed order. The timer0 is used as the tick timer which causes a problem that the time a delay function used is 4 times longer. This patch reverses these two clocks to solve this issue. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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1 changed files with 2 additions and 2 deletions
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@ -82,8 +82,8 @@
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compatible = "mediatek,timer";
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reg = <0x10004000 0x80>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&topckgen CLK_TOP_10M_SEL>,
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<&topckgen CLK_TOP_CLKXTAL_D4>;
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clocks = <&topckgen CLK_TOP_CLKXTAL_D4>,
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<&topckgen CLK_TOP_10M_SEL>;
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clock-names = "mux", "src";
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u-boot,dm-pre-reloc;
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};
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