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arm: dts: MediaTek: fix clock order for timer0 node of mt7629.dtsi

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The timer0 node has its two clocks written in reversed order. The timer0
is used as the tick timer which causes a problem that the time a delay
function used is 4 times longer.

This patch reverses these two clocks to solve this issue.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This commit is contained in:
Weijie Gao 2019-07-11 14:26:24 +08:00 committed by Tom Rini
parent 1b96da67a0
commit 58067b0de1
1 changed files with 2 additions and 2 deletions
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4
arch/arm/dts/mt7629.dtsi
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@ -82,8 +82,8 @@
compatible = "mediatek,timer";
reg = <0x10004000 0x80>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>;
clocks = <&topckgen CLK_TOP_10M_SEL>,
<&topckgen CLK_TOP_CLKXTAL_D4>;
clocks = <&topckgen CLK_TOP_CLKXTAL_D4>,
<&topckgen CLK_TOP_10M_SEL>;
clock-names = "mux", "src";
u-boot,dm-pre-reloc;
};