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ARM: rmobile: Add recovery SPL for R-Car Gen3

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Build an SPL which can be started via SCIF download mode on R-Car Gen3
and allows loading and executing U-Boot uImage with the next stage code.
This is also useful for starting e.g. ATF BL2, which inits the hardware
and returns to the U-Boot SPL, which can then load e.g. U-Boot proper.

The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL
while the payload, e.g. ATF BL2, executes, so there is no problem here.

However, E3 and D3 have much less SRAM, hence the loader uses a trick
where it copies itself beyond the area used by BL2 and executes from
there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS,
stack and malloc area, so the later two are placed at +0x4000 offset
from start of SRAM, another area not used by ATF BL2. To make things
even more complicated, the SCIF loader cannot load to the upper 32kiB
of the SRAM directly, hence the copying approach.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut 2018-10-03 12:44:13 +02:00 committed by Marek Vasut
parent b72d308c13
commit 5602330df0
20 changed files with 191 additions and 0 deletions
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1
Kconfig
View file

@ -155,6 +155,7 @@ config SYS_MALLOC_LEN
config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL before relocation"
depends on SYS_MALLOC_F
default 0x2800 if RCAR_GEN3
default SYS_MALLOC_F_LEN
help
Before relocation, memory is very limited on many platforms. Still,

3
Makefile
View file

@ -1117,6 +1117,9 @@ OBJCOPYFLAGS_u-boot-spl.srec = $(OBJCOPYFLAGS_u-boot.srec)
spl/u-boot-spl.srec: spl/u-boot-spl FORCE
$(call if_changed,objcopy)
%.scif: %.srec
$(Q)$(MAKE) $(build)=arch/arm/mach-rmobile $@
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec)

11
arch/arm/mach-rmobile/Kconfig
View file

@ -16,11 +16,22 @@ config RCAR_GEN3
select PINCTRL
select PINCONF
select PINCTRL_PFC
select SUPPORT_SPL
imply CMD_FS_UUID
imply CMD_GPT
imply CMD_UUID
imply CMD_MMC_SWRITE if MMC
imply SUPPORT_EMMC_RPMB if MMC
imply SPL
imply SPL_BOARD_INIT
imply SPL_GZIP
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
imply SPL_SERIAL_SUPPORT
imply SPL_SYS_MALLOC_SIMPLE
imply SPL_TINY_MEMSET
imply SPL_YMODEM_SUPPORT
imply USE_TINY_PRINTF
config RZA1
prompt "Renesas ARM SoCs RZ/A1 (32bit)"

73
arch/arm/mach-rmobile/Makefile
View file

@ -13,3 +13,76 @@ obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o
obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o
obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o
obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o
OBJCOPYFLAGS_u-boot-spl.srec := -O srec
quiet_cmd_objcopy = OBJCOPY $@
cmd_objcopy = $(OBJCOPY) --gap-fill=0x00 $(OBJCOPYFLAGS) \
$(OBJCOPYFLAGS_$(@F)) $< $@
spl/u-boot-spl.srec: spl/u-boot-spl FORCE
$(call if_changed,objcopy)
ifneq ($(CONFIG_R8A77990)$(CONFIG_R8A77995),)
#
# The first 6 generate statements generate the R-Car Gen3 SCIF loader header.
# The subsequent generate statements represent the following chunk of assembler
# code, which copies the loaded data from 0xe6304030 to 0xe6318000. This is to
# work around a limitation of the D3/E3 BootROM, which does not permit loading
# to 0xe6318000 directly.
#
# mov x0, #0xe6000000
# orr x0, x0, #0x00300000
# orr x1, x0, #0x00004000
# orr x1, x1, #0x00000030
#
# orr x2, x0, #0x00018000
# mov x0, x2
# mov x3, #0x7000
#1: ldp x4, x5, [x1], #16
#
# stp x4, x5, [x2], #16
# subs x3, x3, #16
# b.ge 1b
# br x0
#
quiet_cmd_srec_cat = SRECCAT $@
cmd_srec_cat = srec_cat -output $@ -M 8 $< -M 8 \
-offset -0x13fd0 \
-Output_Block_Size 16 \
-generate 0xe6300400 0xe6300404 -l-e-constant 0x0 4 \
-generate 0xe630048c 0xe6300490 -l-e-constant 0x0 4 \
-generate 0xe63005d4 0xe63005d8 -l-e-constant 0xe6304000 4 \
-generate 0xe63006e4 0xe63006e8 -l-e-constant $2 4 \
-generate 0xe6301154 0xe6301158 -l-e-constant 0xe6304000 4 \
-generate 0xe6301264 0xe6301268 -l-e-constant $2 4 \
-generate 0xe6304000 0xe6304004 -l-e-constant 0xd2bcc000 4 \
-generate 0xe6304004 0xe6304008 -l-e-constant 0xb26c0400 4 \
-generate 0xe6304008 0xe630400c -l-e-constant 0xb2720001 4 \
-generate 0xe630400c 0xe6304010 -l-e-constant 0xb27c0421 4 \
-generate 0xe6304010 0xe6304014 -l-e-constant 0xb2710402 4 \
-generate 0xe6304014 0xe6304018 -l-e-constant 0xaa0203e0 4 \
-generate 0xe6304018 0xe630401c -l-e-constant 0xd28e0003 4 \
-generate 0xe630401c 0xe6304020 -l-e-constant 0xa8c11424 4 \
-generate 0xe6304020 0xe6304024 -l-e-constant 0xa8811444 4 \
-generate 0xe6304024 0xe6304028 -l-e-constant 0xf1004063 4 \
-generate 0xe6304028 0xe630402c -l-e-constant 0x54ffffaa 4 \
-generate 0xe630402c 0xe6304030 -l-e-constant 0xd61f0000 4
else
quiet_cmd_srec_cat = SRECCAT $@
cmd_srec_cat = srec_cat -output $@ -M 8 $< -M 8 \
-Output_Block_Size 16 \
-generate 0xe6300400 0xe6300404 -l-e-constant 0x0 4 \
-generate 0xe630048c 0xe6300490 -l-e-constant 0x0 4 \
-generate 0xe63005d4 0xe63005d8 -l-e-constant $(CONFIG_SPL_TEXT_BASE) 4 \
-generate 0xe63006e4 0xe63006e8 -l-e-constant $2 4 \
-generate 0xe6301154 0xe6301158 -l-e-constant $(CONFIG_SPL_TEXT_BASE) 4 \
-generate 0xe6301264 0xe6301268 -l-e-constant $2 4
endif
spl/u-boot-spl.scif: spl/u-boot-spl.srec spl/u-boot-spl.bin
$(call cmd,srec_cat,$(shell wc -c spl/u-boot-spl.bin | awk '{printf("0x%08x\n",$$1)}'))
# if srec_cat is present build u-boot-spl.scif by default
has_srec_cat = $(call try-run,srec_cat -VERSion,y,n)
ALL-$(has_srec_cat) += u-boot-spl.scif
CLEAN_FILES += u-boot-spl.scif

4
board/renesas/draak/Makefile
View file

@ -6,4 +6,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj-y := ../rcar-common/gen3-spl.o
else
obj-y := draak.o
endif

4
board/renesas/eagle/Makefile
View file

@ -6,4 +6,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj-y := ../rcar-common/gen3-spl.o
else
obj-y := eagle.o
endif

4
board/renesas/ebisu/Makefile
View file

@ -6,4 +6,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj-y := ../rcar-common/gen3-spl.o
else
obj-y := ebisu.o
endif

55
board/renesas/rcar-common/gen3-spl.c Normal file
View file

@ -0,0 +1,55 @@
// SPDX-License-Identifier: GPL-2.0
/*
* R-Car Gen3 recovery SPL
*
* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
*/
#include <common.h>
#include <asm/io.h>
#include <spl.h>
#define RCAR_CNTC_BASE 0xE6080000
#define CNTCR_EN BIT(0)
void board_init_f(ulong dummy)
{
writel(CNTCR_EN, RCAR_CNTC_BASE);
timer_init();
}
void spl_board_init(void)
{
/* UART clocks enabled and gd valid - init serial console */
preloader_console_init();
}
u32 spl_boot_device(void)
{
return BOOT_DEVICE_UART;
}
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
debug("image entry point: 0x%lx\n", spl_image->entry_point);
if (spl_image->os == IH_OS_ARM_TRUSTED_FIRMWARE) {
typedef void (*image_entry_arg_t)(int, int, int, int)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t)(uintptr_t) spl_image->entry_point;
image_entry(IH_MAGIC, CONFIG_SPL_TEXT_BASE, 0, 0);
} else {
typedef void __noreturn (*image_entry_noargs_t)(void);
image_entry_noargs_t image_entry =
(image_entry_noargs_t)spl_image->entry_point;
image_entry();
}
}
void s_init(void)
{
}
void reset_cpu(ulong addr)
{
}

4
board/renesas/salvator-x/Makefile
View file

@ -6,4 +6,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj-y := ../rcar-common/gen3-spl.o
else
obj-y := salvator-x.o
endif

4
board/renesas/ulcb/Makefile
View file

@ -6,4 +6,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj-y := ../rcar-common/gen3-spl.o
else
obj-y := ulcb.o cpld.o
endif

1
configs/r8a7795_salvator-x_defconfig
View file

@ -11,6 +11,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a7795_ulcb_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a77965_salvator-x_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77965-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a77965_ulcb_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77965-m3nulcb.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a7796_salvator-x_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a7796_ulcb_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6338000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a77970_eagle_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77970-eagle.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a77990_ebisu_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

1
configs/r8a77995_draak_defconfig
View file

@ -12,6 +12,7 @@ CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.2
CONFIG_SUPPORT_RAW_INITRD=y
CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb"
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_TEXT_BASE=0xe6318000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y

19
include/configs/rcar-gen3-common.h
View file

@ -13,6 +13,10 @@
#define CONFIG_REMAKE_ELF
#ifdef CONFIG_SPL
#define CONFIG_SPL_TARGET "spl/u-boot-spl.scif"
#endif
/* boot option */
#define CONFIG_CMDLINE_TAG
@ -64,4 +68,19 @@
"tftp 0x48000000 Image-"CONFIG_DEFAULT_FDT_FILE"; " \
"booti 0x48080000 - 0x48000000"
/* SPL support */
#if defined(CONFIG_R8A7795) || defined(CONFIG_R8A7796) || defined(CONFIG_R8A77965)
#define CONFIG_SPL_BSS_START_ADDR 0xe633f000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000
#else
#define CONFIG_SPL_BSS_START_ADDR 0xe631f000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000
#endif
#define CONFIG_SPL_STACK 0xe6304000
#define CONFIG_SPL_MAX_SIZE 0x7000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF2
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
#endif
#endif /* __RCAR_GEN3_COMMON_H */