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mpc83xx: fix serdes setup for the MPC8378E boards

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MPC837xE specs says that SerDes1 has:

— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

And for SerDes2:

— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

The spec also explicitly states that PEX options are not valid for
the SD1.

Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Anton Vorontsov 2008-10-02 18:31:53 +04:00 committed by Kim Phillips
parent 5c2ff323a9
commit 55c531984d
2 changed files with 2 additions and 2 deletions
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2
board/freescale/mpc837xemds/mpc837xemds.c
View file

@ -44,7 +44,7 @@ int board_early_init_f(void)
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break; break;
case SPR_8378: case SPR_8378:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX, fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break; break;
case SPR_8379: case SPR_8379:

2
board/freescale/mpc837xerdb/mpc837xerdb.c
View file

@ -148,7 +148,7 @@ int board_early_init_f(void)
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break; break;
case SPR_8378: case SPR_8378:
fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_PEX, fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
break; break;
case SPR_8379: case SPR_8379: