mmc: move CONFIG_GENERIC_MMC to Kconfig

Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC.

Let's create an entry for "config GENERIC_MMC" with "default MMC",
then convert all macro defines in headers to Kconfig.  Almost all
of the defines will go away.

I see only two exceptions:
  configs/blanche_defconfig
  configs/sandbox_noblk_defconfig

They define CONFIG_GENERIC_MMC, but not CONFIG_MMC.  Something
might be wrong with these two boards, so should be checked later.

Anyway, this is the output of the moveconfig tool.

This commit was created as follows:

[1] create a config entry in drivers/mmc/Kconfig

[2] tools/moveconfig.py -r HEAD GENERIC_MMC

[3] manual clean-up of garbage comments in doc/README.* and
    include/configs/*.h

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Masahiro Yamada 2017-01-30 19:46:49 +09:00 committed by Jaehoon Chung
parent 794c6e2c96
commit 54925327fa
189 changed files with 7 additions and 341 deletions

3
README
View file

@ -1457,9 +1457,6 @@ The following options need to be configured:
CONFIG_SH_MMCIF_CLK CONFIG_SH_MMCIF_CLK
Define the clock frequency for MMCIF Define the clock frequency for MMCIF
CONFIG_GENERIC_MMC
Enable the generic MMC driver
CONFIG_SUPPORT_EMMC_BOOT CONFIG_SUPPORT_EMMC_BOOT
Enable some additional features of the eMMC boot partitions. Enable some additional features of the eMMC boot partitions.

View file

@ -2,7 +2,6 @@ CONFIG_ARM=y
CONFIG_ARCH_RMOBILE=y CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_BLANCHE=y CONFIG_TARGET_BLANCHE=y
# CONFIG_MMC is not set
CONFIG_BOOTSTAGE_USER_COUNT=0x20 CONFIG_BOOTSTAGE_USER_COUNT=0x20
CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
@ -19,6 +18,8 @@ CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y CONFIG_CMD_FAT=y
# CONFIG_MMC is not set
CONFIG_GENERIC_MMC=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SPANSION=y

View file

@ -100,6 +100,7 @@ CONFIG_CROS_EC_SPI=y
CONFIG_PWRSEQ=y CONFIG_PWRSEQ=y
CONFIG_SPL_PWRSEQ=y CONFIG_SPL_PWRSEQ=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_GENERIC_MMC=y
CONFIG_SPI_FLASH_SANDBOX=y CONFIG_SPI_FLASH_SANDBOX=y
CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_ATMEL=y

View file

@ -69,8 +69,6 @@ int board_mmc_getcd(struct mmc *mmc)
and the board definition files needs: and the board definition files needs:
/* SD/MMC card */ /* SD/MMC card */
#define CONFIG_MMC 1
#define CONFIG_GENERIC_MMC 1
#define CONFIG_GENERIC_ATMEL_MCI 1 #define CONFIG_GENERIC_ATMEL_MCI 1
#define CONFIG_ATMEL_MCI_PORTB 1 /* Atmel XE-EK uses port B */ #define CONFIG_ATMEL_MCI_PORTB 1 /* Atmel XE-EK uses port B */
#define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9 #define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9

View file

@ -14,8 +14,5 @@ socfpga_dw_mmc
Here are macro and detailed configuration required to enable DesignWare SDMMC Here are macro and detailed configuration required to enable DesignWare SDMMC
controller support within SOCFPGA controller support within SOCFPGA
#define CONFIG_GENERIC_MMC
-> Enable the generic MMC driver
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256
-> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM

View file

@ -10,6 +10,10 @@ config MMC
If you want MMC/SD/SDIO support, you should say Y here and If you want MMC/SD/SDIO support, you should say Y here and
also to your specific host controller driver. also to your specific host controller driver.
config GENERIC_MMC
bool "Generic MMC driver framework"
default MMC
config DM_MMC config DM_MMC
bool "Enable MMC controllers using Driver Model" bool "Enable MMC controllers using Driver Model"
depends on DM depends on DM

View file

@ -478,7 +478,6 @@ combinations. this should be removed later
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#endif #endif

View file

@ -25,8 +25,6 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_USE_PIO #define CONFIG_SYS_FSL_ESDHC_USE_PIO
#define CONFIG_GENERIC_MMC
#endif #endif
/* /*

View file

@ -485,7 +485,6 @@ extern int board_pci_host_broken(void);
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_FSL_ESDHC_PIN_MUX
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#endif #endif
/* /*

View file

@ -497,7 +497,6 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_FSL_ESDHC_PIN_MUX
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#endif #endif
/* /*

View file

@ -603,7 +603,6 @@
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#endif #endif
/* /*

View file

@ -463,7 +463,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_FSL_ESDHC_PIN_MUX
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#endif #endif
/* /*

View file

@ -669,7 +669,6 @@ extern unsigned long get_sdram_size(void);
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#endif #endif

View file

@ -504,7 +504,6 @@
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#endif #endif

View file

@ -606,7 +606,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_GENERIC_MMC
#endif #endif
/* Hash command with SHA acceleration supported in hardware */ /* Hash command with SHA acceleration supported in hardware */

View file

@ -654,7 +654,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#endif #endif
/* Qman/Bman */ /* Qman/Bman */

View file

@ -658,7 +658,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#endif #endif
/* Qman/Bman */ /* Qman/Bman */

View file

@ -542,7 +542,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK #define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC_ADAPTER_IDENT #define CONFIG_FSL_ESDHC_ADAPTER_IDENT
#endif #endif

View file

@ -652,7 +652,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#endif #endif
/* Qman/Bman */ /* Qman/Bman */

View file

@ -721,7 +721,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC_ADAPTER_IDENT #define CONFIG_FSL_ESDHC_ADAPTER_IDENT
#endif #endif

View file

@ -670,7 +670,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#endif #endif
/* /*

View file

@ -519,7 +519,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_ESDHC_DETECT_QUIRK \ #define CONFIG_ESDHC_DETECT_QUIRK \
(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \ (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \

View file

@ -699,7 +699,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif #endif

View file

@ -473,7 +473,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_MMC_SPI #define CONFIG_MMC_SPI
#define CONFIG_CMD_MMC_SPI #define CONFIG_CMD_MMC_SPI
#define CONFIG_GENERIC_MMC
#endif #endif
/* Misc Extra Settings */ /* Misc Extra Settings */

View file

@ -100,7 +100,6 @@
/* /*
* SD (MMC) controller * SD (MMC) controller
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_FTSDC010 #define CONFIG_FTSDC010
#define CONFIG_FTSDC010_NUMBER 1 #define CONFIG_FTSDC010_NUMBER 1
#define CONFIG_FTSDC010_SDIO #define CONFIG_FTSDC010_SDIO

View file

@ -52,7 +52,6 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
/* USB Configs */ /* USB Configs */

View file

@ -87,8 +87,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
/* MMCIF */ /* MMCIF */
#define CONFIG_GENERIC_MMC
#define CONFIG_SH_MMCIF #define CONFIG_SH_MMCIF
#define CONFIG_SH_MMCIF_ADDR 0xee200000 #define CONFIG_SH_MMCIF_ADDR 0xee200000
#define CONFIG_SH_MMCIF_CLK 48000000 #define CONFIG_SH_MMCIF_CLK 48000000

View file

@ -75,7 +75,6 @@
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200} 115200}
#define CONFIG_GENERIC_MMC 1
/* /*
* USB configuration * USB configuration

View file

@ -76,9 +76,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200} 115200}
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* /*
* USB configuration * USB configuration
* Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard

View file

@ -67,7 +67,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_FSL_USDHC_NUM 3
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
#define CONFIG_FAT_WRITE #define CONFIG_FAT_WRITE

View file

@ -25,9 +25,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC support */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, before config block at the end of 1st "boot sector" */ /* Environment in eMMC, before config block at the end of 1st "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \

View file

@ -307,7 +307,6 @@
* SD/MMC * SD/MMC
*/ */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_MXC_MCI_REGS_BASE 0x10014000 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
#endif #endif

View file

@ -145,7 +145,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#endif #endif

View file

@ -103,7 +103,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#endif #endif

View file

@ -98,7 +98,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#endif #endif

View file

@ -122,7 +122,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#endif #endif

View file

@ -105,7 +105,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#endif #endif

View file

@ -110,7 +110,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#endif #endif

View file

@ -85,7 +85,6 @@
#define CONFIG_SYS_NR_PIOS 5 #define CONFIG_SYS_NR_PIOS 5
#define CONFIG_SYS_HSDRAMC #define CONFIG_SYS_HSDRAMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#define CONFIG_GENERIC_MMC
#define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI
#define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_DCACHE_LINESZ 32

View file

@ -104,7 +104,6 @@
#define CONFIG_SYS_NR_PIOS 5 #define CONFIG_SYS_NR_PIOS 5
#define CONFIG_SYS_HSDRAMC #define CONFIG_SYS_HSDRAMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#define CONFIG_GENERIC_MMC
#define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI
#define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_DCACHE_LINESZ 32

View file

@ -106,7 +106,6 @@
#define CONFIG_SYS_NR_PIOS 5 #define CONFIG_SYS_NR_PIOS 5
#define CONFIG_SYS_HSDRAMC #define CONFIG_SYS_HSDRAMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32 #define CONFIG_SYS_ICACHE_LINESZ 32

View file

@ -81,11 +81,6 @@
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 64 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 64
/*
* SD/MMC configuration
*/
#define CONFIG_GENERIC_MMC
/* /*
* Ethernet PHY configuration * Ethernet PHY configuration
*/ */

View file

@ -23,8 +23,6 @@
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_GENERIC_MMC
/* Environment configuration */ /* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x006ff000 #define CONFIG_ENV_OFFSET 0x006ff000

View file

@ -31,8 +31,6 @@
#define CONFIG_KONA_GPIO #define CONFIG_KONA_GPIO
/* MMC/SD Driver */ /* MMC/SD Driver */
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR #define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR #define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR #define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR

View file

@ -30,8 +30,6 @@
#define CONFIG_KONA_GPIO #define CONFIG_KONA_GPIO
/* MMC/SD Driver */ /* MMC/SD Driver */
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR #define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR #define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR #define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR

View file

@ -26,9 +26,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)

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@ -128,7 +128,6 @@
* SDH Settings * SDH Settings
*/ */
#if !defined(__ADSPBF512__) #if !defined(__ADSPBF512__)
#define CONFIG_GENERIC_MMC
#define CONFIG_BFIN_SDH #define CONFIG_BFIN_SDH
#endif #endif

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@ -115,7 +115,6 @@
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI #define CONFIG_MMC_SPI
/* /*

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@ -124,9 +124,6 @@
* SPI_MMC Settings * SPI_MMC Settings
*/ */
#define CONFIG_MMC_SPI #define CONFIG_MMC_SPI
#ifdef CONFIG_MMC_SPI
#define CONFIG_GENERIC_MMC
#endif
/* /*
* NAND Settings * NAND Settings

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@ -142,7 +142,6 @@
* SDH Settings * SDH Settings
*/ */
#if !defined(__ADSPBF544__) #if !defined(__ADSPBF544__)
#define CONFIG_GENERIC_MMC
#define CONFIG_BFIN_SDH #define CONFIG_BFIN_SDH
#endif #endif

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@ -126,7 +126,6 @@
/* /*
* SDH Settings * SDH Settings
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_BFIN_SDH #define CONFIG_BFIN_SDH
/* /*

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@ -95,8 +95,6 @@
/* USB */ /* USB */
#undef CONFIG_CMD_USB #undef CONFIG_CMD_USB
#define CONFIG_GENERIC_MMC
/* Module stop status bits */ /* Module stop status bits */
/* INTC-RT */ /* INTC-RT */
#define CONFIG_SMSTP0_ENA 0x00400000 #define CONFIG_SMSTP0_ENA 0x00400000

View file

@ -48,7 +48,6 @@
/* MMC/SD IP block */ /* MMC/SD IP block */
#if defined(CONFIG_EMMC_BOOT) #if defined(CONFIG_EMMC_BOOT)
#define CONFIG_GENERIC_MMC
#define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_SUPPORT_EMMC_BOOT
#endif /* CONFIG_EMMC_BOOT */ #endif /* CONFIG_EMMC_BOOT */

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@ -43,7 +43,6 @@
/* GPIO */ /* GPIO */
/* MMC/SD IP block */ /* MMC/SD IP block */
#define CONFIG_GENERIC_MMC
#define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_SUPPORT_EMMC_BOOT
/* Always 64 KiB env size */ /* Always 64 KiB env size */

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@ -30,9 +30,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)

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@ -29,9 +29,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)

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@ -43,7 +43,6 @@
/* /*
* SDIO/MMC Card Configuration * SDIO/MMC Card Configuration
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
/* Partition support */ /* Partition support */

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@ -118,7 +118,6 @@
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI #define CONFIG_MMC_SPI
/* /*

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@ -116,7 +116,6 @@
/* /*
* SPI_MMC Settings * SPI_MMC Settings
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SPI #define CONFIG_MMC_SPI
/* /*

View file

@ -80,8 +80,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200} 115200}
#define CONFIG_GENERIC_MMC
/* USB */ /* USB */
#define CONFIG_USB_OMAP3 #define CONFIG_USB_OMAP3
#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI

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@ -87,8 +87,6 @@
#define CONFIG_OMAP_GPIO #define CONFIG_OMAP_GPIO
#define CONFIG_GENERIC_MMC
/* USB */ /* USB */
#define CONFIG_USB_MUSB_AM35X #define CONFIG_USB_MUSB_AM35X

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@ -65,7 +65,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
#define CONFIG_FAT_WRITE #define CONFIG_FAT_WRITE

View file

@ -24,9 +24,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC support */
#define CONFIG_GENERIC_MMC
/* USB host support */ /* USB host support */
#define CONFIG_USB_EHCI #define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_EHCI_TEGRA

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@ -25,9 +25,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC support */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, before config block at the end of 1st "boot sector" */ /* Environment in eMMC, before config block at the end of 1st "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \

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@ -57,8 +57,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 1 #define CONFIG_SYS_FSL_ESDHC_NUM 1
#define CONFIG_GENERIC_MMC
#define CONFIG_RBTREE #define CONFIG_RBTREE
#define CONFIG_LZO #define CONFIG_LZO
#define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */ #define CONFIG_CMD_UBIFS /* increases size by almost 60 KB */

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@ -23,8 +23,6 @@
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_GENERIC_MMC
#undef CONFIG_USB_MAX_CONTROLLER_COUNT #undef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1

View file

@ -206,8 +206,6 @@
/* /*
* MMC * MMC
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR

View file

@ -620,7 +620,6 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_GENERIC_MMC
#endif #endif
/* Hash command with SHA acceleration supported in hardware */ /* Hash command with SHA acceleration supported in hardware */

View file

@ -24,8 +24,6 @@
#define CONFIG_SCSI_DEV_LIST \ #define CONFIG_SCSI_DEV_LIST \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
#define CONFIG_GENERIC_MMC
/* Environment configuration */ /* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0 #define CONFIG_ENV_OFFSET 0

View file

@ -442,7 +442,6 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
#define CONFIG_GENERIC_MMC
#endif #endif
/* /*

View file

@ -310,11 +310,6 @@
#undef CONFIG_CMD_ENV #undef CONFIG_CMD_ENV
#endif #endif
/* SD/MMC configuration */
#ifndef CONFIG_USE_NOR
#define CONFIG_GENERIC_MMC
#endif
#ifndef CONFIG_DIRECT_NOR_BOOT #ifndef CONFIG_DIRECT_NOR_BOOT
/* defines for SPL */ /* defines for SPL */
#define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_FRAMEWORK

View file

@ -23,9 +23,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_DEV 0

View file

@ -43,7 +43,6 @@
/* /*
* SDIO/MMC Card Configuration * SDIO/MMC Card Configuration
*/ */
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
/* /*

View file

@ -28,8 +28,6 @@
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_GENERIC_MMC
#undef CONFIG_USB_MAX_CONTROLLER_COUNT #undef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1

View file

@ -31,9 +31,6 @@
/* Generic Timer Definitions */ /* Generic Timer Definitions */
#define COUNTER_FREQUENCY 19000000 #define COUNTER_FREQUENCY 19000000
/* This are needed to have proper mmc support */
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_LDSCRIPT "board/qualcomm/dragonboard410c/u-boot.lds" #define CONFIG_SYS_LDSCRIPT "board/qualcomm/dragonboard410c/u-boot.lds"
/* Fixup - in init code we switch from device to host mode, /* Fixup - in init code we switch from device to host mode,

View file

@ -21,9 +21,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_DEV 0

View file

@ -126,7 +126,6 @@
/* MMC */ /* MMC */
#ifdef CONFIG_CMD_MMC #ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI #define CONFIG_GENERIC_ATMEL_MCI
#define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8
#endif #endif

View file

@ -37,7 +37,6 @@
#define CONFIG_BAUDRATE 115200 #define CONFIG_BAUDRATE 115200
/* SD/MMC configuration */ /* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
/* PWM */ /* PWM */

View file

@ -26,9 +26,6 @@
#undef CONFIG_SCSI_AHCI #undef CONFIG_SCSI_AHCI
#undef CONFIG_SCSI #undef CONFIG_SCSI
/* SD/MMC support */
#define CONFIG_GENERIC_MMC
/* 10/100M Ethernet support */ /* 10/100M Ethernet support */
#define CONFIG_DESIGNWARE_ETH #define CONFIG_DESIGNWARE_ETH
#define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_DW_ALTDESCRIPTOR

View file

@ -64,7 +64,6 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
/* USB Configs */ /* USB Configs */

View file

@ -94,7 +94,6 @@
#define CONFIG_SMSTP7_ENA 0x00200000 #define CONFIG_SMSTP7_ENA 0x00200000
/* SDHI */ /* SDHI */
#define CONFIG_GENERIC_MMC
#define CONFIG_SH_SDHI_FREQ 97500000 #define CONFIG_SH_SDHI_FREQ 97500000
#endif /* __GOSE_H */ #endif /* __GOSE_H */

View file

@ -26,9 +26,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_HARMONY #define CONFIG_MACH_TYPE MACH_TYPE_HARMONY
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* NAND support */ /* NAND support */
#define CONFIG_CMD_NAND #define CONFIG_CMD_NAND
#define CONFIG_TEGRA_NAND #define CONFIG_TEGRA_NAND

View file

@ -69,7 +69,6 @@
#define CONFIG_HIKEY_GPIO #define CONFIG_HIKEY_GPIO
/* SD/MMC configuration */ /* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOUNCE_BUFFER
#define CONFIG_FS_EXT4 #define CONFIG_FS_EXT4

View file

@ -26,8 +26,6 @@
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_FPGAD #define CONFIG_CMD_FPGAD
#define CONFIG_CMD_IOLOOP #define CONFIG_CMD_IOLOOP

View file

@ -134,11 +134,6 @@
#define CONFIG_JFFS2_NAND #define CONFIG_JFFS2_NAND
#define CONFIG_MXC_NAND_HWECC #define CONFIG_MXC_NAND_HWECC
/*
* SD/MMC
*/
#define CONFIG_GENERIC_MMC
/* /*
* GPIO * GPIO
*/ */

View file

@ -25,9 +25,6 @@
/* I2C */ /* I2C */
#define CONFIG_SYS_I2C_TEGRA #define CONFIG_SYS_I2C_TEGRA
/* SD/MMC */
#define CONFIG_GENERIC_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */ /* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)

View file

@ -60,9 +60,6 @@
#define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL
#define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */ #define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */
/* MMC/SD */
#define CONFIG_GENERIC_MMC
#undef CONFIG_ENV_IS_IN_NAND #undef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_IS_IN_FAT #define CONFIG_ENV_IS_IN_FAT
#define FAT_ENV_INTERFACE "mmc" #define FAT_ENV_INTERFACE "mmc"

View file

@ -84,12 +84,6 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
/*
* MMC
*/
#define CONFIG_GENERIC_MMC
/* /*
* Power * Power
*/ */

View file

@ -94,7 +94,6 @@
#define CONFIG_SMSTP7_ENA 0x00200000 #define CONFIG_SMSTP7_ENA 0x00200000
/* SD */ /* SD */
#define CONFIG_GENERIC_MMC
#define CONFIG_SH_SDHI_FREQ 97500000 #define CONFIG_SH_SDHI_FREQ 97500000
#endif /* __KOELSCH_H */ #endif /* __KOELSCH_H */

View file

@ -86,8 +86,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
/* MMC */ /* MMC */
#define CONFIG_GENERIC_MMC
#define CONFIG_SH_MMCIF #define CONFIG_SH_MMCIF
#define CONFIG_SH_MMCIF_ADDR 0xEE220000 #define CONFIG_SH_MMCIF_ADDR 0xEE220000
#define CONFIG_SH_MMCIF_CLK 97500000 #define CONFIG_SH_MMCIF_CLK 97500000

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@ -213,9 +213,6 @@
#define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_SIZE (16 << 10) #define CONFIG_ENV_SIZE (16 << 10)
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
/* additions for new relocation code, must added to all boards */ /* additions for new relocation code, must added to all boards */
#define CONFIG_SYS_SDRAM_BASE 0xc0000000 #define CONFIG_SYS_SDRAM_BASE 0xc0000000

View file

@ -134,7 +134,6 @@
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#endif #endif
/* SATA */ /* SATA */

View file

@ -47,7 +47,6 @@
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#endif #endif
/* SATA */ /* SATA */

View file

@ -156,7 +156,6 @@
*/ */
#define CONFIG_CMD_MMC #define CONFIG_CMD_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
/* SATA */ /* SATA */
#define CONFIG_CMD_SCSI #define CONFIG_CMD_SCSI

View file

@ -393,7 +393,6 @@ unsigned long get_board_ddr_clk(void);
* MMC * MMC
*/ */
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
/* SPI */ /* SPI */
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)

View file

@ -294,7 +294,6 @@
* MMC * MMC
*/ */
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_GENERIC_MMC
/* SPI */ /* SPI */
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)

View file

@ -130,7 +130,6 @@
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#endif #endif
/* DSPI */ /* DSPI */

View file

@ -116,7 +116,6 @@
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#endif #endif
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */

View file

@ -136,7 +136,6 @@
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#endif #endif
/* Debug Server firmware */ /* Debug Server firmware */

View file

@ -353,7 +353,6 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_MMC #ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC #define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#define CONFIG_GENERIC_MMC
#endif #endif
/* Initial environment variables */ /* Initial environment variables */

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