Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-03-16 23:07:00 +00:00
Code Issues Projects Releases Packages Wiki Activity

Merge branch 'master' of ssh://10.10.0.7/home/wd/git/u-boot/master

Browse source
This commit is contained in:
Wolfgang Denk 2008-09-03 23:07:41 +02:00
commit 53c987f513
148 changed files with 1206 additions and 846 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
View file

@ -26,6 +26,7 @@
#include <common.h>
#include <command.h>
#include <pci.h>
#include <netdev.h>
#include "articiaS.h"
#include "memio.h"
#include "via686.h"
@ -111,3 +112,11 @@ void pci_init_board (void)
articiaS_pci_init ();
#endif
}
int board_eth_init(bd_t *bis)
{
#if defined(CONFIG_3COM)
eth_3com_initialize(bis);
#endif
return 0;
}

1
board/MAI/AmigaOneG3SE/enet.c
View file

@ -28,6 +28,7 @@
#include <common.h>
#include <malloc.h>
#include <net.h>
#include <netdev.h>
#include <asm/io.h>
#include <pci.h>

6
board/Marvell/db64360/db64360.c
View file

@ -33,6 +33,7 @@
#include "../include/pci.h"
#include "../include/mv_gen_reg.h"
#include <net.h>
#include <netdev.h>
#include "eth.h"
#include "mpsc.h"
@ -929,3 +930,8 @@ void board_prebootm_init ()
icache_disable ();
dcache_disable ();
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/Marvell/db64460/db64460.c
View file

@ -33,6 +33,7 @@
#include "../include/pci.h"
#include "../include/mv_gen_reg.h"
#include <net.h>
#include <netdev.h>
#include "eth.h"
#include "mpsc.h"
@ -929,3 +930,8 @@ void board_prebootm_init ()
icache_disable ();
dcache_disable ();
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

7
board/a3000/a3000.c
View file

@ -27,6 +27,7 @@
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <netdev.h>
int checkboard (void)
{
@ -109,3 +110,9 @@ void pci_init_board(void)
{
pci_mpc824x_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/amcc/katmai/katmai.c
View file

@ -27,6 +27,7 @@
#include <i2c.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <netdev.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/gpio.h>
@ -447,3 +448,8 @@ int post_hotkeys_pressed(void)
return (ctrlc());
}
#endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/amcc/taihu/taihu.c
View file

@ -28,6 +28,7 @@
#include <asm/processor.h>
#include <asm/io.h>
#include <spi.h>
#include <netdev.h>
#include <asm/gpio.h>
extern int lcd_init(void);
@ -200,3 +201,8 @@ int pci_pre_init(struct pci_controller *hose)
return 1;
}
#endif /* CONFIG_PCI */
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/amcc/taishan/taishan.c
View file

@ -27,6 +27,7 @@
#include <asm/processor.h>
#include <spd_sdram.h>
#include <ppc4xx_enet.h>
#include <netdev.h>
#ifdef CFG_INIT_SHOW_RESET_REG
void show_reset_reg(void);
@ -311,3 +312,8 @@ int post_hotkeys_pressed(void)
return (ctrlc());
}
#endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/amcc/yucca/yucca.c
View file

@ -28,6 +28,7 @@
#include <common.h>
#include <ppc4xx.h>
#include <i2c.h>
#include <netdev.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/4xx_pcie.h>
@ -952,3 +953,8 @@ int onboard_pci_arbiter_selected(int core_pci)
#endif
return (BOARD_OPTION_NOT_SELECTED);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

7
board/amirix/ap1000/ap1000.c
View file

@ -23,6 +23,7 @@
#include <common.h>
#include <command.h>
#include <netdev.h>
#include <asm/processor.h>
#include "powerspan.h"
@ -697,3 +698,9 @@ U_BOOT_CMD (swrecon, 1, 0, do_swreconfig,
"swrecon - trigger a board reconfigure to the software selected configuration\n",
"\n"
" - trigger a board reconfigure to the software selected configuration\n");
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

11
board/atmel/at91cap9adk/at91cap9adk.c
View file

@ -30,11 +30,13 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/arch/hardware.h>
#include <lcd.h>
#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>
#define MP_BLOCK_3_BASE 0xFDF00000
@ -376,3 +378,12 @@ void reset_phy(void)
#endif
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00);
#endif
return rc;
}

11
board/atmel/at91sam9260ek/at91sam9260ek.c
View file

@ -30,9 +30,11 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/arch/hardware.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -248,3 +250,12 @@ void reset_phy(void)
#endif
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00);
#endif
return rc;
}

11
board/atmel/at91sam9263ek/at91sam9263ek.c
View file

@ -31,11 +31,13 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/arch/hardware.h>
#include <lcd.h>
#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -308,3 +310,12 @@ void reset_phy(void)
#endif
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)AT91_BASE_EMAC, 0x00);
#endif
return rc;
}

3
board/atmel/atngw100/atngw100.c
View file

@ -26,6 +26,7 @@
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hmatrix.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -93,8 +94,6 @@ void board_init_info(void)
gd->bd->bi_phy_id[1] = 0x03;
}
extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bi)
{

3
board/atmel/atstk1000/atstk1000.c
View file

@ -26,6 +26,7 @@
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hmatrix.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -116,8 +117,6 @@ void board_init_info(void)
gd->bd->bi_phy_id[1] = 0x11;
}
extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bi)
{

7
board/bc3450/bc3450.c
View file

@ -33,6 +33,7 @@
#include <common.h>
#include <mpc5xxx.h>
#include <pci.h>
#include <netdev.h>
#ifdef CONFIG_VIDEO_SM501
#include <sm501.h>
@ -669,3 +670,9 @@ int board_get_height (void)
}
#endif /* CONFIG_VIDEO_SM501 */
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Built in FEC comes first */
return pci_eth_init(bis);
}

3
board/bf537-stamp/bf537-stamp.c
View file

@ -32,6 +32,7 @@
#include <asm/io.h>
#include <net.h>
#include <asm/mach-common/bits/bootrom.h>
#include <netdev.h>
/**
* is_valid_ether_addr - Determine if the given Ethernet address is valid
@ -156,8 +157,6 @@ int misc_init_r(void)
#if defined(CONFIG_BFIN_MAC)
extern int bfin_EMAC_initialize(bd_t *bis);
int board_eth_init(bd_t *bis)
{
return bfin_EMAC_initialize(bis);

6
board/cpc45/cpc45.c
View file

@ -27,6 +27,7 @@
#include <asm/io.h>
#include <pci.h>
#include <i2c.h>
#include <netdev.h>
int sysControlDisplay(int digit, uchar ascii_code);
extern void Plx9030Init(void);
@ -273,3 +274,8 @@ void ide_led (uchar led, uchar status)
writeb(val, BCSR_BASE + 0x04);
}
# endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/cpu87/cpu87.c
View file

@ -26,6 +26,7 @@
#include <mpc8260.h>
#include "cpu87.h"
#include <pci.h>
#include <netdev.h>
/*
* I/O Port configuration table
@ -339,3 +340,8 @@ void pci_init_board(void)
pci_mpc8250_init(&hose);
}
#endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/cu824/cu824.c
View file

@ -28,6 +28,7 @@
#include <mpc824x.h>
#include <asm/processor.h>
#include <pci.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -91,3 +92,8 @@ void pci_init_board(void)
{
pci_mpc824x_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/eXalion/eXalion.c
View file

@ -30,6 +30,7 @@
#include <asm/io.h>
#include <pci.h>
#include <ide.h>
#include <netdev.h>
#include "piix_pci.h"
#include "eXalion.h"
@ -290,3 +291,8 @@ void pci_init_board (void)
{
pci_mpc824x_init (&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

3
board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
View file

@ -18,6 +18,7 @@
* Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <common.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/sdram.h>
@ -87,8 +88,6 @@ void board_init_info(void)
}
#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
int board_eth_init(bd_t *bi)
{
return macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);

6
board/eltec/bab7xx/bab7xx.c
View file

@ -30,6 +30,7 @@
#include <74xx_7xx.h>
#include <ns87308.h>
#include <video_fb.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -244,3 +245,8 @@ void video_get_info_str (int line_number, char *info)
#endif
/*---------------------------------------------------------------------------*/
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/eltec/elppc/elppc.c
View file

@ -25,6 +25,7 @@
#include <command.h>
#include <mpc106.h>
#include <video_fb.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -172,3 +173,8 @@ void video_get_info_str (int line_number, char *info)
return;
}
#endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/esd/adciop/adciop.c
View file

@ -22,6 +22,7 @@
*/
#include <common.h>
#include <netdev.h>
#include "adciop.h"
/* ------------------------------------------------------------------------- */
@ -95,3 +96,8 @@ int testdram (void)
}
/* ------------------------------------------------------------------------- */
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

10
board/esd/apc405/apc405.c
View file

@ -423,16 +423,6 @@ int checkboard (void)
return 0;
}
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
#ifdef CONFIG_IDE_RESET
void ide_set_reset(int on)
{

1
board/esd/ar405/u-boot.lds
View file

@ -79,7 +79,6 @@ SECTIONS
common/cmd_mem.o (.text)
common/cmd_nvedit.o (.text)
common/console.o (.text)
common/lists.o (.text)
common/main.o (.text)
/*

23
board/esd/ash405/ash405.c
View file

@ -82,15 +82,6 @@ int board_early_init_f (void)
return 0;
}
/* ------------------------------------------------------------------------- */
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
@ -205,20 +196,6 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP

1
board/esd/canbt/u-boot.lds
View file

@ -78,7 +78,6 @@ SECTIONS
common/cmd_mem.o (.text)
common/cmd_nvedit.o (.text)
common/console.o (.text)
common/lists.o (.text)
common/main.o (.text)
net/net.o (.text)

21
board/esd/cms700/cms700.c
View file

@ -77,15 +77,6 @@ int board_early_init_f (void)
return 0;
}
/* ------------------------------------------------------------------------- */
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
/* adjust flash start and offset */
@ -141,18 +132,6 @@ int checkboard (void)
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
#if defined(CFG_EEPROM_WREN)
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state

21
board/esd/cpci2dp/cpci2dp.c
View file

@ -67,13 +67,6 @@ int board_early_init_f (void)
return 0;
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
unsigned long cntrl0Reg;
@ -115,20 +108,6 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
#if defined(CFG_EEPROM_WREN)
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state

19
board/esd/cpci405/cpci405.c
View file

@ -255,11 +255,6 @@ int cpci405_version(void)
}
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
unsigned long cntrl0Reg;
@ -493,18 +488,6 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
@ -516,8 +499,6 @@ void reset_phy(void)
#endif
}
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_CPCI405_VER2
#ifdef CONFIG_IDE_RESET

6
board/esd/cpci5200/cpci5200.c
View file

@ -32,6 +32,7 @@
#include <mpc5xxx.h>
#include <pci.h>
#include <command.h>
#include <netdev.h>
#include "mt46v16m16-75.h"
@ -259,6 +260,11 @@ void init_ata_reset(void)
}
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
int do_writepci(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
unsigned int addr;

19
board/esd/cpciiser4/cpciiser4.c
View file

@ -183,22 +183,3 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
return (16 * 1024 * 1024);
}
/* ------------------------------------------------------------------------- */
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 16 MB - ok\n");
return (0);
}
/* ------------------------------------------------------------------------- */

16
board/esd/dasa_sim/dasa_sim.c
View file

@ -22,6 +22,7 @@
*/
#include <common.h>
#include <netdev.h>
#include "dasa_sim.h"
/* ------------------------------------------------------------------------- */
@ -203,22 +204,7 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
return (16 * 1024 * 1024);
}
/* ------------------------------------------------------------------------- */
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 16 MB - ok\n");
return (0);
}
/* ------------------------------------------------------------------------- */

1
board/esd/dasa_sim/u-boot.lds
View file

@ -78,7 +78,6 @@ SECTIONS
common/cmd_mem.o (.text)
common/cmd_nvedit.o (.text)
common/console.o (.text)
common/lists.o (.text)
common/main.o (.text)
board/esd/dasa_sim/flash.o (.text)

36
board/esd/dp405/dp405.c
View file

@ -74,15 +74,6 @@ int board_early_init_f (void)
return 0;
}
/* ------------------------------------------------------------------------- */
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
/* adjust flash start and offset */
@ -119,30 +110,3 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
#if 0
printf("\nmb0cf=%x\n", val); /* test-only */
printf("strap=%x\n", mfdcr(strap)); /* test-only */
#endif
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 16 MB - ok\n");
return (0);
}

15
board/esd/du405/du405.c
View file

@ -198,18 +198,3 @@ int checkboard (void)
return 0;
}
phys_size_t initdram (int board_type)
{
return (16 * 1024 * 1024);
}
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 16 MB - ok\n");
return (0);
}

17
board/esd/hh405/hh405.c
View file

@ -643,23 +643,6 @@ int checkboard (void)
return 0;
}
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
#if 0
printf("\nmb0cf=%x\n", val); /* test-only */
printf("strap=%x\n", mfdcr(strap)); /* test-only */
#endif
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
#ifdef CONFIG_IDE_RESET
void ide_set_reset(int on)
{

18
board/esd/hub405/hub405.c
View file

@ -101,13 +101,6 @@ int board_early_init_f (void)
return 0;
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
@ -227,14 +220,3 @@ int checkboard (void)
return 0;
}
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}

6
board/esd/mecp5200/mecp5200.c
View file

@ -32,6 +32,7 @@
#include <mpc5xxx.h>
#include <pci.h>
#include <command.h>
#include <netdev.h>
#include "mt46v16m16-75.h"
@ -259,3 +260,8 @@ void init_power_switch(void)
__asm__ volatile ("sync");
}
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

32
board/esd/ocrtc/ocrtc.c
View file

@ -62,13 +62,6 @@ int board_early_init_f (void)
return 0;
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
/*
* Check Board Identity:
*/
@ -99,28 +92,3 @@ int checkboard (void)
return (0);
}
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr (memcfga, mem_mb0cf);
val = mfdcr (memcfgd);
#if 0
printf ("\nmb0cf=%x\n", val); /* test-only */
printf ("strap=%x\n", mfdcr (strap)); /* test-only */
#endif
return (4 * 1024 * 1024 << ((val & 0x000e0000) >> 17));
}
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 16 MB - ok\n");
return (0);
}

6
board/esd/pf5200/pf5200.c
View file

@ -32,6 +32,7 @@
#include <mpc5xxx.h>
#include <pci.h>
#include <command.h>
#include <netdev.h>
#include "mt46v16m16-75.h"
@ -264,6 +265,11 @@ void init_power_switch(void)
__asm__ volatile ("sync");
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
void power_set_reset(int power)
{
debug("ide_set_reset(%d)\n", power);

3
board/esd/plu405/config.mk
View file

@ -25,5 +25,4 @@
# esd PLU405 boards
#
TEXT_BASE = 0xFFFC0000
#TEXT_BASE = 0x00FC0000
TEXT_BASE = 0xFFFA0000

58
board/esd/plu405/plu405.c
View file

@ -65,11 +65,9 @@ au_image_t au_image[] = {
int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
/* Prototypes */
int gunzip(void *, int, unsigned char *, unsigned long *);
int board_early_init_f (void)
{
/*
@ -89,24 +87,18 @@ int board_early_init_f (void)
mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
mtdcr(uictr, 0x10000000); /* set int trigger levels */
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest prio */
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
/*
* EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
* EBC Configuration Register: set ready timeout to
* 512 ebc-clks -> ca. 15 us
*/
mtebc (epcr, 0xa8400000); /* ebc always driven */
return 0;
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
@ -132,13 +124,16 @@ int misc_init_r (void)
printf("\nFPGA: Booting failed ");
switch (status) {
case ERROR_FPGA_PRG_INIT_LOW:
printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
printf("(Timeout: INIT not low "
"after asserting PROGRAM*)\n");
break;
case ERROR_FPGA_PRG_INIT_HIGH:
printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
printf("(Timeout: INIT not high "
"after deasserting PROGRAM*)\n");
break;
case ERROR_FPGA_PRG_DONE:
printf("(Timeout: DONE not high after programming FPGA)\n ");
printf("(Timeout: DONE not high "
"after programming FPGA)\n");
break;
}
@ -184,15 +179,16 @@ int misc_init_r (void)
/*
* Reset external DUARTs
*/
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
udelay(10); /* wait 10us */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
udelay(1000); /* wait 1ms */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_DUART_RST);
udelay(10);
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CFG_DUART_RST);
udelay(1000);
/*
* Set NAND-FLASH GPIO signals to default
*/
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
out_be32((void*)GPIO0_OR,
in_be32((void*)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_NAND_CE);
/*
@ -210,7 +206,6 @@ int misc_init_r (void)
return (0);
}
/*
* Check Board Identity:
*/
@ -231,18 +226,6 @@ int checkboard (void)
return 0;
}
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
#ifdef CONFIG_IDE_RESET
void ide_set_reset(int on)
{
@ -260,7 +243,6 @@ void ide_set_reset(int on)
}
#endif /* CONFIG_IDE_RESET */
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
@ -272,7 +254,6 @@ void reset_phy(void)
#endif
}
#if defined(CFG_EEPROM_WREN)
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state
@ -290,17 +271,20 @@ int eeprom_write_enable (unsigned dev_addr, int state)
switch (state) {
case 1:
/* Enable write access, clear bit GPIO0. */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) & ~CFG_EEPROM_WP);
out_be32((void*)GPIO0_OR,
in_be32((void*)GPIO0_OR) & ~CFG_EEPROM_WP);
state = 0;
break;
case 0:
/* Disable write access, set bit GPIO0. */
out_be32((void*)GPIO0_OR, in_be32((void*)GPIO0_OR) | CFG_EEPROM_WP);
out_be32((void*)GPIO0_OR,
in_be32((void*)GPIO0_OR) | CFG_EEPROM_WP);
state = 0;
break;
default:
/* Read current status back. */
state = (0 == (in_be32((void*)GPIO0_OR) & CFG_EEPROM_WP));
state = (0 == (in_be32((void*)GPIO0_OR) &
CFG_EEPROM_WP));
break;
}
}

14
board/esd/plu405/u-boot.lds
View file

@ -61,19 +61,6 @@ SECTIONS
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
cpu/ppc4xx/4xx_enet.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/environment.o(.text)*/
*(.text)
*(.fixup)
@ -124,7 +111,6 @@ SECTIONS
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }

18
board/esd/pmc405/pmc405.c
View file

@ -155,24 +155,6 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
#if 0
printf("\nmb0cf=%x\n", val); /* test-only */
printf("strap=%x\n", mfdcr(strap)); /* test-only */
#endif
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
void reset_phy(void)
{

36
board/esd/voh405/voh405.c
View file

@ -104,13 +104,6 @@ int board_early_init_f (void)
return 0;
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
@ -303,35 +296,6 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
#if 0
printf("\nmb0cf=%x\n", val); /* test-only */
printf("strap=%x\n", mfdcr(strap)); /* test-only */
#endif
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 16 MB - ok\n");
return (0);
}
/* ------------------------------------------------------------------------- */
#ifdef CONFIG_IDE_RESET
void ide_set_reset(int on)
{

12
board/esd/vom405/u-boot.lds
View file

@ -61,18 +61,6 @@ SECTIONS
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/4xx_uart.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/environment.o(.text)*/
*(.text)
*(.fixup)

25
board/esd/vom405/vom405.c
View file

@ -37,7 +37,6 @@ const unsigned char fpgadata[] =
};
int filesize = sizeof(fpgadata);
int board_early_init_f (void)
{
/*
@ -76,9 +75,6 @@ int board_early_init_f (void)
return 0;
}
/* ------------------------------------------------------------------------- */
int misc_init_r (void)
{
/* adjust flash start and offset */
@ -88,11 +84,9 @@ int misc_init_r (void)
return (0);
}
/*
* Check Board Identity:
*/
int checkboard (void)
{
char str[64];
@ -127,25 +121,6 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
#if 0
printf("\nmb0cf=%x\n", val); /* test-only */
printf("strap=%x\n", mfdcr(strap)); /* test-only */
#endif
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP

21
board/esd/wuh405/wuh405.c
View file

@ -80,15 +80,6 @@ int board_early_init_f (void)
return 0;
}
/* ------------------------------------------------------------------------- */
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
@ -202,15 +193,3 @@ int checkboard (void)
return 0;
}
/* ------------------------------------------------------------------------- */
phys_size_t initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}

6
board/etin/debris/debris.c
View file

@ -25,6 +25,7 @@
#include <mpc824x.h>
#include <pci.h>
#include <i2c.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -177,3 +178,8 @@ int misc_init_r(void)
(char*)&gd->bd->bi_enetaddr[0], 6);
return 0;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/etin/kvme080/kvme080.c
View file

@ -25,6 +25,7 @@
#include <mpc824x.h>
#include <pci.h>
#include <i2c.h>
#include <netdev.h>
#include <asm/processor.h>
int checkboard(void)
@ -191,3 +192,8 @@ void nvram_write(long dest, const void *src, size_t count)
asm volatile("sync");
}
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

1
board/evb64260/eth.c
View file

@ -27,6 +27,7 @@ Skeleton NIC driver for Etherboot
#include <asm/cache.h>
#include <miiphy.h>
#include <net.h>
#include <netdev.h>
#include "eth.h"
#include "eth_addrtbl.h"

8
board/evb64260/evb64260.c
View file

@ -31,6 +31,7 @@
#include <galileo/pci.h>
#include <galileo/gt64260R.h>
#include <net.h>
#include <netdev.h>
#include <asm/io.h>
#include "eth.h"
@ -248,7 +249,6 @@ int board_early_init_f (void)
sram_boot = 1;
#endif
if (!sram_boot)
memoryMapDeviceSpace(DEVICE0, CFG_DEV0_SPACE, CFG_DEV0_SIZE);
memoryMapDeviceSpace(DEVICE1, CFG_DEV1_SPACE, CFG_DEV1_SIZE);
@ -443,3 +443,9 @@ display_mem_map(void)
printf(" BOOT: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n",
base, size>>20, width);
}
int board_eth_init(bd_t *bis)
{
gt6426x_eth_initialize(bis);
return 0;
}

1
board/freescale/common/Makefile
View file

@ -36,6 +36,7 @@ COBJS-${CONFIG_FSL_DIU_FB} += fsl_diu_fb.o fsl_logo_bmp.o
COBJS-${CONFIG_FSL_PIXIS} += pixis.o
COBJS-${CONFIG_PQ_MDS_PIB} += pq-mds-pib.o
COBJS-${CONFIG_ID_EEPROM} += sys_eeprom.o
COBJS-${CONFIG_FSL_SGMII_RISER} += sgmii_riser.o
COBJS-${CONFIG_MPC8541CDS} += cds_pci_ft.o
COBJS-${CONFIG_MPC8548CDS} += cds_pci_ft.o

55
board/freescale/common/pixis.c
View file

@ -26,6 +26,7 @@
#include <command.h>
#include <watchdog.h>
#include <asm/cache.h>
#include <asm/io.h>
#include "pixis.h"
@ -282,6 +283,60 @@ U_BOOT_CMD(
"diswd - Disable watchdog timer \n",
NULL);
#ifdef CONFIG_FSL_SGMII_RISER
int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int which_tsec = -1;
uchar mask;
uchar switch_mask;
if (argc > 2)
if (strcmp(argv[1], "all") != 0)
which_tsec = simple_strtoul(argv[1], NULL, 0);
switch (which_tsec) {
case 1:
mask = PIXIS_VSPEED2_TSEC1SER;
switch_mask = PIXIS_VCFGEN1_TSEC1SER;
break;
case 3:
mask = PIXIS_VSPEED2_TSEC3SER;
switch_mask = PIXIS_VCFGEN1_TSEC3SER;
break;
default:
mask = PIXIS_VSPEED2_TSEC1SER | PIXIS_VSPEED2_TSEC3SER;
switch_mask = PIXIS_VCFGEN1_TSEC1SER | PIXIS_VCFGEN1_TSEC3SER;
break;
}
/* Toggle whether the switches or FPGA control the settings */
if (!strcmp(argv[argc - 1], "switch"))
clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
switch_mask);
else
setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1,
switch_mask);
/* If it's not the switches, enable or disable SGMII, as specified */
if (!strcmp(argv[argc - 1], "on"))
clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
else if (!strcmp(argv[argc - 1], "off"))
setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask);
return 0;
}
U_BOOT_CMD(
pixis_set_sgmii, CFG_MAXARGS, 1, pixis_set_sgmii,
"pixis_set_sgmii"
" - Enable or disable SGMII mode for a given TSEC \n",
"\npixis_set_sgmii [TSEC num] <on|off|switch>\n"
" TSEC num: 1,2,3,4 or 'all'. 'all' is default.\n"
" on - enables SGMII\n"
" off - disables SGMII\n"
" switch - use switch settings\n");
#endif
/*
* This function takes the non-integral cpu:mpx pll ratio
* and converts it to an integer that can be used to assign

26
board/freescale/common/sgmii_riser.c Normal file
View file

@ -0,0 +1,26 @@
/*
* Freescale SGMII Riser Card
*
* This driver supports the SGMII Riser card found on the
* "DS" style of development board from Freescale.
*
* This software may be used and distributed according to the
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
* Copyright 2008 Freescale Semiconductor, Inc.
*
*/
#include <config.h>
#include <common.h>
#include <tsec.h>
void fsl_sgmii_riser_init(struct tsec_info_struct *tsec_info, int num)
{
int i;
for (i = 0; i < num; i++)
if (tsec_info[i].flags & TSEC_SGMII)
tsec_info[i].phyaddr += SGMII_RISER_PHY_OFFSET;
}

15
board/freescale/common/sgmii_riser.h Normal file
View file

@ -0,0 +1,15 @@
/*
* Freescale SGMII Riser Card
*
* This driver supports the SGMII Riser card found on the
* "DS" style of development board from Freescale.
*
* This software may be used and distributed according to the
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
* Copyright 2008 Freescale Semiconductor, Inc.
*
*/
void fsl_sgmii_riser_init(struct tsec_info_struct *tsec_info, int num);

10
board/freescale/mpc7448hpc2/mpc7448hpc2.c
View file

@ -32,6 +32,7 @@
#include <common.h>
#include <74xx_7xx.h>
#include <fdt_support.h>
#include <netdev.h>
#undef DEBUG
@ -92,3 +93,12 @@ ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#if defined(CONFIG_TSI108_ETH)
rc = tsi108_eth_initialize(bis);
#endif
return rc;
}

7
board/freescale/mpc8315erdb/mpc8315erdb.c
View file

@ -29,6 +29,7 @@
#include <fdt_support.h>
#include <pci.h>
#include <mpc83xx.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -165,3 +166,9 @@ void ft_board_setup(void *blob, bd_t *bd)
fdt_tsec1_fixup(blob, bd);
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Initialize TSECs first */
return pci_eth_init(bis);
}

39
board/freescale/mpc8544ds/mpc8544ds.c
View file

@ -32,8 +32,11 @@
#include <miiphy.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <tsec.h>
#include <netdev.h>
#include "../common/pixis.h"
#include "../common/sgmii_riser.h"
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern void ddr_enable_ecc(unsigned int dram_size);
@ -463,6 +466,42 @@ get_board_sys_clk(ulong dummy)
return val;
}
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_TSEC_ENET
struct tsec_info_struct tsec_info[2];
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
int num = 0;
#ifdef CONFIG_TSEC1
SET_STD_TSEC_INFO(tsec_info[num], 1);
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
tsec_info[num].flags |= TSEC_SGMII;
num++;
#endif
#ifdef CONFIG_TSEC3
SET_STD_TSEC_INFO(tsec_info[num], 3);
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
tsec_info[num].flags |= TSEC_SGMII;
num++;
#endif
if (!num) {
printf("No TSECs initialized\n");
return 0;
}
if (io_sel & 1)
fsl_sgmii_riser_init(tsec_info, num);
tsec_eth_init(bis, tsec_info, num);
#endif
return pci_eth_init(bis);
}
#if defined(CONFIG_OF_BOARD_SETUP)
void

8
board/freescale/mpc8610hpcd/mpc8610hpcd.c
View file

@ -32,6 +32,7 @@
#include <libfdt.h>
#include <fdt_support.h>
#include <spd_sdram.h>
#include <netdev.h>
#include "../common/pixis.h"
@ -520,12 +521,7 @@ get_board_sys_clk(ulong dummy)
return val;
}
extern int uli526x_initialize(bd_t *);
int board_eth_init(bd_t *bis)
{
#if defined(CONFIG_ULI526)
uli526x_initialize(bis);
#endif
return 0;
return pci_eth_init(bis);
}

8
board/freescale/mpc8641hpcn/mpc8641hpcn.c
View file

@ -29,6 +29,7 @@
#include <asm/io.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <netdev.h>
#include "../common/pixis.h"
@ -379,3 +380,10 @@ get_board_sys_clk(ulong dummy)
return val;
}
int board_eth_init(bd_t *bis)
{
/* Initialize TSECs */
cpu_eth_init(bis);
return pci_eth_init(bis);
}

6
board/hidden_dragon/hidden_dragon.c
View file

@ -27,6 +27,7 @@
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <netdev.h>
int checkboard (void)
{
@ -93,3 +94,8 @@ void pci_init_board(void)
{
pci_mpc824x_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

7
board/icecube/icecube.c
View file

@ -29,6 +29,7 @@
#include <pci.h>
#include <asm/processor.h>
#include <libfdt.h>
#include <netdev.h>
#if defined(CONFIG_LITE5200B)
#include "mt46v32m16.h"
@ -390,3 +391,9 @@ ft_board_setup(void *blob, bd_t *bd)
ft_cpu_setup(blob, bd);
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Built in FEC comes first */
return pci_eth_init(bis);
}

8
board/incaip/incaip.c
View file

@ -23,6 +23,7 @@
#include <common.h>
#include <command.h>
#include <netdev.h>
#include <asm/addrspace.h>
#include <asm/inca-ip.h>
#include <asm/io.h>
@ -116,3 +117,10 @@ int checkboard (void)
return 0;
}
#if defined(CONFIG_INCA_IP_SWITCH)
int board_eth_init(bd_t *bis)
{
return inca_switch_initialize(bis);
}
#endif

7
board/integratorap/integratorap.c
View file

@ -39,6 +39,8 @@
#include <pci.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
void flash__init (void);
@ -647,3 +649,8 @@ ulong get_tbclk (void)
{
return CFG_HZ_CLOCK/div_clock;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/ixdp425/ixdp425.c
View file

@ -31,6 +31,7 @@
#include <common.h>
#include <command.h>
#include <malloc.h>
#include <netdev.h>
#include <asm/arch/ixp425.h>
DECLARE_GLOBAL_DATA_PTR;
@ -118,3 +119,8 @@ void pci_init_board(void)
pci_ixp_init(&hose);
}
#endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/linkstation/linkstation.c
View file

@ -26,6 +26,7 @@
#include <mpc824x.h>
#include <asm/io.h>
#include <ns16550.h>
#include <netdev.h>
#ifdef CONFIG_PCI
#include <pci.h>
@ -128,3 +129,8 @@ int board_early_init_f (void)
out_8((volatile u8*)UART_DCR, 1);
return 0;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

7
board/matrix_vision/mvbc_p/mvbc_p.c
View file

@ -35,6 +35,7 @@
#include <fpga.h>
#include <environment.h>
#include <fdt_support.h>
#include <netdev.h>
#include <asm/io.h>
#include "fpga.h"
#include "mvbc_p.h"
@ -324,3 +325,9 @@ void ft_board_setup(void *blob, bd_t *bd)
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Built in FEC comes first */
return pci_eth_init(bis);
}

3
board/mimc/mimc200/mimc200.c
View file

@ -20,6 +20,7 @@
* MA 02111-1307 USA
*/
#include <common.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/sdram.h>
@ -195,8 +196,6 @@ void spi_cs_deactivate(struct spi_slave *slave)
#endif /* CONFIG_ATMEL_SPI */
#ifdef CONFIG_CMD_NET
extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
int board_eth_init(bd_t *bi)
{
macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);

3
board/miromico/hammerhead/hammerhead.c
View file

@ -25,6 +25,7 @@
#include "../cpu/at32ap/at32ap700x/sm.h"
#include <common.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/sdram.h>
@ -51,8 +52,6 @@ static const struct sdram_config sdram_config = {
.refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
};
extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{

6
board/mousse/mousse.c
View file

@ -28,6 +28,7 @@
#include <common.h>
#include <mpc824x.h>
#include <netdev.h>
#include <asm/processor.h>
#include "mousse.h"
@ -84,3 +85,8 @@ int misc_init_f (void)
get_tod ();
return 0;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

12
board/mpc8540eval/mpc8540eval.c
View file

@ -24,6 +24,7 @@
*/
#include <common.h>
#include <netdev.h>
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/immap_85xx.h>
@ -247,3 +248,14 @@ long int fixed_sdram (void)
return (CFG_SDRAM_SIZE * 1024 * 1024);
}
#endif /* !defined(CONFIG_SPD_EEPROM) */
int board_eth_init(bd_t *bis)
{
/*
* This board either has PCI NICs or uses the CPU's TSECs
* pci_eth_init() will return 0 if no NICs found, so in that case
* returning -1 will force cpu_eth_init() to be called.
*/
int num = pci_eth_init(bis);
return (num <= 0 ? -1 : num);
}

6
board/musenki/musenki.c
View file

@ -24,6 +24,7 @@
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <netdev.h>
int checkboard (void)
{
@ -102,3 +103,8 @@ void pci_init_board(void)
{
pci_mpc824x_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/mvblue/mvblue.c
View file

@ -9,6 +9,7 @@
#include <mpc824x.h>
#include <asm/io.h>
#include <ns16550.h>
#include <netdev.h>
#ifdef CONFIG_PCI
#include <pci.h>
@ -245,4 +246,9 @@ void pci_init_board (void)
{
pci_mpc824x_init (&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
#endif

7
board/o2dnt/o2dnt.c
View file

@ -27,6 +27,7 @@
#include <common.h>
#include <mpc5xxx.h>
#include <pci.h>
#include <netdev.h>
#define SDRAM_MODE 0x00CD0000
#define SDRAM_CONTROL 0x504F0000
@ -180,3 +181,9 @@ void pci_init_board(void)
pci_mpc5xxx_init(&hose);
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Built in FEC comes first */
return pci_eth_init(bis);
}

6
board/oxc/oxc.c
View file

@ -25,6 +25,7 @@
#include <mpc824x.h>
#include <pci.h>
#include <i2c.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -215,3 +216,8 @@ int misc_init_r (void)
#endif
return (0);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/pcippc2/pcippc2.c
View file

@ -28,6 +28,7 @@
#include <linux/mtd/doc2000.h>
#include <watchdog.h>
#include <pci.h>
#include <netdev.h>
#include "hardware.h"
#include "pcippc2.h"
@ -243,3 +244,8 @@ U_BOOT_CMD(
#endif
#endif /* CONFIG_WATCHDOG */
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

7
board/pm520/pm520.c
View file

@ -27,6 +27,7 @@
#include <common.h>
#include <mpc5xxx.h>
#include <pci.h>
#include <netdev.h>
#if defined(CONFIG_MPC5200_DDR)
#include "mt46v16m16-75.h"
@ -321,3 +322,9 @@ void doc_init (void)
doc_probe (CFG_DOC_BASE);
}
#endif
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Built in FEC comes first */
return pci_eth_init(bis);
}

6
board/pm826/pm826.c
View file

@ -25,6 +25,7 @@
#include <ioports.h>
#include <mpc8260.h>
#include <pci.h>
#include <netdev.h>
/*
* I/O Port configuration table
@ -328,3 +329,8 @@ void pci_init_board(void)
pci_mpc8250_init(&hose);
}
#endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/pm828/pm828.c
View file

@ -25,6 +25,7 @@
#include <ioports.h>
#include <mpc8260.h>
#include <pci.h>
#include <netdev.h>
/*
* I/O Port configuration table
@ -361,3 +362,8 @@ void pci_init_board(void)
pci_mpc8250_init(&hose);
}
#endif
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

7
board/pm854/pm854.c
View file

@ -27,6 +27,7 @@
#include <common.h>
#include <pci.h>
#include <netdev.h>
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/immap_85xx.h>
@ -289,3 +290,9 @@ pci_init_board(void)
pci_mpc85xx_init(&hose);
#endif /* CONFIG_PCI */
}
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Intialize TSECs first */
return pci_eth_init(bis);
}

7
board/pm856/pm856.c
View file

@ -34,6 +34,7 @@
#include <ioports.h>
#include <spd_sdram.h>
#include <miiphy.h>
#include <netdev.h>
#if defined(CONFIG_DDR_ECC)
extern void ddr_enable_ecc(unsigned int dram_size);
@ -444,3 +445,9 @@ pci_init_board(void)
pci_mpc85xx_init(&hose);
#endif /* CONFIG_PCI */
}
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Intialize TSECs first */
return pci_eth_init(bis);
}

6
board/pn62/pn62.c
View file

@ -23,6 +23,7 @@
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <netdev.h>
#include "pn62.h"
@ -186,3 +187,8 @@ static int get_mac_address (int id, u8 * mac, char *string, int size)
mac[0], mac[1], mac[2],
mac[3], mac[4], mac[5]);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/ppmc7xx/ppmc7xx.c
View file

@ -10,6 +10,7 @@
#include <common.h>
#include <command.h>
#include <netdev.h>
/* Define some MPC107 (memory controller) registers */
@ -102,3 +103,8 @@ void do_reset( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] )
/* Should never get here */
while(1);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

9
board/purple/purple.c
View file

@ -23,6 +23,7 @@
#include <common.h>
#include <command.h>
#include <netdev.h>
#include <asm/inca-ip.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
@ -274,3 +275,11 @@ void copy_code (ulong dest_addr)
start += CFG_CACHELINE_SIZE;
}
}
#ifdef CONFIG_PLB2800_ETHER
int board_eth_init(bd_t *bis)
{
return plb2800_eth_initialize(bis);
}
#endif

5
board/r2dplus/r2dplus.c
View file

@ -76,3 +76,8 @@ void pci_init_board(void)
{
pci_sh7751_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/r7780mp/r7780mp.c
View file

@ -23,6 +23,7 @@
#include <asm/processor.h>
#include <asm/io.h>
#include <asm/pci.h>
#include <netdev.h>
#include "r7780mp.h"
int checkboard(void)
@ -77,3 +78,8 @@ void pci_init_board(void)
{
pci_sh7780_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/sandpoint/sandpoint.c
View file

@ -24,6 +24,7 @@
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <netdev.h>
int checkboard (void)
{
@ -99,3 +100,8 @@ void pci_init_board(void)
{
pci_mpc824x_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/sbc8240/sbc8240.c
View file

@ -28,6 +28,7 @@
#include <mpc824x.h>
#include <asm/processor.h>
#include <pci.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -103,3 +104,8 @@ int misc_init_r (void)
return (0);
}
#endif /* CONFIG_MISC_INIT_R */
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/sc3/sc3.c
View file

@ -37,6 +37,7 @@
#include <pci.h>
#include <i2c.h>
#include <malloc.h>
#include <netdev.h>
#undef writel
#undef writeb
@ -779,3 +780,8 @@ void pci_init_board(void)
hose.config_table = pci_solidcard3_config_table;
pci_405gp_init(&hose);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/sc520_cdp/sc520_cdp.c
View file

@ -29,6 +29,7 @@
#include <asm/ic/sc520.h>
#include <asm/ic/ali512x.h>
#include <spi.h>
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
@ -629,3 +630,8 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
#endif
return res;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

6
board/sc520_spunk/sc520_spunk.c
View file

@ -25,6 +25,7 @@
#include <common.h>
#include <pci.h>
#include <ssi.h>
#include <netdev.h>
#include <asm/io.h>
#include <asm/pci.h>
#include <asm/ic/sc520.h>
@ -676,3 +677,8 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
spi_eeprom_write(1, offset, buffer, len) :
mw_eeprom_write(1, offset, buffer, len);
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

3
board/sl8245/sl8245.c
View file

@ -24,6 +24,7 @@
#include <common.h>
#include <mpc824x.h>
#include <pci.h>
#include <netdev.h>
int checkboard (void)
{
@ -67,8 +68,6 @@ void pci_init_board(void)
pci_mpc824x_init(&hose);
}
extern int skge_initialize(bd_t *bis);
int board_eth_init(bd_t *bis)
{
int rc = 0;

6
board/sorcery/sorcery.c
View file

@ -26,6 +26,7 @@
#include <asm/processor.h>
#include <asm/mmu.h>
#include <pci.h>
#include <netdev.h>
phys_size_t initdram (int board_type)
{
@ -58,3 +59,8 @@ void pci_init_board (void)
pci_mpc8220_init (&hose);
#endif /* CONFIG_PCI */
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

8
board/stxssa/stxssa.c
View file

@ -39,6 +39,7 @@
#include <asm/io.h>
#include <spd_sdram.h>
#include <miiphy.h>
#include <netdev.h>
long int fixed_sdram (void);
@ -400,3 +401,10 @@ pci_init_board(void)
pci_mpc85xx_init(hose);
#endif /* CONFIG_PCI */
}
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Initialize TSECs first */
return pci_eth_init(bis);
}

5
board/tb0229/tb0229.c
View file

@ -46,3 +46,8 @@ int checkboard (void)
return 0;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

7
board/total5200/total5200.c
View file

@ -27,6 +27,7 @@
#include <common.h>
#include <mpc5xxx.h>
#include <pci.h>
#include <netdev.h>
#include "sdram.h"
@ -308,3 +309,9 @@ int board_get_height (void)
}
#endif /* CONFIG_VIDEO_SED13806 */
int board_eth_init(bd_t *bis)
{
cpu_eth_init(bis); /* Built in FEC comes first */
return pci_eth_init(bis);
}

Some files were not shown because too many files have changed in this diff Show more