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https://github.com/AsahiLinux/u-boot
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ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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parent
16ee0f2afd
commit
52b6b480db
22 changed files with 31 additions and 21 deletions
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@ -48,6 +48,16 @@
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#ifdef CONFIG_IMX8MM
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#define USDHC3_BASE_ADDR 0x30B60000
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#endif
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#define UART_BASE_ADDR(n) ( \
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!!sizeof(struct { \
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static_assert((n) >= 1 && (n) <= 4); \
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int pad; \
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}) * ( \
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(n) == 1 ? UART1_BASE_ADDR : \
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(n) == 2 ? UART2_BASE_ADDR : \
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(n) == 3 ? UART3_BASE_ADDR : \
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UART4_BASE_ADDR) \
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)
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#define TZASC_BASE_ADDR 0x32F80000
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@ -145,7 +145,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -91,7 +91,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -68,7 +68,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -66,7 +66,7 @@
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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/* UART */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -102,7 +102,7 @@
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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/* UART */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -107,7 +107,7 @@
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#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
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#endif
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -75,7 +75,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -64,7 +64,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */
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#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(4)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -98,7 +98,7 @@
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#define CONFIG_SYS_BOOTM_LEN SZ_256M
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/* UART */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -80,7 +80,7 @@
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#define PHYS_SDRAM_2 0x100000000
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#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
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#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -169,7 +169,7 @@
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#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
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#endif
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 2048
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@ -71,7 +71,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024
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@ -78,7 +78,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024
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@ -106,7 +106,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024
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@ -28,7 +28,7 @@
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Board and environment settings */
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
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#define CONFIG_HOSTNAME "kontron-mx8mm"
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#ifdef CONFIG_USB_EHCI_HCD
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@ -84,7 +84,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@ -84,7 +84,7 @@
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#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
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/* UART */
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -84,7 +84,7 @@
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#define PHYS_SDRAM_SIZE 0x80000000
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/* UART */
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -85,7 +85,7 @@
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024
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#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
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/* UART */
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#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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@ -101,7 +101,7 @@
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#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
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/* UART */
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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