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Merge tag 'u-boot-rockchip-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

Browse source 
- dts sync from kernel for rk3399 boards;
- Add Radxa Rock Pi N8, N10;
- Some feature update for Pinebook Pro;
This commit is contained in:
Tom Rini 2020-07-07 23:05:57 -04:00
commit 526fe06a5d
20 changed files with 966 additions and 13 deletions
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4
arch/arm/dts/Makefile
View file

@ -92,6 +92,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
rk3288-phycore-rdk.dtb \
rk3288-popmetal.dtb \
rk3288-rock2-square.dtb \
rk3288-rock-pi-n8.dtb \
rk3288-tinker.dtb \
rk3288-tinker-s.dtb \
rk3288-veyron-jerry.dtb \
@ -136,7 +137,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-roc-pc-mezzanine.dtb \
rk3399-rock-pi-4.dtb \
rk3399-rock960.dtb \
rk3399-rockpro64.dtb
rk3399-rockpro64.dtb \
rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \

33
arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi Normal file
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@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com>
*/
#include "rk3288-u-boot.dtsi"
&dmc {
rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
0x8 0x1f4>;
rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
0x0 0xc3 0x6 0x2>;
rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
};
&sdmmc {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&uart2 {
u-boot,dm-pre-reloc;
};
&pinctrl {
u-boot,dm-pre-reloc;
};

17
arch/arm/dts/rk3288-rock-pi-n8.dts Normal file
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@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Vamrs Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
/dts-v1/;
#include "rk3288.dtsi"
#include "rk3288-vmarc-som.dtsi"
#include <rockchip-radxa-dalang-carrier.dtsi>
/ {
model = "Radxa ROCK Pi N8";
compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
"rockchip,rk3288";
};

289
arch/arm/dts/rk3288-vmarc-som.dtsi Normal file
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@ -0,0 +1,289 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Vamrs Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pwm/pwm.h>
/ {
compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288";
ext_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "ext_gmac";
#clock-cells = <0>;
};
vccio_flash: vccio-flash-regulator {
compatible = "regulator-fixed";
regulator-name = "vccio_flash";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us = <150>;
vin-supply = <&vcc_io>;
};
vcc_sys: vsys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
status = "okay";
};
&gmac {
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
clock_in_out = "input";
phy-mode = "rgmii";
phy-supply = <&vcc_io>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x30>;
rx_delay = <0x10>;
max-speed = <1000>;
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
rk808: pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int &global_pwroff>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
vcc3-supply = <&vcc_sys>;
vcc4-supply = <&vcc_sys>;
vcc6-supply = <&vcc_sys>;
vcc7-supply = <&vcc_sys>;
vcc8-supply = <&vcc_io>;
vcc9-supply = <&vcc_io>;
vcc10-supply = <&vcc_sys>;
vcc11-supply = <&vcc_sys>;
vcc12-supply = <&vcc_io>;
vddio-supply = <&vcc_io>;
regulators {
vdd_cpu: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd_arm";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-name = "vdd_gpu";
regulator-ramp-delay = <6000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_io: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_io";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_tp: LDO_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_tp";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca_codec: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcca_codec";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vdd_10: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vdd_10";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vcc_wl: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_wl";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vdd10_lcd: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vdd10_lcd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_18: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_18";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc18_lcd: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc18_lcd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_sd: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_lcd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_lcd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&pinctrl {
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
};
pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
bias-pull-up;
drive-strength = <8>;
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins =
<6 RK_PC0 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC1 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC2 1 &pcfg_pull_up_drv_8ma>,
<6 RK_PC3 1 &pcfg_pull_up_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins =
<6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins =
<6 RK_PC5 1 &pcfg_pull_up_drv_8ma>;
};
};
};

10
arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
View file

@ -12,7 +12,11 @@
};
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc;
};
config {
u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
};
};
@ -24,6 +28,10 @@
u-boot,dm-pre-reloc;
};
&rng {
status = "okay";
};
&sdhci {
max-frequency = <25000000>;
u-boot,dm-pre-reloc;

4
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
View file

@ -19,6 +19,10 @@
};
};
&rng {
status = "okay";
};
&spi1 {
spi_flash: flash@0 {
u-boot,dm-pre-reloc;

7
arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi Normal file
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@ -0,0 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
#include "rk3399pro-u-boot.dtsi"
#include "rk3399-sdram-lpddr3-4GB-1600.dtsi"

18
arch/arm/dts/rk3399pro-rock-pi-n10.dts Normal file
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@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Radxa Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
/dts-v1/;
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
#include "rk3399pro-vmarc-som.dtsi"
#include <rockchip-radxa-dalang-carrier.dtsi>
/ {
model = "Radxa ROCK Pi N10";
compatible = "radxa,rockpi-n10", "vamrs,rk3399pro-vmarc-som",
"rockchip,rk3399pro";
};

6
arch/arm/dts/rk3399pro-u-boot.dtsi Normal file
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@ -0,0 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
#include "rk3399-u-boot.dtsi"

338
arch/arm/dts/rk3399pro-vmarc-som.dtsi Normal file
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@ -0,0 +1,338 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Vamrs Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pwm/pwm.h>
/ {
compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "clkin_gmac";
#clock-cells = <0>;
};
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_l>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_l>;
};
&emmc_phy {
status = "okay";
};
&gmac {
assigned-clocks = <&cru SCLK_RMII_SRC>;
assigned-clock-parents = <&clkin_gmac>;
clock_in_out = "input";
phy-supply = <&vcc_lan>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x28>;
rx_delay = <0x11>;
};
&i2c0 {
clock-frequency = <400000>;
i2c-scl-rising-time-ns = <180>;
i2c-scl-falling-time-ns = <30>;
status = "okay";
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio1>;
interrupts = <RK_PC2 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;
wakeup-source;
vcc1-supply = <&vcc5v0_sys>;
vcc2-supply = <&vcc5v0_sys>;
vcc3-supply = <&vcc5v0_sys>;
vcc4-supply = <&vcc5v0_sys>;
vcc5-supply = <&vcc_buck5>;
vcc6-supply = <&vcc_buck5>;
vcc7-supply = <&vcc5v0_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc5v0_sys>;
regulators {
vdd_log: DCDC_REG1 {
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vdd_cpu_l: DCDC_REG2 {
regulator-name = "vdd_cpu_l";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc3v3_sys: DCDC_REG4 {
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_buck5: DCDC_REG5 {
regulator-name = "vcc_buck5";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2200000>;
regulator-max-microvolt = <2200000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <2200000>;
};
};
vcca_0v9: LDO_REG1 {
regulator-name = "vcca_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: LDO_REG2 {
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc_0v9: LDO_REG3 {
regulator-name = "vcc_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vcca_1v8: LDO_REG4 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1850000>;
regulator-max-microvolt = <1850000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/*
* As per BSP, but schematic not showing any regulator
* pin for LD05.
*/
vdd1v5_dvp: LDO_REG5 {
regulator-name = "vdd1v5_dvp";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v5: LDO_REG6 {
regulator-name = "vcc_1v5";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_3v0: LDO_REG7 {
regulator-name = "vccio_3v0";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG8 {
regulator-name = "vccio_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
/*
* As per BSP, but schematic not showing any regulator
* pin for LD09.
*/
vcc_sd: LDO_REG9 {
regulator-name = "vcc_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc5v0_usb2: SWITCH_REG1 {
regulator-name = "vcc5v0_usb2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <5000000>;
};
};
vccio_3v3: vcc_lan: SWITCH_REG2 {
regulator-name = "vccio_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&io_domains {
status = "okay";
bt656-supply = <&vcca_1v8>;
sdmmc-supply = <&vccio_sd>;
gpio1830-supply = <&vccio_3v0>;
};
&pmu_io_domains {
status = "okay";
pmu1830-supply = <&vcc_1v8>;
};
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
};
&sdmmc {
cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
max-frequency = <150000000>;
};
&tsadc {
status = "okay";
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
};
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
<1 RK_PC2 0 &pcfg_pull_up>;
};
};
};

22
arch/arm/dts/rk3399pro.dtsi Normal file
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@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
#include "rk3399.dtsi"
/ {
compatible = "rockchip,rk3399pro";
};
/* Default to enabled since AP talk to NPU part over pcie */
&pcie_phy {
status = "okay";
};
/* Default to enabled since AP talk to NPU part over pcie */
&pcie0 {
ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
status = "okay";
};

79
arch/arm/dts/rockchip-radxa-dalang-carrier.dtsi Normal file
View file

@ -0,0 +1,79 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Radxa Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
#include <dt-bindings/pwm/pwm.h>
/ {
chosen {
stdout-path = "serial2:1500000n8";
};
};
&gmac {
status = "okay";
};
&i2c1 {
status = "okay";
i2c-scl-rising-time-ns = <140>;
i2c-scl-falling-time-ns = <30>;
};
&i2c2 {
status = "okay";
clock-frequency = <400000>;
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio4>;
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
};
};
&pwm0 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
vqmmc-supply = <&vccio_sd>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts>;
status = "okay";
};
&uart2 {
status = "okay";
};
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins =
<4 RK_PD6 0 &pcfg_pull_up>;
};
};
};

2
arch/arm/mach-rockchip/Kconfig
View file

@ -207,7 +207,6 @@ config ROCKCHIP_RK3399
select SUPPORT_TPL
select SPL
select SPL_ATF
select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
select SPL_BOARD_INIT if SPL
select SPL_LOAD_FIT
select SPL_CLK if SPL
@ -232,6 +231,7 @@ config ROCKCHIP_RK3399
imply PRE_CONSOLE_BUFFER
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_SDRAM_COMMON
imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
imply SPL_ROCKCHIP_COMMON_BOARD
imply TPL_SERIAL_SUPPORT
imply TPL_LIBCOMMON_SUPPORT

6
board/rockchip/evb_rk3288/MAINTAINERS
View file

@ -4,3 +4,9 @@ S: Maintained
F: board/rockchip/evb_rk3288
F: include/configs/evb_rk3288.h
F: configs/evb-rk3288_defconfig
ROCK-PI-N8
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: configs/rock-pi-n8-rk3288_defconfig
F: arch/arm/dts/rk3288-rock-pi-n8-u-boot.dtsi

6
board/rockchip/evb_rk3399/MAINTAINERS
View file

@ -68,3 +68,9 @@ M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: configs/rock-pi-4-rk3399_defconfig
F: arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
ROCK-PI-N10
M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: configs/rock-pi-n10-rk3399pro_defconfig
F: arch/arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi

12
configs/pinebook-pro-rk3399_defconfig
View file

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_DM_SPI=y
CONFIG_ENV_SIZE=0x8000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_PINEBOOK_PRO_RK3399=y
CONFIG_NR_DRAM_BANKS=1
@ -10,7 +11,10 @@ CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
CONFIG_BOOTDELAY=3
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="usb start"
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb"
CONFIG_MISC_INIT_R=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
@ -18,6 +22,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
@ -31,11 +36,12 @@ CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_DM_KEYBOARD=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MISC=y
@ -58,6 +64,8 @@ CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_DM_RESET=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SPI=y
@ -67,6 +75,8 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_ROCKCHIP_USB2_PHY=y
CONFIG_USB_KEYBOARD=y

46
configs/rock-pi-n10-rk3399pro_defconfig Normal file
View file

@ -0,0 +1,46 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_EVB_RK3399=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb"
CONFIG_MISC_INIT_R=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y

66
configs/rock-pi-n8-rk3288_defconfig Normal file
View file

@ -0,0 +1,66 @@
CONFIG_ARM=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00100000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_EVB_RK3288=y
CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_USE_PREBOOT=y
CONFIG_SILENT_CONSOLE=y
CONFIG_DEFAULT_FDT_FILE="rk3288-rock-pi-n8.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
CONFIG_CMD_SPL=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SPL_PARTITION_UUIDS=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
# CONFIG_SPL_PMIC_CHILDREN is not set
CONFIG_PMIC_RK8XX=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y

2
configs/rockpro64-rk3399_defconfig
View file

@ -12,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="usb start"
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_MISC_INIT_R=y
CONFIG_DISPLAY_BOARDINFO_LATE=y

12
include/configs/pinebook-pro-rk3399.h
View file

@ -14,15 +14,9 @@
#include <configs/rk3399_common.h>
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV 0
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_SECT_SIZE (8 * 1024)
#endif
#undef CONFIG_SYS_SPI_U_BOOT_OFFS
#define CONFIG_SYS_SPI_U_BOOT_OFFS 1024 * 512
#define SDRAM_BANK_SIZE (2UL << 30)
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#endif