diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 11b5824232..9ba60b57aa 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -459,18 +459,41 @@ struct op_params usb3_electrical_config_serdes_rev1_params[] = {
 };
 
 struct op_params usb3_electrical_config_serdes_rev2_params[] = {
-	/* Spread Spectrum Clock Enable */
-	{LANE_CFG4_REG, 0x800, 0x80, {0x80}, 0, 0},
+	/* Spread Spectrum Clock Enable, CFG_DFE_OVERRIDE and PIN_DFE_PAT_DIS */
+	{LANE_CFG4_REG, 0x800, 0xc2, {0xc0}, 0, 0},
+	/* CFG_SQ_DET_SEL and CFG_RX_INIT_SEL */
+	{LANE_CFG5_REG, 0x800, 0x3, {0x3}, 0, 0},
 	/* G2_TX_SSC_AMP[6:0]=4.5k_p_pM and TX emphasis mode=m_v */
 	{G2_SETTINGS_2_REG, 0x800, 0xfe40, {0x4440}, 0, 0},
-	/* G2_RX SELMUFF, SELMUFI, SELMUPF and SELMUPI */
+	/* FFE Setting Force, FFE_RES[2:0]=0x6 and FFE_CAP[3:0]=0xf */
+	{G2_SETTINGS_3_REG, 0x800, 0xff, {0xef}, 0, 0},
+	/* G2_DFE_RES[1:0]=0x0(3mV)*/
+	{G2_SETTINGS_4_REG, 0x800, 0x300, {0x300}, 0, 0},
+	/* HPF_Bw[1:0]=0x3 */
+	{PLLINTP_REG1, 0x800, 0x300, {0x300}, 0, 0},
+	/* TXIMPCAL_TH[3:0]=0x3, RXIMPCAL_TH[3:0]=0x0 */
+	{VTHIMPCAL_CTRL_REG, 0x800, 0xff00, {0x3000}, 0, 0},
+	/* CFG_SQ_DET_SEL and CFG_RX_INIT_SEL*/
+	{LANE_CFG5_REG, 0x800, 0x3, {0x3}, 0, 0},
+	/* REFCLK_SEL(25Mhz), ICP_FORCE, ICP[3:0]=0xa(210uA); */
+	{MISC_REG, 0x800, 0x42f, {0x42a}, 0, 0},
+	/* REF_FREF_SEL[4:0]=0x2(25Mhz) */
+	{POWER_AND_PLL_CTRL_REG, 0x800, 0x1f, {0x02}, 0, 0},
+	/*
+	 * G2_RX SELMUFF[1:0]=3, G2_RX_SELMUFI[1:0]=3, G2_RX_SELMUPF[2:0]=2
+	 * and G2_RX_SELMUPI[2:0]=2
+	 */
 	{G2_SETTINGS_1_REG, 0x800, 0x3ff, {0x3d2}, 0, 0},
 	/* Dtl Clamping disable and Dtl-clamping-Sel(6000ppm) */
 	{RX_REG2, 0x800, 0xf0, {0x70}, 0, 0},
+	/* tx_amp_pipe_v0[4:0]=0x1a */
+	{PCIE_REG1, 0x800, 0xf80, {0xd00}, 0, 0},
 	/* vco_cal_vth_sel */
 	{REF_REG0, 0x800, 0x38, {0x20}, 0, 0},
-	/* Spread Spectrum Clock Enable */
-	{LANE_CFG5_REG, 0x800, 0x4, {0x4}, 0, 0},
+	/* PRD_TXDEEMPH0 */
+	{LANE_CFG0_REG, 0x800, 0x1, {0x1}, 0, 0},
+	/* MODE_MARGIN_OVERRIDE */
+	{GLOBAL_TEST_CTRL, 0x800, 0x4, {0x4}, 0, 0},
 };
 
 /* PEX and USB3 - TX config seq */
@@ -490,11 +513,11 @@ struct op_params pex_and_usb3_tx_config_params1[] = {
 	/* 10ms delay */
 	{0x0, 0x0, 0x0, {0x0, 0x0}, 10, 0},
 	/* os_ph_offset_force (align 90) */
-	{RX_REG3, 0x800, 0xff, {0xdc, NO_DATA}, 0, 0},
+	{RX_REG3, 0x800, 0xff, {0xdc, 0xd8}, 0, 0},
 	/* Set os_ph_valid */
-	{RX_REG3, 0x800, 0x100, {0x100, NO_DATA}, 0, 0},
+	{RX_REG3, 0x800, 0x100, {0x100, 0x100}, 0, 0},
 	/* Unset os_ph_valid */
-	{RX_REG3, 0x800, 0x100, {0x0, NO_DATA}, 0, 0},
+	{RX_REG3, 0x800, 0x100, {0x0, 0x0}, 0, 0},
 };
 
 struct op_params pex_and_usb3_tx_config_params2[] = {
diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
index 118bf56602..94c43b4daf 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
+++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
@@ -50,6 +50,7 @@
 #define MISC_REG			0xa013c
 #define GLUE_REG			0xa0140
 #define GENERATION_DIVIDER_FORCE_REG	0xa0144
+#define PLLINTP_REG1			0xa0150
 #define PCIE_REG0			0xa0120
 #define LANE_ALIGN_REG0			0xa0124
 #define SQUELCH_FFE_SETTING_REG		0xa0018
@@ -78,6 +79,7 @@
 #define LANE_CFG4_REG			0xa0620
 #define LANE_CFG5_REG			0xa0624
 #define GLOBAL_CLK_CTRL			0xa0704
+#define GLOBAL_TEST_CTRL		0xa0708
 #define GLOBAL_MISC_CTRL		0xa0718
 #define GLOBAL_CLK_SRC_HI		0xa0710