Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-12-01 17:10:11 +00:00
Code Issues Projects Releases Packages Wiki Activity

dm: spi: Correct BIOS protection logic for ICH9

Browse source 
The logic is incorrect and currently has no effect. Fix it so that we can
write to SPI flash, since by default it is write-protected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Andrew Bradford <andrew.bradford@kodakalaris.com>
This commit is contained in:
Simon Glass 2015-07-03 18:28:22 -06:00
parent e1e332c8f2
commit 5078792807
1 changed files with 4 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
drivers/spi/ich.c
View file

@ -40,6 +40,7 @@ struct ich_spi_priv {
int status; int status;
int control; int control;
int bbar; int bbar;
int bcr;
uint32_t *pr; /* only for ich9 */ uint32_t *pr; /* only for ich9 */
int speed; /* pointer to speed control */ int speed; /* pointer to speed control */
ulong max_speed; /* Maximum bus speed in MHz */ ulong max_speed; /* Maximum bus speed in MHz */
@ -239,6 +240,7 @@ static int ich_init_controller(struct ich_spi_platdata *plat,
ctlr->speed = ctlr->control + 2; ctlr->speed = ctlr->control + 2;
ctlr->bbar = offsetof(struct ich9_spi_regs, bbar); ctlr->bbar = offsetof(struct ich9_spi_regs, bbar);
ctlr->preop = offsetof(struct ich9_spi_regs, preop); ctlr->preop = offsetof(struct ich9_spi_regs, preop);
ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
ctlr->pr = &ich9_spi->pr[0]; ctlr->pr = &ich9_spi->pr[0];
ctlr->base = ich9_spi; ctlr->base = ich9_spi;
} else { } else {
@ -688,13 +690,10 @@ static int ich_spi_probe(struct udevice *bus)
* v9, deassert SMM BIOS Write Protect Disable. * v9, deassert SMM BIOS Write Protect Disable.
*/ */
if (plat->use_sbase) { if (plat->use_sbase) {
struct ich9_spi_regs *ich9_spi; bios_cntl = ich_readb(priv, priv->bcr);
ich9_spi = priv->base;
bios_cntl = ich_readb(priv, ich9_spi->bcr);
bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */ bios_cntl &= ~(1 << 5); /* clear Enable InSMM_STS (EISS) */
bios_cntl |= 1; /* Write Protect Disable (WPD) */ bios_cntl |= 1; /* Write Protect Disable (WPD) */
ich_writeb(priv, bios_cntl, ich9_spi->bcr); ich_writeb(priv, bios_cntl, priv->bcr);
} else { } else {
pci_read_config_byte(plat->dev, 0xdc, &bios_cntl); pci_read_config_byte(plat->dev, 0xdc, &bios_cntl);
if (plat->ich_version == 9) if (plat->ich_version == 9)