- chameleonv3 updates
This commit is contained in:
Tom Rini 2023-02-22 09:28:03 -05:00
commit 504feed905
11 changed files with 47 additions and 7 deletions

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@ -442,6 +442,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_agilex_socdk.dtb \
socfpga_arria5_secu1.dtb \
socfpga_arria5_socdk.dtb \
socfpga_arria10_chameleonv3_270_2.dtb \
socfpga_arria10_chameleonv3_270_3.dtb \
socfpga_arria10_chameleonv3_480_2.dtb \
socfpga_arria10_socdk_sdmmc.dtb \

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@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3_480_2_handoff.h"
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
&fpga_mgr {
altr,bitstream = "fpga-270-2.itb";
};

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@ -0,0 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3.dtsi"

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@ -6,3 +6,7 @@
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
&fpga_mgr {
altr,bitstream = "fpga-270-3.itb";
};

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@ -2,4 +2,4 @@
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3.dts"
#include "socfpga_arria10_chameleonv3.dtsi"

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@ -6,3 +6,7 @@
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
&fpga_mgr {
altr,bitstream = "fpga-480-2.itb";
};

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@ -2,4 +2,4 @@
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3.dts"
#include "socfpga_arria10_chameleonv3.dtsi"

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@ -0,0 +1,13 @@
# MMC boot command
bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm
# Network boot command and vars
bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm
autoload=no
serverip=192.168.0.1
# U-Boot will run this after loading this file
bootcmd_txt=run bootcmd_mmc
# Kernel cmdline
bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rootflags=subvol=root rw rootwait

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@ -5,8 +5,10 @@ CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x4400
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_FS_FAT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y

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@ -20,11 +20,10 @@
#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
#define CFG_EXTRA_ENV_SETTINGS \
"autoload=no\0" \
"bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rw rootwait\0" \
"distro_bootcmd=bridge enable; run bootcmd_mmc\0" \
"bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm\0" \
"bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm\0"
"distro_bootcmd=bridge enable; " \
"load mmc 0:1 ${loadaddr} u-boot.txt; " \
"env import -t ${loadaddr}; " \
"run bootcmd_txt\0"
/*
* L4 OSC1 Timer 0