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ns16550: zap CONFIG_NS16550_SERIAL
Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers is completed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
c7b9686d5d
commit
4fb6055211
16 changed files with 2 additions and 47 deletions
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@ -3,7 +3,6 @@ CONFIG_VENDOR_EFI=y
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CONFIG_DEFAULT_DEVICE_TREE="efi"
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CONFIG_TARGET_EFI=y
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CONFIG_TSC_CALIBRATION_BYPASS=y
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# CONFIG_NS16550_SERIAL is not set
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# CONFIG_CMD_BOOTM is not set
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_NET is not set
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@ -186,18 +186,6 @@ config ALTERA_UART
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Select this to enable an UART for Altera devices. Please find
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details on the "Embedded Peripherals IP User Guide" of Altera.
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config NS16550_SERIAL
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bool "NS16550 UART or compatible"
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depends on DM_SERIAL
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default y if X86 || PPC || ARCH_ROCKCHIP
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help
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Support NS16550 UART or compatible with driver model. This can be
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enabled in the device tree with the correct input clock frequency.
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If the input clock frequency is not defined in the device tree,
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the macro CONFIG_SYS_NS16550_CLK defined in a legacy board header
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file will be used. It can be a constant or a function to get clock,
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eg, get_serial_clock().
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config SANDBOX_SERIAL
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bool "Sandbox UART support"
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depends on SANDBOX
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@ -404,7 +404,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
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plat->base = addr;
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plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"reg-shift", 1);
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#ifdef CONFIG_NS16550_SERIAL
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plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"clock-frequency",
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CONFIG_SYS_NS16550_CLK);
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@ -412,7 +411,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
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debug("ns16550 clock not defined\n");
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return -EINVAL;
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}
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#endif /* CONFIG_NS16550_SERIAL */
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return 0;
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}
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@ -425,7 +423,6 @@ const struct dm_serial_ops ns16550_serial_ops = {
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.setbrg = ns16550_serial_setbrg,
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};
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#ifdef CONFIG_NS16550_SERIAL
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct udevice_id ns16550_serial_ids[] = {
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{ .compatible = "ns16550" },
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@ -454,5 +451,4 @@ U_BOOT_DRIVER(ns16550_serial) = {
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.probe = ns16550_serial_probe,
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.ops = &ns16550_serial_ops,
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};
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#endif /* CONFIG_NS16550_SERIAL */
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#endif /* CONFIG_DM_SERIAL */
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@ -27,8 +27,6 @@
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#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#else
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#define CONFIG_NS16550_SERIAL
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#endif
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/* I2C Configuration */
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@ -18,7 +18,6 @@
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#include <asm/arch/omap.h>
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/* Serial support */
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#define CONFIG_NS16550_SERIAL
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#define CONFIG_DM_SERIAL
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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@ -39,10 +39,6 @@
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/*
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* NS16550 Configuration
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*/
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
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#define CONFIG_NS16550_SERIAL
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#endif
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
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@ -49,7 +49,6 @@
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/*
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* NS16550 Configuration
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*/
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#undef CONFIG_NS16550_SERIAL
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#undef CONFIG_SYS_NS16550_CLK
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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@ -196,9 +196,7 @@
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*/
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_NS16550_SERIAL
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#else
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#endif
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@ -45,9 +45,7 @@
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#define CONFIG_SYS_NS16550_SERIAL
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/* ns16550 reg in the low bits of cpu reg */
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#define CONFIG_SYS_NS16550_CLK 24000000
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#ifdef CONFIG_DM_SERIAL
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# define CONFIG_NS16550_SERIAL
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#else
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#ifndef CONFIG_DM_SERIAL
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# define CONFIG_SYS_NS16550_REG_SIZE -4
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# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
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# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
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@ -35,7 +35,6 @@
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/*
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* UART configuration
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*/
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#define CONFIG_NS16550_SERIAL
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_CLK 166666666
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@ -39,7 +39,6 @@
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_NS16550_SERIAL
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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@ -19,10 +19,6 @@
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
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#ifndef CONFIG_SPL_BUILD
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# define CONFIG_NS16550_SERIAL
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#endif
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#include <asm/arch/omap.h>
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/* NS16550 Configuration */
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@ -63,8 +63,6 @@
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#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#else
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#define CONFIG_NS16550_SERIAL
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#endif
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#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
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#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
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@ -18,10 +18,6 @@
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#include <asm/arch/cpu.h>
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#include <asm/arch/omap.h>
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#ifndef CONFIG_SPL_BUILD
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# define CONFIG_NS16550_SERIAL
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#endif
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/* Common ARM Erratas */
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#define CONFIG_ARM_ERRATA_454179
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#define CONFIG_ARM_ERRATA_430973
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@ -63,8 +63,6 @@
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_COM3 UART3_BASE
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#else
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#define CONFIG_NS16550_SERIAL
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#endif
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#define CONFIG_CONS_INDEX 3
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@ -55,8 +55,6 @@
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#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#else
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#define CONFIG_NS16550_SERIAL
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#endif
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/*
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