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dm: Use dev_get_addr() where possible

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This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
This commit is contained in:
Simon Glass 2015-08-11 08:33:29 -06:00
parent 71f1e3f19d
commit 4e9838c102
20 changed files with 26 additions and 29 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/core/device.c
View file

@ -575,8 +575,10 @@ fdt_addr_t dev_get_addr(struct udevice *dev)
addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
if (addr != FDT_ADDR_T_NONE) {
#ifndef CONFIG_SPL_BUILD
if (device_get_uclass_id(dev->parent) == UCLASS_SIMPLE_BUS)
addr = simple_bus_translate(dev->parent, addr);
#endif
}
return addr;

3
drivers/gpio/s5p_gpio.c
View file

@ -327,8 +327,7 @@ static int gpio_exynos_bind(struct udevice *parent)
if (plat)
return 0;
base = (struct s5p_gpio_bank *)fdtdec_get_addr(gd->fdt_blob,
parent->of_offset, "reg");
base = (struct s5p_gpio_bank *)dev_get_addr(parent);
for (node = fdt_first_subnode(blob, parent->of_offset), bank = base;
node > 0;
node = fdt_next_subnode(blob, node), bank++) {

3
drivers/gpio/sunxi_gpio.c
View file

@ -285,8 +285,7 @@ static int gpio_sunxi_bind(struct udevice *parent)
no_banks = SUNXI_GPIO_BANKS;
}
ctlr = (struct sunxi_gpio_reg *)fdtdec_get_addr(gd->fdt_blob,
parent->of_offset, "reg");
ctlr = (struct sunxi_gpio_reg *)dev_get_addr(parent);
for (bank = 0; bank < no_banks; bank++) {
struct sunxi_gpio_platdata *plat;
struct udevice *dev;

3
drivers/gpio/tegra_gpio.c
View file

@ -343,8 +343,7 @@ static int gpio_tegra_bind(struct udevice *parent)
if (!fdt_getprop(gd->fdt_blob, parent->of_offset, "interrupts", &len))
return -EINVAL;
bank_count = len / 3 / sizeof(u32);
ctlr = (struct gpio_ctlr *)fdtdec_get_addr(gd->fdt_blob,
parent->of_offset, "reg");
ctlr = (struct gpio_ctlr *)dev_get_addr(parent);
}
#endif
for (bank = 0; bank < bank_count; bank++) {

6
drivers/i2c/s3c24x0_i2c.c
View file

@ -1397,12 +1397,10 @@ static int s3c_i2c_ofdata_to_platdata(struct udevice *dev)
if (i2c_bus->is_highspeed) {
flags = PINMUX_FLAG_HS_MODE;
i2c_bus->hsregs = (struct exynos5_hsi2c *)
fdtdec_get_addr(blob, node, "reg");
i2c_bus->hsregs = (struct exynos5_hsi2c *)dev_get_addr(dev);
} else {
flags = 0;
i2c_bus->regs = (struct s3c24x0_i2c *)
fdtdec_get_addr(blob, node, "reg");
i2c_bus->regs = (struct s3c24x0_i2c *)dev_get_addr(dev);
}
i2c_bus->id = pinmux_decode_periph_id(blob, node);

2
drivers/i2c/tegra_i2c.c
View file

@ -339,7 +339,7 @@ static int tegra_i2c_probe(struct udevice *dev)
i2c_bus->id = dev->seq;
i2c_bus->type = dev_get_driver_data(dev);
i2c_bus->regs = (struct i2c_ctlr *)fdtdec_get_addr(blob, node, "reg");
i2c_bus->regs = (struct i2c_ctlr *)dev_get_addr(dev);
/*
* We don't have a binding for pinmux yet. Leave it out for now. So

2
drivers/serial/ns16550.c
View file

@ -364,7 +364,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
fdt_addr_t addr;
/* try Processor Local Bus device first */
addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
addr = dev_get_addr(dev);
#ifdef CONFIG_PCI
if (addr == FDT_ADDR_T_NONE) {
/* then try pci device */

3
drivers/serial/serial_arc.c
View file

@ -133,8 +133,7 @@ static int arc_serial_ofdata_to_platdata(struct udevice *dev)
struct arc_serial_platdata *plat = dev_get_platdata(dev);
DECLARE_GLOBAL_DATA_PTR;
plat->reg = (struct arc_serial_regs *)fdtdec_get_addr(gd->fdt_blob,
dev->of_offset, "reg");
plat->reg = (struct arc_serial_regs *)dev_get_addr(dev);
plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"clock-frequency", 0);

2
drivers/serial/serial_pl01x.c
View file

@ -365,7 +365,7 @@ static int pl01x_serial_ofdata_to_platdata(struct udevice *dev)
struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
fdt_addr_t addr;
addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
addr = dev_get_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;

2
drivers/serial/serial_s5p.c
View file

@ -169,7 +169,7 @@ static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
struct s5p_serial_platdata *plat = dev->platdata;
fdt_addr_t addr;
addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
addr = dev_get_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;

2
drivers/spi/designware_spi.c
View file

@ -134,7 +134,7 @@ static int dw_spi_ofdata_to_platdata(struct udevice *bus)
const void *blob = gd->fdt_blob;
int node = bus->of_offset;
plat->regs = (struct dw_spi *)fdtdec_get_addr(blob, node, "reg");
plat->regs = (struct dw_spi *)dev_get_addr(bus);
/* Use 500KHz as a suitable default */
plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",

2
drivers/spi/exynos_spi.c
View file

@ -255,7 +255,7 @@ static int exynos_spi_ofdata_to_platdata(struct udevice *bus)
const void *blob = gd->fdt_blob;
int node = bus->of_offset;
plat->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg");
plat->regs = (struct exynos_spi *)dev_get_addr(bus);
plat->periph_id = pinmux_decode_periph_id(blob, node);
if (plat->periph_id == PERIPH_ID_NONE) {

2
drivers/spi/fsl_dspi.c
View file

@ -654,7 +654,7 @@ static int fsl_dspi_ofdata_to_platdata(struct udevice *bus)
plat->num_chipselect =
fdtdec_get_int(blob, node, "num-cs", FSL_DSPI_MAX_CHIPSELECT);
addr = fdtdec_get_addr(blob, node, "reg");
addr = dev_get_addr(bus);
if (addr == FDT_ADDR_T_NONE) {
debug("DSPI: Can't get base address or size\n");
return -ENOMEM;

2
drivers/spi/tegra114_spi.c
View file

@ -118,7 +118,7 @@ static int tegra114_spi_ofdata_to_platdata(struct udevice *bus)
const void *blob = gd->fdt_blob;
int node = bus->of_offset;
plat->base = fdtdec_get_addr(blob, node, "reg");
plat->base = dev_get_addr(bus);
plat->periph_id = clock_decode_periph_id(blob, node);
if (plat->periph_id == PERIPH_ID_NONE) {

2
drivers/spi/tegra20_sflash.c
View file

@ -90,7 +90,7 @@ static int tegra20_sflash_ofdata_to_platdata(struct udevice *bus)
const void *blob = gd->fdt_blob;
int node = bus->of_offset;
plat->base = fdtdec_get_addr(blob, node, "reg");
plat->base = dev_get_addr(bus);
plat->periph_id = clock_decode_periph_id(blob, node);
if (plat->periph_id == PERIPH_ID_NONE) {

2
drivers/spi/tegra20_slink.c
View file

@ -106,7 +106,7 @@ static int tegra30_spi_ofdata_to_platdata(struct udevice *bus)
const void *blob = gd->fdt_blob;
int node = bus->of_offset;
plat->base = fdtdec_get_addr(blob, node, "reg");
plat->base = dev_get_addr(bus);
plat->periph_id = clock_decode_periph_id(blob, node);
if (plat->periph_id == PERIPH_ID_NONE) {

2
drivers/spi/zynq_spi.c
View file

@ -72,7 +72,7 @@ static int zynq_spi_ofdata_to_platdata(struct udevice *bus)
const void *blob = gd->fdt_blob;
int node = bus->of_offset;
plat->regs = (struct zynq_spi_regs *)fdtdec_get_addr(blob, node, "reg");
plat->regs = (struct zynq_spi_regs *)dev_get_addr(bus);
/* FIXME: Use 250MHz as a suitable default */
plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",

8
drivers/usb/host/ehci-tegra.c
View file

@ -684,11 +684,13 @@ static void config_clock(const u32 timing[])
timing[PARAM_CPCON], timing[PARAM_LFCON]);
}
static int fdt_decode_usb(const void *blob, int node, struct fdt_usb *config)
static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config)
{
const void *blob = gd->fdt_blob;
int node = dev->of_offset;
const char *phy, *mode;
config->reg = (struct usb_ctlr *)fdtdec_get_addr(blob, node, "reg");
config->reg = (struct usb_ctlr *)dev_get_addr(dev);
mode = fdt_getprop(blob, node, "dr_mode", NULL);
if (mode) {
if (0 == strcmp(mode, "host"))
@ -812,7 +814,7 @@ static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
struct fdt_usb *priv = dev_get_priv(dev);
int ret;
ret = fdt_decode_usb(gd->fdt_blob, dev->of_offset, priv);
ret = fdt_decode_usb(dev, priv);
if (ret)
return ret;

2
drivers/usb/host/xhci-exynos5.c
View file

@ -61,7 +61,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
/*
* Get the base address for XHCI controller from the device node
*/
plat->hcd_base = fdtdec_get_addr(blob, dev->of_offset, "reg");
plat->hcd_base = dev_get_addr(dev);
if (plat->hcd_base == FDT_ADDR_T_NONE) {
debug("Can't get the XHCI register base address\n");
return -ENXIO;

3
drivers/video/tegra124/dp.c
View file

@ -1555,9 +1555,8 @@ error_enable:
static int tegra_dp_ofdata_to_platdata(struct udevice *dev)
{
struct tegra_dp_plat *plat = dev_get_platdata(dev);
const void *blob = gd->fdt_blob;
plat->base = fdtdec_get_addr(blob, dev->of_offset, "reg");
plat->base = dev_get_addr(dev);
return 0;
}